JPH01170270A - Picture processor - Google Patents

Abstract

PURPOSE:To adaptively realize a picture processing in response to the feature of a picture at every picture area by calculating the square sum mean value of a difference between adjacent picture elements, normalizing the square sum mean value by the mean value of the information in relating to the picture density and comparing the normalized value with a prescribed reference value. CONSTITUTION:The subject processor is provided with a square sum mean value calculating means 61 calculating the square sum mean value of a difference between adjacent picture elements in the information relating to the picture density of picture information and a comparison identification means 45. Then, the square sum mean value of the difference between the adjacent picture elements in the information relating to the picture density of the picture information is calculated, the square sum mean value is normalized by the mean value of the information relating to the picture density, the normalized value is compared with a prescribed reference value to identify whether the picture information is binary picture or a non-binary picture. Thus, proper picture processing can be applied to even a low contrast character such as a blurring character written in a pencil decided to be a photograph area and whose resolution is remarkably damaged while preserving its resolution.

Description

[Detailed Description of the Invention] [Objective of the Invention] (Industrial Application Field) The present invention relates to binary images such as character images mixed in document images and non-binarized images such as photographic images, that is, grayscale images. The present invention relates to an image processing apparatus that processes images so as to simultaneously satisfy the resolution of characters and the gradation level of photographs.

(Prior Art) In an image processing device capable of image processing not only text but also document images in which text and gray scale images such as photographs are mixed, text and line drawings read by a reading device such as a scanner are processed. Image information with contrast is simply binarized using a fixed threshold value, and image information with gradations such as photographs is binarized using pseudo gradation means such as a dither method.

More specifically, in this image processing device, when the read image information is simply binarized using a fixed threshold value, the resolution is preserved in the text and line image areas, so no image quality deterioration occurs, but in the photo image area, the image quality is not degraded. Because the gradation is not preserved, the resulting image is degraded in image quality.Furthermore, when the read image information is gradated using systematic dithering, etc., the gradation is preserved in the photographic image area, resulting in image quality degradation. However, in order to prevent the resolution from decreasing in the area of characters and line images, resulting in an image with degraded image quality, two types of binarization are used: simple binarization using fixed equivalence and binarization using pseudo 11111 conversion. It uses a means of valuing.

That is, by performing a single binarization process on read image information, it is impossible to simultaneously satisfy the image quality of each region having different characteristics, such as a character image and a photographic image. This also applies to various types of image processing; for example, if processing is not performed that matches the characteristics of the image, the image quality may deteriorate when enlarging or reducing a binarized image, or when encoding processing does not match the characteristics of the image. If processing is not performed using a compression method that is unique, the data will be compressed inefficiently. Therefore, it is essential to divide image information into regions according to the characteristics of the image and to perform adaptive processing on each region.

Therefore, conventionally, as a method that satisfies the resolution of the text part and the gradation level of the photograph part at the same time, the maximum density difference Δ□ atax of the image density in a local area within the image plane is calculated (note that this image density is determined by means the image signal level,
This is different from the commonly used "concentration." Therefore, hereinafter, unless otherwise specified, density will be used in this sense), this maximum density difference ΔQ atax is compared with the determination threshold Th, and the area is divided into text and line image areas and photographic image areas, and each A method has been proposed in which the binarization process is switched depending on the characteristics of the image area (for example, Japanese Patent Application Laid-Open No. 58-3374).
.

(Problems to be Solved by the Invention) In the conventional image processing method described above, a low-contrast character area, such as a faded character area such as pencil writing, is determined to be a photographic area because the maximum density difference is small, and the character area is There is a problem in that the resolution of the image is significantly impaired.

More specifically, as shown in FIG. 12, the document P moves into areas of contrasting characters and line images, into areas B of photographic images where density changes are gentle, and into low-contrast character areas such as faded text areas. If it is composed of area C,
Typical signal levels of image information in each region of the document P are as shown in FIG. Now, assuming that the dynamic range of image density is 8 bits (0 to 255.0 to ff in hexadecimal), each of the image areas A, B, and C is set within a predetermined range within the image plane, for example, 4 x 4. Maximum density difference Δ[) within the range of 16 pixels consisting of the matrix
When l1aX is determined, the maximum concentration difference ΔD in the region
max −dd ~H(hex), ΔDiax in the B region -10 to 40 (hex), and Δ[)wax in the C region = 10 to 40 (hex).

Therefore, the determination threshold Th for distinguishing between text and photographic areas is set to 8.
Assuming 0 (hex), the following judgment condition: ΔDsax>
Th...Text portion ΔQ wax≦Th...When each image area is identified by the photo portion, the A area is identified as the text portion, and the B and C areas are identified as the photo portion.

As a result, simple binarization processing using a fixed threshold is performed in the F region, and dither processing is performed in the B and C regions. In the CwA area, character resolution is significantly impaired because erroneous identification is performed in the area and processing is performed to preserve the gradation level. In addition, in order to accurately identify the C area,
If the determination threshold is set to a small value such as 30 (hex) or 1o (hex), 8 areas will be identified as text, resulting in a photographic image in which the gradation is not preserved.In other words, in the conventional method, text It is difficult to divide the A area of the line image, the 8 areas of the photo image, and the C area of the low-contrast text area into accurate image areas. There is a problem in that it is not possible to adaptively perform image processing according to the characteristics of the image for each region.

The present invention has been made in view of the above, and an object of the present invention is to convert image information in which a text portion and a photo portion are mixed into an image so as to simultaneously satisfy the resolution of the text portion and the gradation level of the photo portion. An object of the present invention is to provide an image processing device that can adaptively perform image processing according to the characteristics of an image for each region.

[Structure of the Invention] (Means for Solving the Problems) In order to solve the above problems, the image processing device of the present invention includes the following:
Sum-of-squares average value calculation means for calculating the average sum-of-squares value of differences between adjacent pixels in information related to image density of image information, and the image whose sum-of-squares average value is to be calculated by the sum-of-squares average value calculation means. a detection means for detecting an average value of information related to the image density of the information; a calculation means for calculating a standard value obtained by normalizing the sum-of-squares average value of the sum-of-squares average value calculation means by the average value of the detection means; The invention further comprises a comparison identification means for comparing the standard value calculated by the calculation means with a predetermined reference value and identifying whether the image information is a binary image or a non-binary image. .

(Function) The image processing device of the present invention calculates an average value of the sum of squares of differences between adjacent pixels in information related to image density of image information, and converts the average value of the sum of squares into the average value of the information related to image density. standardize by value, compare this standard value with a predetermined reference value,
It is identified whether the image information is a binary image or a non-binary image.

(Example) Hereinafter, the present invention will be explained in detail using the drawings.

FIG. 1 is a block diagram showing the overall configuration of an image processing apparatus according to an embodiment of the present invention. The image processing device shown in the same figure is a scanner that is a reading means (not shown).
An image signal 11 of 8 bits per pixel is temporarily stored in line buffer 1, and this line buffer ? 1 is input to the identification circuit 2 in synchronization with a clock signal (not shown), and a delay circuit 10 consisting of a delay memory, etc.
It is supplied to the comparator circuit 9 via. The identification circuit 2 performs pixel-by-pixel identification on the image signal and supplies an identification signal 12, which is the identification result, to the selection circuit 8 as a control signal. This selection circuit 8 is connected to the first threshold generation circuit 5. The first threshold signal 15a and the second rEIi! from the second threshold generation circuit 6, respectively. I signal 15b is input, and the identification signal 12
Based on this, the optimum threshold signal is selected from the first and second threshold signals 15a and 15b and outputted to the comparison circuit 9 as the selected threshold signal 16. Comparison circuit 9 uses this selection threshold signal 1
6 and the image signal 17 of the pixel via the delay circuit 10.
When the image signal level of the pixel is greater than the selection threshold signal 16, an output image signal 18 of "1" is output, and when the image signal level of the pixel is less than or equal to the selection threshold signal 16, an output image signal 18 of "0" is output. An image signal 18 is output.

Next, details of the identification circuit 2 will be explained with reference to the block diagram of FIG.

The identification circuit 2 utilizes the characteristic that in a low-density, low-contrast text area, the average density in a local area is low in an area identified as a photographic area, but the maximum density difference is relatively large, and also uses adjacent pixel density differences. The density difference is expanded by calculating the average value of the sum of squares of the difference, and this average value of the sum of squares is normalized by the average density within a predetermined range. ,
That is, it is a circuit for identifying whether it is a photographic area, and includes a smoothing circuit 40 supplied with an image signal from the line buffer 1 and an edge emphasis circuit 4 using a Laplacian filter.
1. The smoothing circuit 40 supplies the image signal from which noise components have been removed to the edge enhancement circuit 41, and the edge enhancement circuit 41 outputs an edge-enhanced image signal with edges emphasized. This edge-enhanced image signal is supplied to the sum-of-squares average #i output circuit 61 of adjacent pixel density differences. The adjacent pixel density difference root sum average value calculation circuit 61 calculates the value of the adjacent pixel density difference in the window based on the edge-enhanced image signal. 1 degree difference sum of squares average value DI
Calculate. This average value DI of the sum of squares of adjacent pixel density differences is supplied to a division circuit 44, where it is divided by the average tooth a density Qa in the current findore supplied from the average value calculation circuit 30 as shown in the following equation, and the normalized adjacent An average value ΔDn of the inner sum of pixel density differences is calculated.

ΔDD −DIll /Da This normalized adjacent pixel density difference inner sum average value ΔDn is supplied to the comparator circuit 45 and compared with a determination threshold Th previously stored in a register or the like (not shown). As a result of this comparison, when the normalized adjacent pixel density difference average value ΔDn is larger than the determination threshold Th as a result of this comparison, the comparison circuit 45 identifies it as a character pixel and issues a "1" level identification signal. 12 is output, and the normalized adjacent pixel density difference inner power sum average value ΔD
When n is less than or equal to the determination threshold Th, the pixel is identified as a non-character pixel, that is, a photo pixel, and the identification signal 12 at the "0" level is output.
Output.

ΔQn>Th...Character pixel ΔDn≦Th...Photograph pixel In other words, the identification circuit 2 identifies the pixel as a text pixel when the normalized adjacent pixel density difference inner sum average value Δ[)n is larger than the determination threshold Th. However, when it is less than the determination threshold Th, it is identified as a non-text pixel, that is, a photographic pixel.

Next, the binarization process for each pixel identified by the identification circuit 2 as being a character pixel or a photographic pixel as described above will be described.

The image signal supplied from the line buffer 1 is supplied to the maximum value/minimum value detection circuit 42, and the maximum/minimum value detection circuit 42 selects the maximum image density Dwax and the minimum image density from among the image densities within the window. The density Q sin is detected, and the maximum image density DlaX and the minimum image fill
lfDain is supplied to the dynamic threshold calculation circuit 33. The dynamic equivalence calculation circuit 33 calculates a binarization threshold Bh from the maximum image density Q wax and the minimum image density Dmin within the window detected by the maximum value/minimum value detection circuit 42 according to the following equation.

Bh − (Dmax + Dmin ) /2・<3> This binarization threshold ah is supplied to the first threshold generation circuit 5, and the first threshold generation circuit 5
h l,: Select circuit 8 which selects the first threshold signal 15a based on
Output to. The second threshold generation circuit 6 generates a binarization threshold for the photographic area, and outputs the dither threshold shown in FIG. 16 to the selection circuit 8 as a second threshold signal 15b.

The selection circuit 8 uses the identification signal 12 as a control signal to select the first
Then, the selection threshold signal 16 is determined from the second threshold signals 15a and 15b under the following conditions.

Conditions 1 shaku 1111 river 1, identification signal 1
2 = "1'' When the first threshold signal 15a (when identifying with text) (Simple binarization threshold) 2, identification signal 12 - "0" When the second threshold signal 15b (when identifying with photograph) (Photographic threshold) selection circuit 8
compares the selection threshold signal 16 determined as described above with the image signal 17 of the pixel supplied via the delay circuit 10, outputs an output image signal 18, and thereby eliminates low contrast such as blurred characters. It is now possible to preserve the resolution of characters, including character parts, and to perform vIj image processing that satisfies the gradation level of photographic parts.

Next, a detailed circuit of the identification circuit 2 will be explained.

FIG. 3 is a detailed circuit block diagram of the identification circuit 2. Smoothing circuits 401 to 406 constitute the smoothing circuit 40,
Edge emphasizing circuits 411 to 414 are the edge emphasizing circuits 4
1. Image signal 2 of 8 bits per pixel stored in line buffer 1 consisting of 8 line buffers
The pixels ha to 2hh are approximately three pixels in size and are supplied to the smoothing circuits 401 to 406 in synchronization with the read clock CLK. Smoothing circuits 401 to 406 are smoothing circuits that use a 3×3 median filter, and when the (3×3) 9-pixel area shown in FIG. 15 is rearranged in descending order of image density, the center The value, here the fifth value, is the value marked with an X in FIG. Smoothed signal 2i obtained as above
a to 21'' are supplied to edge enhancement circuits 411 to 414. The edge enhancement circuits 411 to 414 are edge enhancement circuits using Labrasian filters, and calculate values expressed by the following equations.

G (1, J) = F (1, J) - 2F (1, J)...
...(4) Here, G(1, J) is the edge-enhanced image signal output, F(I, J) is the input image signal of the 1st and 8th rows, and 2F(1
, J) represents the Laplacian, which is the second-order differential of the input pixel F(1, J), and is defined by the following equation.

2 F (1, J) = F (I + 1. J) + F (I
-1,J)+F (1,J+1)+F (1,J-1)
-4xF (1, J) ・・・・・・(
5) The edge enhancement signals 2aa to 2ad from the edge enhancement circuits 411 to 414 are supplied to the adjacent pixel density difference inner root sum average value calculation circuit 61. Adjacent pixel density difference is the density difference between adjacent pixels in the row and column directions within the window, and when the window is 4 x 4, it is the density difference between the pixels shown by the arrows in Figure 5. be.

FIG. 4 is a detailed block diagram of the adjacent pixel density difference inner sum average value calculation circuit 61. The adjacent pixel density difference inner sum average value calculation circuit 61 includes an adjacent pixel density difference calculation circuit 63 , a square circuit 65 , an addition circuit 67 , and a division circuit 69 . The adjacent pixel density difference calculation circuit 63 calculates seven density differences between 2×4 pixels indicated by arrows in FIG. 6 at one time. The adjacent pixel density difference inner sum average value calculating circuit 61 is shown in detail in FIG. In Figure 7, 638-63h is 8
It is a 7-bit lip flop, and 63i to 630 are subtracters. The square circuit 65 is composed of seven multipliers,
The square of the seven adjacent pixel density differences calculated by the adjacent pixel density difference calculation circuit 63 is calculated and supplied to the addition circuit 67 . As shown in FIG. 8, the adder circuit 67 includes four stages of 7 lip-flops 678 to 67d and an adder 67e for adding 24 pieces of data at once. flip flop 678
~67d latches seven pieces of data at once.

Four pieces of data are supplied to the data input DO of each flip-flop, and three pieces of data are supplied to the data input D1. The 4 pieces of data supplied to the data human power Do are the 6th
This is the value obtained by squaring the four density differences in the column direction shown in the figure: ■, ■, ■, ■.

The three pieces of data supplied to the data input D1 are the values obtained by squaring the three row direction density differences (■, ■, ■) shown in FIG. 6, respectively. The adder 67e is supplied with all the outputs of each of the 7 70-lips other than the output QOjX of the flip-flop 67a. These values are indicated by arrows 2 in Figure 5.
This corresponds to the value obtained by squaring the four adjacent pixel density differences 1 to 0, respectively. The adder 67e calculates the square of the difference in density between adjacent pixels in the window, and supplies the result to the division circuit 69 as a sum of squared difference in density between adjacent pixels signals 678. Division circuit 69
divides the sum of squared adjacent pixel density differences signal 678 by the total number of pixels in the window, 4×4=16, and outputs the result as the sum of squared adjacent pixel density differences signal value Dffl. This adjacent pixel density difference square sum signal value [)m is supplied to the division circuit 44 and normalized by the average image density [)a from the average value calculation circuit 30.

FIG. 9 is a timing diagram showing the flow of image data in the identification circuit 2. In the same figure, CLK is the read clock C
LK, and DIN is line buffer 1 to smoothing circuit 4.
The timing at which image signals are input to clocks 01 to 406 is shown, and (J-3) of the first clock is shown in FIG.
This is the timing at which eight pixels from row (I-3) to row (1+4) of column ) are supplied to the smoothing circuits 401 to 406. Similarly, (J-2) of the second clock, (J-2) of the third clock
1) are column (J-2) and column (J-1>column (I-3), respectively.
) row to (1+4) row are smoothing circuits 401 to 40.
This is the timing when the signal is supplied to 6.

In FIG. 9, SUM represents the smoothing circuits 401 to 406.
The image data smoothed by the edge enhancement circuits 411 to 41
This is the timing when the signal is supplied to 4.

(J-2) of the fourth clock is shown in Figure 14 (J-2)
This is the timing at which the smoothed 6-pixel image data from the (1-2) row to the (1+3> row) of the column is supplied to the edge emphasis circuits 411 to 414.Similarly, the (J
-1>, and (J) of the sixth clock, the image data of 6 pixels in the (J-1) column and (1-3) to (1+4) rows of the (J) column are sent to the edge emphasis circuits 411 to 414. This is the timing of supply. EDG is the timing at which the image data edge-enhanced by the edge-enhancing circuit is supplied to the adjacent pixel density difference inner root sum average value calculation circuit 61. (J-1) in the 7th column is shown in Figure 14 ((J-1> column)
The edge-enhanced 4-pixel image data from 1-1) row to <1+2) row is calculated by the adjacent pixel density difference inner sum average value calculation circuit 6.
This is the timing when the signal is supplied to 1. Similarly, (J) of the 8th clock, (J+1) of the 9th clock, and (J + 2) of the 10th clock are LJ), (J+1>,
This is the timing at which image data of four pixels from rows (1-1,) to rows (1+2) of column (J+2) are supplied to the adjacent pixel density difference inner root sum average value calculation circuit 61.

The adjacent pixel density difference calculation circuit 63 of the adjacent pixel density difference inner sum mean value calculation circuit 61 receives the four pixels in the (J-1) column at the seventh clock and the four pixels in the (J) column at the eighth clock. , 6th
The seven adjacent pixel density differences shown in the figure (1) to (2) are calculated, and the results are output in the ninth step. At the same time, four pixels in the (J+1> column) are input, and density differences between seven adjacent pixels in the (J) column and (J+1> column) are calculated, and the results are output at the 10th clock.

Similarly, seven adjacent pixel density differences are output every clock at the timing ΔD shown in FIG.

The square circuit 65 connects columns (J-1) and (J) at the ninth clock.
Seven adjacent pixel density differences between pixels in a column are input, each value is squared, and the result is output at the tenth clock. At the same time, input the seven adjacent pixel density differences between the pixels in the (J) column and the (J+1) column (hereinafter referred to as the adjacent pixel density in the (J) column), calculate the square value of each, and calculate the result. Output on the 11th button. Similarly, seven adjacent pixel density difference square values are output at the timing ΔD2 shown in FIG.

The adder circuit 67 selects the (J-1) column and the 11th clock at the 10th clock.
(J) column at the clock, (J+1) column at the 12th clock,
At the 13th clock, the square value of the density difference between adjacent pixels in the (J+2) column is input, and at the 13th clock, the sum (J) of the input square values of the 24 adjacent pixel density differences is calculated, and the result is sent to the 14th clock. A clock outputs a sum of squared density difference signal 678 between adjacent pixels. At the same time, input the squared value of the adjacent pixel density difference in column (J+3), and
The sum (J+1) of the squared values of the m-degree differences between four adjacent pixels is calculated, and the result is output as the sum of squared differences in adjacent pixel density signal 67S at the 15th clock. Similarly, as shown in FIG. 9,
At a timing of ΣΔD2, a sum of squared difference signal 67S of adjacent pixel density difference is output every clock.

The division circuit 69 is the 14th clock (J-1).

(J), (J+1), (J+2> Input the square sum signal 678 of the adjacent pixel density difference for 4x4 pixels in the column, divide by the window size (16 for 4x4 pixels), and use the result as the adjacent pixel density. It is outputted as the mean value of the sum of differences within the mean value [)m in the 15th pass. At the same time (J).

Input the average value DIM of the sum of adjacent pixel density differences of 4×4 pixels in columns (J+1), (J+2), and (J+3), and (J),
(J+1), (J+2), LJ+3> Calculate the average value Dm of the sum of power within the adjacent pixel density difference of the 4x4 pixels in the column, and use the result as the first
Outputs in 6 clocks. Thereafter, in the same manner, the average value Dm of the inner power sum of adjacent pixel density differences is outputted at the timing shown in FIG.

The division circuit 44 outputs LJ-1 at the 15th clock.

(J), (J+1), (J+2>) Input the average value DI of the sum of power within the adjacent pixel density difference of the 4×4 pixels in the column, and calculate it in the average value calculation circuit 30 (described later) in the corresponding window (broken line in FIG. 14). (J-1), LJ).

(J+1), (J+2) columns of 4×4 pixel area) is divided by the average image density [)a, and the resulting normalized adjacent pixel density difference multiplication average value Δ[)n is The signal is supplied to the comparator circuit 45 using a clock. The comparison circuit 45 compares the normalized adjacent pixel density difference root sum average value ΔOn and the determination threshold Th, and outputs the identification signal 12 as described above.

FIG. 10 is a detailed circuit block diagram of the maximum/minimum value detection circuit 42, and FIG. 11 is its timing diagram. Input image signals from the line buffer 1 are sequentially supplied to comparators 201 to 204 via a selector 200 at a rate of about 4 pixels in synchronization with a read clock CLK. For example, the 166 pixels indicated by the broken line in FIG. 14 are in the (J-1) column, (
The pixels in column J), column (J+1), and column (J+2) are supplied to comparators 201 to 204, respectively. Note that in FIG. 10, the counter 207 counts the read clock CLK and outputs the output signal SEO shown in FIG.

It is a 2-bit counter that supplies SEI to selector 200. The selector 200 receives the output signal SE of the counter 207.
The data of inputs 10 to 13 are supplied to one of the output ports A3 to A0.83 to 80°03 to Go and D3 to DO according to the input signals O and SEI. Further, in FIG. 11, 13-10 are inputs of the selector 200, A3-A0 .
83~BO103~Co, 03~DO is selector 200
This is the output of

Comparators 201 to 204 detect maximum density signals 211 to 214 and minimum density signals 221 to 224 of four pixels in each column, and the maximum density signals 211 to 214 are detected by comparator 205.
and the minimum concentration signals 221 to 224 are supplied to the comparator 206.
supply to. The comparator 205 detects the maximum image density [) WaX of the window from the maximum density signals 211 to 214 of the four pixels in each column, and the comparator 206 detects the maximum image density [WaX] of the window from the minimum density signals 221 to 224 of the four pixels in each column. Detect the minimum image density Q akin.

The timing relationship will be explained with reference to FIG.

The window is as shown in FIG.
Also, when the pixel is the ([, J) pixel shown with diagonal lines,
At the first clock of the read clock CLK shown in FIG. 11, the (I-1) of the (J-1) column of the window shown in FIG.
1) Data of 4 pixels from row to (1+2) row is selected by selector 2
The signal is supplied to the comparator 201 via the output ports A3 to AO of 00, and the comparator 201 detects the maximum density signal 211 and minimum density signal 221 of the 4 pixels in column (J-1).

Similarly, at the second clock, the four pixels in the LJ) column of the window are sent to the comparator 202 via the output ports 83 to 80 of the selector 200, and at the third clock, the four pixels in the (J+1) column of the window are sent to the selector 200. 200 output boats 0
3 to CO to the comparator 203, and at the fourth clock, the four pixels of the LJ+2) column of the window are supplied to the comparator 204 via the output ports D3 to Do of the selector 200, and the comparators 202 to 204 respectively (J), (J+1
), LI+2) Maximum density signal 2 of 4 pixels in each column
12-214 and minimum density signals 222-224 are detected. At the fifth clock, the maximum density signal 21 of 4 pixels in each column
1 to 214 are supplied to a comparator 205, and minimum density signals 221 to 224 of four pixels in each column are supplied to a comparator 206. The comparator 205 calculates the maximum density signal @2 of 4 pixels in each column.
Maximum image density of the window from 11 to 214 [)
WaX is detected, and the comparator 206 detects the minimum image density Qn+in of the window from the minimum density signals 221 to 224 of each column pixel. At the sixth clock, comparators 205 and 206 detect the maximum image density D of the window.
max and minimum image density Dmin are supplied to a subtraction circuit 713.

FIG. 12 shows a detailed circuit block diagram of the average value calculation circuit 30, and FIG. 13 shows its timing diagram. 1st
In FIG. 2, selector 300 and counter 307 have the same configuration and function as selector 200 and counter 207 in FIG. 10. Adders 301 to 304 are four-manual adders that output the result of adding four pieces of data, and the outputs are added by adder 305. Note that the adders 301 to 304 each have an 8-bit input and a 10-bit output.
The adder 305 has inputs of 10 bits each.
The output is 12 bits.

In the timing diagram of FIG. 13, CLK is the read clock, 1 is the input/cover of the selector 300, A, B, C
, D are the output ports of the selector 300, and SEO, SEl are the outputs of the counter 307.

Here, similarly to the maximum value/minimum value detection circuit 42, when the relevant pixel is (1, J) and the relevant window is a 4×4 pixel area shown by the broken line in FIG. From the (1-1) row of the (J-1) column shown in Figure 14, (1+2
) is supplied to the adder 301. Similarly, at the second clock, the four pixels in column (J) are transferred to the adder 3.
02, at the 3rd clock, the 4 pixels in the (J+1) column are supplied to the adder 303, and at the 4th clock, the 4 pixels in the (J+2) column are supplied to the adder 304, and each adder calculates the density, which is the sum of the 4 pixels. Summation signals 311-314 are calculated, respectively. 5
The sum of 4 pixels in each column at the clock mark, that is, the adder 301
~304 density summation output 311.312, 313.31
4 is supplied to the adder 305, and the combination thereof is supplied to the adder 305.
is output from. As a result, the adder 305 has calculated the total of 16 pixels of the window shown in FIG. The sum of these 16 pixels is calculated by the divider 30 at the sixth clock.
6, and in this divider 306, the sum of 16 pixels is divided by the normalized signal 16, which is the value of the total number of pixels 16,
The average image density [)a of the window is calculated. This average image density m [)a is divided by the 7th 0th mark in the dividing circuit 44
is supplied to

In the above embodiment, the reference image range is described as a 4×4 predetermined image area, but the present invention is not limited to this, and it is possible to take an image area of any arbitrary range. can. Further, although an example of identification has been shown in units of one pixel, identification may be performed in units of blocks of NXN (where N≧2, a positive integer). Threshold value (Bh
) can be selected from various values. It is also possible to set Bh=Da from the average image density Qa in a predetermined range. Furthermore, a positive or negative tolerance value α may be added to each value, for example, the binarization threshold ah may be set to Bh+α.
For dither thresholds, threshold arrangements other than dot dispersion type,
For example, it may be freely set to a dot concentration type threshold value arrangement.

Furthermore, in this embodiment, the image signal read by the reading means, that is, the image information, is used as the value of the feature m and the determination threshold for identifying character images and photographic images, that is, binary images and non-binary images, from image information. Although a quantity corresponding to the reflectance is used, this quantity may be identified based on the image density, that is, a value converted to the logarithm of the reciprocal of the reflectance, or a converted signal that takes into account human visual characteristics. .

[Effects of the Invention] As described above, according to the present invention, the average sum of squares of the difference between adjacent pixels in information related to image density of image book information is calculated, and the average sum of squares is calculated as Conventionally, information related to one image density is normalized by the average value, and this standard value is compared with a predetermined reference value to identify whether the image information is a binary image or a non-binary image. Even in low-contrast character areas, such as faded characters such as lead II, which have been determined to be photographic areas and have significantly lost their resolution, it is possible to perform appropriate image processing while preserving the resolution, improving image quality and It is possible to improve processing efficiency in various image processing.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an image processing apparatus according to an embodiment of the present invention, FIG. 2 is a detailed block diagram of the image processing apparatus of FIG. 1, and FIG. 3 is a block diagram of an image processing apparatus used in the image processing apparatus of FIG. FIG. 4 is a detailed block diagram of an adjacent pixel density difference square sum value calculation circuit used in the identification circuit of FIG. 3, and FIG. diagram showing,
6 is a diagram showing the adjacent pixel density difference calculated by the adjacent pixel density difference calculation circuit, FIG. 7 is a detailed block diagram of the adjacent pixel density difference calculation circuit of FIG. 4, and FIG. 8 is a diagram showing the adjacent pixel density difference calculation circuit of FIG. 9 is a detailed block diagram of the adder circuit, FIG. 9 is a timing diagram of the identification circuit of FIG. 3, FIG. 10 is a detailed block diagram of the maximum value/minimum value detection circuit used in the image processing device of FIG. Figure 11 is a timing diagram of the maximum value/minimum value detection circuit in Figure 10;
2 is a detailed block diagram of the average value calculation circuit of the identification circuit of FIG. 3, FIG. 13 is a timing diagram of the average value calculation circuit of FIG. 12, and FIG. 14 shows the window area referred to by the identification circuit. 15 is a diagram showing a reference area for smoothing, FIG. 16 is a diagram showing an example of a dither threshold value, and FIG. 17 is a diagram showing an example of a dither threshold value.
The figure is a diagram showing each image area, and FIG. 18 is a schematic diagram showing the image signal level in each image area. 2... Identification circuit 5... First equivalence generation circuit 6... Second Threshold value generation circuit 8...Selection circuit 9...Comparison circuit 30...Average value calculation circuit 33...Dynamic threshold value calculation circuit 40...Smoothing circuit 41...Edge emphasis circuit 42...・Maximum value/minimum value detection circuit 44...Division circuit 45...Comparison circuit

Claims (2)

[Claims] (1) A sum-of-squares average value calculation means for calculating the average sum-of-squares value of differences between adjacent pixels in information related to image density of image information, and a sum-of-squares average value calculated by the sum-of-squares average value calculation means. a detection means for detecting an average value of information related to the image density of the image information; and a calculation for calculating a standard value in which the sum of squares average value of the sum of squares average value calculation means is normalized by the average value of the detection means. and a comparison identification means for comparing the standard value calculated by the calculation means with a predetermined reference value and identifying whether the image information is a binary image or a non-binary image. Image processing device. (2) The sum-of-squares average value calculation means includes a smoothing means for smoothing image information within a predetermined range, an edge emphasis means for emphasizing edges of the smoothed image signal from the smoothing means, and an edge emphasis means. 2. The image processing apparatus according to claim 1, further comprising means for calculating an average value of the sum of squares of density differences between adjacent pixels from image information within a predetermined range of an edge-enhanced image signal.