JPH0697649B2 - Amorphous film semiconductor manufacturing method - Google Patents

Amorphous film semiconductor manufacturing method

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Publication number
JPH0697649B2
JPH0697649B2 JP59250025A JP25002584A JPH0697649B2 JP H0697649 B2 JPH0697649 B2 JP H0697649B2 JP 59250025 A JP59250025 A JP 59250025A JP 25002584 A JP25002584 A JP 25002584A JP H0697649 B2 JPH0697649 B2 JP H0697649B2
Authority
JP
Japan
Prior art keywords
electrode
substrate
layer
chamber
cathode electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP59250025A
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Japanese (ja)
Other versions
JPS61128514A (en
Inventor
善一郎 伊藤
幸四郎 森
孝 有田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
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Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP59250025A priority Critical patent/JPH0697649B2/en
Publication of JPS61128514A publication Critical patent/JPS61128514A/en
Publication of JPH0697649B2 publication Critical patent/JPH0697649B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/0262Reduction or decomposition of gaseous compounds, e.g. CVD
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02532Silicon, silicon germanium, germanium

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Photovoltaic Devices (AREA)

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、非晶質膜半導体、ことに太陽電池などの光デ
バイス用の非晶質膜の製造法の改良に関するものであ
る。
Description: FIELD OF THE INVENTION The present invention relates to improvements in the production of amorphous film semiconductors, especially amorphous films for optical devices such as solar cells.

従来の技術 太陽電池,光センサ等の光半導体デバイスの形成材料と
して、従来から単結晶シリコンをはじめ数種の方式が検
討されてきたが、最近になって使用する材料及びエネル
ギーが少なく経済的であると云う理由から、非晶質シリ
コンを用いるものが注目されている。
2. Description of the Related Art Conventionally, several types of methods including single crystal silicon have been studied as materials for forming optical semiconductor devices such as solar cells and optical sensors, but recently, the materials and energy used are low and economical. For this reason, amorphous silicon is attracting attention.

その製法にはグロー放電法,スパッタ法,熱CVD法など
があるが、現状では低真空チャンバ(反応室)にシラン
および水素などの原料ガスを導入した雰囲気中でグロー
放電を行なって、プラズマを発生させ、このプラズマ中
に生ずる前記ガスの分解生成物(励起状態のSi-H,Si,H,
H2など)を、ガラスなどの基板表面上に化学反応によっ
て、非晶質膜(非晶質シリコン〜a-Si:H)として堆積さ
せる、グロー放電によるプラズマCVD法が、特性,生産
性などの面ですぐれており、実用化されているのはほと
んどこの方式である。
There are glow discharge method, sputtering method, thermal CVD method, etc. as the manufacturing method, but at present, glow discharge is performed in an atmosphere in which a raw material gas such as silane and hydrogen is introduced into a low vacuum chamber (reaction chamber) to generate plasma. The decomposition products of the gas that are generated and generated in this plasma (Si-H, Si, H,
The H 2, etc.), by a chemical reaction on the substrate surface such as glass, amorphous film (amorphous silicon ~a-Si: H) is deposited as, by glow discharge plasma CVD method, the characteristics, productivity, etc. This method is excellent in terms of and is practically used.

第4図は、上記プラズマCVD法により、非晶質シリコン
膜を形成した太陽電池の要部断面を示す一例である。図
において、1は片面に酸化インジュウム錫などの透明電
極2を設けたガラス基板であり、透明電極2の上面にp
層3a,i層(真性層)3b,n層3cの3層から成る非晶質シリ
コン膜3を順次堆積し、その上面にアルミニウム,クロ
ムなどの裏面電極4を蒸着法等で形成したものである。
必要に応じて裏面電極4の上面から、有機もしくは無機
絶縁材により被覆される(図示せず)。光は図示矢印の
ように、ガラス面から透明電極2を通過し、非晶質シリ
コン膜3に入射して起電するようになっている。
FIG. 4 is an example showing a cross section of a main part of a solar cell in which an amorphous silicon film is formed by the plasma CVD method. In the figure, reference numeral 1 is a glass substrate having a transparent electrode 2 such as indium tin oxide on one surface thereof, and p
An amorphous silicon film 3 composed of three layers 3a, i layer (intrinsic layer) 3b, n layer 3c is sequentially deposited, and a back surface electrode 4 of aluminum, chromium or the like is formed on the upper surface thereof by a vapor deposition method or the like. is there.
If necessary, the upper surface of the back electrode 4 is covered with an organic or inorganic insulating material (not shown). Light passes through the transparent electrode 2 from the glass surface and enters the amorphous silicon film 3 to generate electromotive force as indicated by an arrow in the figure.

非晶質シリコン膜3は、光電変換特性を良好にする最適
条件で形成されるが、堆積厚みについては通常屋内外で
使用される民生用太陽電池等ではp-i-n各層の厚みは第
1図の構成例の場合、p層は50〜200Å,i層は3000〜10,
000Å,n層は200〜500Å程度にされている。実験室的に
は、単一チャンバのプラズマCVD装置を用い、原料ガス
を順次入替えて各層を堆積することができる。しかし、
前の工程の雰囲気の影響を受けやすいこと、バッチ式で
あるため生産性が低いなどの理由から、量産用プラズマ
CVD装置としては、p-i-n各層ごとに独立したチャンバ
を、基板を前進させる搬送手段によって、基板を移動さ
せながら、p-i-n各層を順次堆積させる2〜3の方式が
開発された。
The amorphous silicon film 3 is formed under the optimum conditions for improving the photoelectric conversion characteristics. Regarding the deposition thickness, the thickness of each pin layer is generally the same as in FIG. 1 for consumer solar cells used indoors and outdoors. In the case of the example, p layer is 50 ~ 200Å, i layer is 3000 ~ 10,
The 000Å, n layer is about 200 to 500Å. Laboratoryly, a single chamber plasma CVD apparatus can be used to sequentially switch the source gases to deposit each layer. But,
Because it is easily affected by the atmosphere of the previous process, and the productivity is low because it is a batch type plasma, it is a plasma for mass production.
As a CVD apparatus, there have been developed two or three methods in which each pin layer is sequentially deposited while moving the substrate by a transporting means that advances the substrate in an independent chamber for each pin layer.

第5図は、その第1の例の概要を示すブロック図である
(参考:電子通信学会技術研究報告〔電子部品・材料〕
P23,CPM81-83)。図示のものは11-1〜11-5の5室のチャ
ンバからなり、各チャンバ間はゲートバルブ12によって
接続されている。各ゲートバルブは、基板電極15(後
述)がチャンバ間を移動するとき以外は閉じて各チャン
バを独立室にしている。各チャンバには18-1〜18-5で示
す排気管があり、各々真空ポンプに接続され、独立排気
ができる。各チャンバに図示されている基板電極15は、
透明電極2を設けた面を下面側にした基板1(第4図)
を所定枚数収納した金属製のホルダ(枠板)で、グロー
放電を行なう一方の電極となる。各チャンバ間及びチャ
ンバ内には、基板電極15をチャンバ11-1から11-5を出る
まで、順次移動前進させるローラーあるいはチェンな
どの搬送手段が設けられている。
FIG. 5 is a block diagram showing an outline of the first example (reference: IEICE technical report [electronic parts / materials]).
P23, CPM81-83). The illustrated one comprises five chambers 11-1 to 11-5, and the chambers are connected by a gate valve 12. Each gate valve is closed to make each chamber an independent chamber except when a substrate electrode 15 (described later) moves between the chambers. Each chamber has an exhaust pipe indicated by 18-1 to 18-5, which is connected to a vacuum pump to enable independent exhaust. The substrate electrode 15 shown in each chamber is
Substrate 1 with the surface provided with the transparent electrode 2 facing down (FIG. 4)
Is a metal holder (frame plate) that accommodates a predetermined number of cells and serves as one electrode for performing glow discharge. Between the chambers and in the chambers, there is provided a transporting means such as a roller or a chain for sequentially moving and moving the substrate electrode 15 from the chambers 11-1 to 11-5.

上記の基板を収納した複数の基板電極15は、予熱チャン
バ11-1で赤外線ヒーター13により200〜300℃に加熱さ
れ、次いで、ジボラン/シランが0.05〜0.3%のドーピ
ングガスを導入したp層堆積チャンバ11-2に送られ、次
いでシラン単独又は水素,アルゴンなどの希釈ガス等を
加えたガスを導入したノンドープのi層(真性層)堆積
チャンバ11-3に送られ、次いでホスフィン/シランが0.
1〜1%のドーピングガスを導入したn層堆積チャンバ1
1-4に送られ、それぞれ、カソード電極16-2,16-3,16-4
を相手極とし、導線17-2,17-3,17-4に、各チャンバ毎に
独立した高周波電源19-2a,19-3a,19-4a及びプラズマ状
態を調整するマッチング装置19-2b,19-3b,19-4bを接続
し、各々チャンバ毎にプラズマ状態を調整して、所定時
間グロー放電をすることにより、各カソード電極との対
向面上に、それぞれ所定厚さのp-i-nからなる非晶質シ
リコン膜3(第4図)を堆積、形成する。次いで取り出
しチャンバ11-5に送られ、装置外に取り出される。
The plurality of substrate electrodes 15 accommodating the above substrates are heated to 200 to 300 ° C. by the infrared heater 13 in the preheating chamber 11-1 and then p-layer deposition in which a doping gas of 0.05 to 0.3% diborane / silane is introduced. It is sent to the chamber 11-2 and then to the non-doped i-layer (intrinsic layer) deposition chamber 11-3 in which silane alone or a gas to which a diluent gas such as hydrogen or argon is added is introduced. .
N-layer deposition chamber with 1 to 1% doping gas introduced 1
1-4, cathode electrodes 16-2, 16-3, 16-4, respectively
, The conductor 17-2, 17-3, 17-4, the high frequency power source 19-2a, 19-3a, 19-4a independent for each chamber and a matching device 19-2b for adjusting the plasma state, 19-3b and 19-4b are connected, the plasma state is adjusted for each chamber, and glow discharge is performed for a predetermined time, so that non-contact electrodes each having a predetermined thickness are formed on the surface facing the cathode electrode. A crystalline silicon film 3 (FIG. 4) is deposited and formed. Then, it is sent to the take-out chamber 11-5 and taken out of the apparatus.

この間、各チャンバ間の各ゲートバルブ12を開閉しなが
ら、真空引きを行ない、次いで各原料ガスを導入し、次
いでグロー放電を行ない各タイプの非晶質シリコン膜3
を堆積する。各チャンバの14は、各基板を200〜300℃に
加熱する熱板であり、19-2,19-3,19-4は各原料ガスを導
入する導入管を示す。
During this time, while opening and closing the gate valves 12 between the chambers, evacuation is performed, then each source gas is introduced, and then glow discharge is performed to perform each type of amorphous silicon film 3
Deposit. 14 of each chamber is a hot plate for heating each substrate to 200 to 300 ° C., and 19-2, 19-3, 19-4 are introduction pipes for introducing each source gas.

先に述べたように、最適条件におけるp-i-n層の膜厚は
異なり、p〜n層間の差は4〜5倍以内であるが、p,n
層とi層とでは10〜数十倍の差があるため、第5図から
もわかるようにi層(真性層)を堆積するチャンバ11-3
は長くなっており、p,n層を堆積するチャンバ11-2,11-4
のカソード電極の数倍の細長いカソード電極16-3を用
い、数枚の基板電極と対極させて、他のチャンバと比べ
て数倍の堆積時間を確保するようにしている(生産用の
大型のカソード電極では、幅と長さの比を大きくする
と、グロー放電が不安定あるいはできなくなる傾向があ
り、他のチャンバのカソード電極の3〜4倍程度が限界
となる)。従って、他のチャンバの堆積膜厚とのバラン
スをとるには堆積速度も大きくする必要がある。すなわ
ち、第5図の装置においては、チャンバ11-3のカソード
電極16-3の長さを、グロー放電を安定させながら可能な
かぎり長くすると共に、堆積速度を如何に大きくし、堆
積時間を短縮するかが、装置の生産性を高め、生産コス
ト低減に大きく影響すると云える。そのため、原料ガス
の流量,シランと水素,アルゴンなどの希釈ガスの混合
比などを調整し、グロー放電のパワーを大きくするなど
により堆積速度を大きくする検討が為されているが、堆
積速度を大にすると、光電特性から見た非晶質膜の膜質
は低下する傾向にある。その大きな要因の一つとして、
堆積膜厚の偏り(場所によるムラ)がある(参考:日本
真空(株),ULVAC TECHNICAL JOURNAL No.19.P25)。
As described above, the thickness of the pin layer is different under the optimum conditions, and the difference between the p and n layers is within 4 to 5 times, but p, n
Since there is a difference of 10 to several tens of times between the i-layer and the i-layer, as can be seen from FIG. 5, the chamber 11-3 for depositing the i-layer (intrinsic layer)
Is longer, chambers 11-2, 11-4 for depositing p, n layers
The long and narrow cathode electrode 16-3, which is several times as large as that of the cathode electrode, is used as a counter electrode with several substrate electrodes to ensure a deposition time several times that of other chambers. In the cathode electrode, when the width-to-length ratio is increased, the glow discharge tends to be unstable or impossible, and the limit is about 3 to 4 times that of the cathode electrode in other chambers). Therefore, it is necessary to increase the deposition rate in order to balance with the deposited film thickness of other chambers. That is, in the apparatus of FIG. 5, the length of the cathode electrode 16-3 of the chamber 11-3 is made as long as possible while stabilizing the glow discharge, and the deposition rate is increased to shorten the deposition time. It can be said that this will increase the productivity of the device and greatly reduce the production cost. Therefore, it has been studied to increase the deposition rate by adjusting the flow rate of the raw material gas, the mixing ratio of the silane and a dilution gas such as hydrogen and argon, and increasing the power of the glow discharge. When it is set, the quality of the amorphous film as seen from the photoelectric characteristics tends to deteriorate. One of the major factors is
There is a deviation (unevenness depending on location) in the deposited film thickness (Reference: Nippon Vacuum Co., Ltd., ULVAC TECHNICAL JOURNAL No.19.P25).

第7図は上述した第5図の装置のチャンバ11-3に、横幅
55cm,長さ65cmの基板電極15の全面に、ガラス基板(図
示せず)を装着収納したものを長さ方向に3枚送り込
み、横幅55cm,長さ200cmのカソード電極16-3とを対向さ
せ、基板電極の搬送装置(図示せず)を停止させた状態
でグロー放電させ、i層膜を堆積させた場合の長さ方向
の膜厚分布を示したものである。この場合の堆積膜厚目
標は何れも4500Åであり、堆積速度を変えて実験した結
果を図示したものである。A=2.5Å/秒,B=5Å/秒,
C=9Å/秒として、各々の堆積条件を最適化して、堆
積試験を行ない、各部分のi層膜厚を測定した。その結
果、カソード電極の横幅方向については、長さ方向の各
点においてそれぞれの位置の膜厚さの相対厚さムラはA,
B,C何れも±5%以下であった。しかし、カソード電極
の長さ方向で見ると、第7図のように、堆積速度を大に
するほど厚さムラは増大し、目標4500Åに対しA=±7.
5%(±338Å),B=±20%(±900Å),C=±30%(±1
350Å)となっている。
FIG. 7 shows the width of the chamber 11-3 of the apparatus shown in FIG.
Three glass substrates (not shown) mounted and stored on the entire surface of the substrate electrode 15 having a length of 55 cm and a length of 65 cm are fed into the length direction, and the cathode electrode 16-3 having a width of 55 cm and a length of 200 cm is opposed to the cathode electrode 16-3. 3 shows a film thickness distribution in the length direction when glow discharge is carried out with a substrate electrode transport device (not shown) stopped and an i-layer film is deposited. In this case, the target of the deposited film thickness is 4500Å in all cases, and the result of the experiment conducted by changing the deposition rate is illustrated. A = 2.5Å / sec, B = 5Å / sec,
With C = 9Å / sec, each deposition condition was optimized, a deposition test was performed, and the i-layer film thickness of each part was measured. As a result, in the lateral direction of the cathode electrode, the relative thickness unevenness of the film thickness at each position at each point in the length direction is A,
Both B and C were ± 5% or less. However, when viewed in the length direction of the cathode electrode, as shown in FIG. 7, the thickness unevenness increases as the deposition rate increases, and A = ± 7 for the target of 4500Å.
5% (± 338Å), B = ± 20% (± 900Å), C = ± 30% (± 1
350Å).

堆積された膜の状態を見ると、厚さの大なる部分には、
フレーク、粉塵発生等によるピンホールなどの欠陥が散
見され光電特性が低下し、基板面と非晶質膜の密着不良
が発生している。第5図のチャンバ11-3では、実際には
基板電極15は、連続的に前進させられる(図示左方向)
ので、長さ方向の堆積膜厚も見かけ上は平均化されてい
くが、それでも、第7図のB,Cの条件では、グラフから
わかるように、カソード電極16-13の両端部分の堆積速
度が異常に大きく、この部分を基板電極が通過する際に
堆積された非晶質膜部分にはピンホール発生他による光
電特性の低下及び基板面との密着性の弱いものが多くな
る傾向であり、量産上は問題となる。
Looking at the state of the deposited film, in the large part of the thickness,
Defects such as pinholes due to flakes and dust are scattered and the photoelectric characteristics are deteriorated, resulting in poor adhesion between the substrate surface and the amorphous film. In the chamber 11-3 shown in FIG. 5, the substrate electrode 15 is actually continuously advanced (leftward in the drawing).
Therefore, the deposited film thickness in the lengthwise direction is apparently averaged, but even under the conditions of B and C in FIG. 7, as can be seen from the graph, the deposition rate at both ends of the cathode electrode 16-13 is shown. Is abnormally large, and the amorphous film part deposited when the substrate electrode passes through this part tends to have a decrease in photoelectric characteristics due to pinholes, etc. and weak adhesion to the substrate surface. , Is a problem in mass production.

第6図に示した装置は、別の例の概要を示すブロック図
である。図においてi層を堆積するチャンバは21-5,21-
6の2室一対であり、p層を堆積して送りこまれた各基
板電極25は、各々カソード電極26-5,25-6と静止状態で
対向配置され、グロー放電して、i層膜を堆積する。こ
の方式では、各基板電極単位でグロー放電され、結果と
して、第5図のチャンバ11-3で堆積されたi層膜より膜
厚分布が良好で、長さ、横幅方向ともに±10%以内程度
におさまっていた。しかし、この方式では、装置全体が
間欠運転となり、p層,n層を堆積するチャンバも、21-
3,21-4及び21-7,21-8の各2室を必要とし、各々、1室
で放電して膜を堆積し、残り1室で時間待ちをさせるこ
とになる。従ってi層堆積のチャンバ数を増加すれば、
p,n層用のチャンバ数も増加していく必要があり、装置
全体が長大化すること、装置費が高くつくこと、装置の
稼動率が低くなるなど量産上の課題があった。
The apparatus shown in FIG. 6 is a block diagram showing the outline of another example. In the figure, the chamber for depositing the i layer is 21-5, 21-
Each of the substrate electrodes 25, which is a pair of two chambers of 6 and is sent by depositing a p-layer, is arranged to face the cathode electrodes 26-5 and 25-6 in a stationary state, and glow discharges to form an i-layer film. accumulate. In this method, each substrate electrode is glow-discharged, and as a result, the film thickness distribution is better than that of the i-layer film deposited in the chamber 11-3 of FIG. 5, and the length and width directions are within ± 10%. It was settled in. However, with this method, the entire system operates intermittently, and the chamber for depositing the p-layer and the n-layer is 21-
It requires two chambers, each of which is 3,21-4 and 21-7 and 21-8, and discharges in one chamber to deposit a film, and the other one waits for a time. Therefore, if the number of chambers for i-layer deposition is increased,
It is necessary to increase the number of chambers for the p and n layers, and there are problems in mass production, such as an increase in the size of the entire device, a high device cost, and a low operating rate of the device.

発明が解決しようとする問題点 以上のように、組成の異なる原料ガスと複数のチャンバ
を用いて、搬送手段によってチャンバ間を移動する基板
上に、複数層の非晶質膜を連続的に形成するに際し、基
板電極の進行方向に長くした長方形状のカソード電極を
設けたチャンバを用い、グロー放電・プラズマCVD法を
適用した場合は、膜質低下、膜厚さ不均一を伴わずに堆
積速度を上げるのは困難であった。従って、本発明は、
グロー放電させる電極構造を改良することにより、均一
な膜厚さで堆積速度を向上させることを目的とする。
DISCLOSURE OF THE INVENTION Problems to be Solved by the Invention As described above, using a source gas having a different composition and a plurality of chambers, a plurality of amorphous films are continuously formed on a substrate that moves between the chambers by a transfer means. When the glow discharge / plasma CVD method is applied using a chamber provided with a rectangular cathode electrode elongated in the direction of travel of the substrate electrode, the deposition rate can be reduced without deterioration of film quality and uneven film thickness. It was difficult to raise. Therefore, the present invention provides
It is an object of the present invention to improve the deposition rate with a uniform film thickness by improving the electrode structure for glow discharge.

問題点を解決するための手段 本発明は、一つのチャンバ内に、基板電極の進行方向に
長くした長方形状のカソード電極を設けるに際して、そ
の長手方向で複数個に分割し、各分割カソード電極毎に
マッチング装置などグロー放電用装置を配備すると共
に、各分割カソード電極間及び両端に絶縁性の隔離板を
配設して分割した電極毎にプラズマを分離させ、基板電
極を連続移動させながら、分割した各カソード電極面に
順次対向・通過させて、基板電極の基板表面に非晶質膜
を形成させるものである。
Means for Solving the Problems According to the present invention, when a rectangular cathode electrode elongated in the traveling direction of a substrate electrode is provided in one chamber, it is divided into a plurality in the longitudinal direction, and each divided cathode electrode is divided into a plurality of cathode electrodes. In addition to a glow discharge device such as a matching device, an insulating separator is provided between each split cathode electrode and at both ends to separate the plasma for each split electrode and to divide the substrate electrode while continuously moving it. Then, the amorphous film is formed on the substrate surface of the substrate electrode by sequentially facing and passing through each cathode electrode surface.

作用 上記のように、長方形状のカソード電極を複数に分割
し、分割した各電極にグロー放電用装置を配備すると共
に、隔離板を分割電極間及び両端に配設したことによっ
て、グロー放電時に生じるプラズマを分割各電極毎に分
離独立・調整可能とすることができるので、第5図に示
した従来の量産用プラズマCVD装置の問題点となった、
長方形状のカソード電極に基板電極を対向させた場合に
生じる非晶質膜の膜厚分布不均一と、膜質低下現象を大
幅に減少させることができ、早い堆積速度でも基板上
に、均質で膜厚の一定した非晶質膜を堆積することがで
きる。
Function As described above, the rectangular cathode electrode is divided into a plurality of pieces, and the glow discharge device is provided for each of the divided electrodes, and the separators are arranged between the divided electrodes and at both ends, so that the glow discharge occurs. Since the plasma can be separated and adjusted independently for each divided electrode, this has been a problem of the conventional mass production plasma CVD apparatus shown in FIG.
The film thickness distribution of the amorphous film, which occurs when the substrate electrode is opposed to the rectangular cathode electrode, and the deterioration of the film quality can be greatly reduced, and even if the deposition rate is high, the film is homogeneous on the substrate. Amorphous films of constant thickness can be deposited.

実施例 第1図は本発明の製造法による具体例を示す非晶質膜堆
積装置のi層(ノンドープ層)を堆積するチャンバの電
極構成を示すブロック図である。
Example FIG. 1 is a block diagram showing an electrode structure of a chamber for depositing an i layer (non-doped layer) of an amorphous film deposition apparatus showing a specific example by the manufacturing method of the present invention.

この装置ではチャンバ31-2でp層を、31-4でn層を堆積
するが、先に述べたように、太陽電池等の光半導体では
p層,n層の膜厚は、i層の数十分の一であるため、i層
の堆積時間と比べると例えば数十秒〜2分程度の僅かの
時間で堆積できる。従って、p及びn層膜を堆積するチ
ャンバでは通常短いカソード電極を用いて堆積してお
り、堆積した膜厚及び膜質についても問題の無い範囲に
制御できるので、改良の対象としなくてよい。
In this apparatus, a p-layer is deposited in the chamber 31-2 and an n-layer is deposited in 31-4. As described above, in optical semiconductors such as solar cells, the p-layer and the n-layer have the same thickness as the i-layer. Since it is several tenths, it can be deposited in a short time of, for example, several tens of seconds to 2 minutes as compared with the deposition time of the i layer. Therefore, in the chamber for depositing the p and n layer films, deposition is usually performed using a short cathode electrode, and the deposited film thickness and film quality can be controlled within a range that does not cause a problem, and thus it is not necessary to improve the film.

p層を堆積するチャンバ31-2で基板上に120Åの厚さで
p層を堆積し、次いで基板を収納した基板電極35は、ゲ
ートバルブ32を開閉して順次、チャンバ31-3内に送りこ
まれ、同チャンバ内に設けた基板電極搬送装置(後記)
により、所定の堆積速度に応じて、連続的に移動前進さ
せられる。この複数の基板電極に対応して下部にカソー
ド電極を設けるが、本発明では種々実験検討の結果、均
一なプラズマを発生させ、均質で一定した厚さの非晶質
膜を基板上に堆積させるには、カソード電極を分割する
と共に、分割した電極間を隔離手段によって仕切り、プ
ラズマを複数に分離独立させ、個々に安定化させること
が効果的であるとの知見に基づき、図示のように、カソ
ード電極を長さ方向で、36a,36b,36cの如く分割し、各
カソード電極間には、移動する基板電極35に触れず、シ
ラン等のガスの流れを妨げない範囲で、カソード電極毎
の空間を仕切るように、隔離板38を設けると共に、各カ
ソード電極毎に高周波電源40a,40b,40cを用意し、マッ
チング装置39a,39b,39cを介して、グロー放電の状態を
個々に調整可能としてある。なお、もう一方の基板電極
は、すべて共通にアースされている。
A p-layer having a thickness of 120 Å is deposited on the substrate in the chamber 31-2 for depositing the p-layer, and then the substrate electrode 35 accommodating the substrate is sequentially fed into the chamber 31-3 by opening / closing the gate valve 32. Substrate electrode transfer device installed in the same chamber (described later)
Thus, it is continuously moved and advanced according to a predetermined deposition rate. A cathode electrode is provided in the lower part corresponding to the plurality of substrate electrodes, but in the present invention, as a result of various experimental studies, uniform plasma is generated and an amorphous film having a uniform and constant thickness is deposited on the substrate. In addition, based on the knowledge that it is effective to divide the cathode electrode and partition the divided electrodes by a separating means to separate and separate the plasma into a plurality of independent plasmas, and to stabilize them individually, as shown in the figure, The cathode electrode is divided in the lengthwise direction like 36a, 36b, 36c, and between the cathode electrodes, the moving substrate electrode 35 is not touched and the flow of gas such as silane is not hindered. A partition plate 38 is provided to partition the space, and high frequency power supplies 40a, 40b, 40c are prepared for each cathode electrode, and the glow discharge state can be individually adjusted via the matching devices 39a, 39b, 39c. is there. The other substrate electrode is grounded in common.

第2図a及び第2図bに、チャンバ31-3内に設けた分割
カソード電極の中央部のもの36bの側面拡大図及び進行
方向に直角に縦断した拡大図を示している。カソード電
極36bはカソード電極板36b-1,導線37b,カソード電極板3
6b-1の周縁の放電状態を安定化させるための金属製のシ
ールド板36b-2,電極板を固定する絶縁支柱36b-3で構成
され、シールド板36b-2の固定金具36b-4によって、チャ
ンバの床45に固定されている。
2a and 2b show an enlarged side view and an enlarged view taken at a right angle to the advancing direction of the central part 36b of the split cathode electrode provided in the chamber 31-3. The cathode electrode 36b is the cathode electrode plate 36b-1, the lead wire 37b, and the cathode electrode plate 3
6b-1 metal shield plate 36b-2 for stabilizing the discharge state of the periphery, composed of an insulating support 36b-3 for fixing the electrode plate, by the fixing plate 36b-4 of the shield plate 36b-2, It is fixed to the floor 45 of the chamber.

基板電極35は、所定枚数の基板35-1を収納できるよう図
示されていないが格子状に窓あけをしたステンレス鋼製
のホルダに、透明電極をパターニングして設けたガラス
などの基板を、必要に応じてパターンマスクも重ねて、
収納して構成される。この基板電極35は、駆動ローラー
34b,押えローラー34a及び駆動機構から成る基板電極の
搬送装置34によって、所定の定速度で前進させられると
共に、対向するカソード電極36a〜36b〜36cと所定の間
隔を保持して、グロー放電の電極として動作し、カソー
ド電極との対向面35f上に非晶質膜を形成させる。な
お、電極基板のホルダ35の上面には、面ヒーター33を設
け、基板35-1を200〜300℃の一定温度に加熱して、非晶
質シリコン膜の膜質と基板への密着性を確保している。
The substrate electrode 35 is not shown so that a predetermined number of substrates 35-1 can be accommodated, but a glass substrate or the like provided by patterning transparent electrodes on a stainless steel holder with window openings in a grid pattern is required. Depending on the pattern mask,
It is configured to be stored. This substrate electrode 35 is a drive roller
An electrode for glow discharge, which is moved forward at a predetermined constant speed by a substrate electrode transfer device 34 including a pressing roller 34a and a driving mechanism, and is held at a predetermined distance from the facing cathode electrodes 36a to 36b to 36c. And forms an amorphous film on the surface 35f facing the cathode electrode. A surface heater 33 is provided on the upper surface of the holder 35 of the electrode substrate, and the substrate 35-1 is heated to a constant temperature of 200 to 300 ° C. to secure the film quality of the amorphous silicon film and the adhesion to the substrate. is doing.

分割した各カソード電極36a,36b,36cは間隔をあけて設
置され、各電極間及び両端に、図示のように隔離板38を
配設し、固定治具38aを用いて取りつけられる。この隔
離板38は耐熱安定性で、原料ガスと反応性の無い、ガス
発生を生じない絶縁性のセラミック板,耐熱樹脂等を用
いる。隔離板38は先に述べたように、対向する基板電極
の進行及び、原料ガスの流れを妨げない範囲で図示のよ
うに各電極間を十分仕切りできる大きさにする。
The divided cathode electrodes 36a, 36b, 36c are installed with a space between them, and the separators 38 are disposed between the electrodes and at both ends as shown in the figure, and are attached using a fixing jig 38a. The separator 38 is made of an insulating ceramic plate, a heat-resistant resin, or the like, which is heat-stable and has no reactivity with the source gas and does not generate gas. As described above, the separator 38 is sized so that the electrodes can be sufficiently partitioned as shown in the figure within a range that does not hinder the progress of the opposing substrate electrodes and the flow of the source gas.

以上のように構成されたi層を堆積するチャンバ31-3
は、排気管41に接続された真空ポンプにより排気しなが
ら、ガス導入管43より水素で20〜50%に希釈したシラン
をマスフロメータで所定流量に調整して導入する。この
チャンバ内にp層を堆積した基板電極35を、チャンバ31
-2より順次送りこみ、カソード電極36a,36b,36cと第1
図のように対向させながら、高周波電源40a,40b,40cよ
り高周波電流を加えてグロー放電をさせる。
Chamber 31-3 for depositing i-layer configured as described above
Is introduced by adjusting the flow rate of silane diluted with hydrogen to 20 to 50% with a mass flow meter to a predetermined flow rate from a gas introducing pipe 43 while exhausting with a vacuum pump connected to an exhaust pipe 41. The substrate electrode 35 having the p layer deposited in this chamber is replaced with the chamber 31
-Sequentially from 2 to the cathode electrode 36a, 36b, 36c and the first
While facing each other as shown in the figure, a high frequency current is applied from the high frequency power supplies 40a, 40b, 40c to cause glow discharge.

このとき、各マッチング装置39a,39b,39cによって、各
カソード電極36a,36b,36cの上のプラズマ44a,44b,44cが
同一状態になるよう微調整を行なう。なお、上記におい
て、分極カソード電極1基に対し、マッチング装置39及
び高周波電源を各々1基使用しているが、高周波電源は
出力に余裕を持たせた大容量のものを用いて、複数のマ
ッチング装置、分割カソード電極を接続することも可能
である。
At this time, fine adjustment is performed by the matching devices 39a, 39b, 39c so that the plasmas 44a, 44b, 44c on the cathode electrodes 36a, 36b, 36c are in the same state. In the above description, one matching device 39 and one high frequency power source are used for one polarized cathode electrode, but a high capacity power source with a large output is used as the high frequency power source and a plurality of matching devices are used. It is also possible to connect the device and split cathode electrodes.

先に述べたように、原料ガスであるシランの流量,濃度
(希釈ガスとの比率)及びグロー放電の高周波パワーな
どの条件を変えて、第5図に示した従来方法で検討した
堆積条件と同条件にして、非晶質シリコンi層の堆積実
験を行なった。
As described above, the deposition conditions examined by the conventional method shown in FIG. 5 were changed by changing the conditions such as the flow rate and concentration (ratio to the dilution gas) of the source gas, silane, and the high frequency power of glow discharge. Under the same conditions, an amorphous silicon i-layer deposition experiment was performed.

堆積膜厚目標 4500Å 堆積速度 基板電極35はチャンバ31-3内に並んだ状態で停止させ
る(搬送停止)。
Deposition thickness target 4500Å Deposition rate The substrate electrodes 35 are stopped in a state of being lined up in the chamber 31-3 (transport stop).

従来例(第7図)と同様に、カソード電極36a,36b,36c
に対応する各部分のi層膜の膜厚を測定し、その結果を
第3図に示す。図からわかるように、堆積速度5Å/秒
のB′の場合の膜厚バラツキ幅は6.7%(300Å),9Å/
秒のC′の場合は11%(500Å)であった。先に述べた
従来例第7図のB,Cと比べて、膜厚バラツキは大幅に改
善されて均一化されている。またフレーク、粉塵の発生
が微少となり、ピンホールなど膜質を低下させる欠陥発
生率は従来例のAより少なく、光電特性での不良率をB:
B′で1/20以下,C:C′で1/50以下にすることができた。
また基板面と堆積した膜との密着強度も向上し、密着不
良の発生率は従来例のAより小となっている。
Similar to the conventional example (Fig. 7), the cathode electrodes 36a, 36b, 36c
The thickness of the i-layer film in each portion corresponding to was measured, and the results are shown in FIG. As can be seen from the figure, the film thickness variation width for B'at a deposition rate of 5Å / sec is 6.7% (300Å), 9Å /
In the case of C'in seconds, it was 11% (500Å). Compared with B and C of the conventional example shown in FIG. 7 described above, the variation in film thickness is greatly improved and made uniform. In addition, the occurrence rate of defects such as pinholes that deteriorate the film quality due to the minimal generation of flakes and dust is less than that of the conventional example A, and the defective rate in photoelectric characteristics is B:
B'can be reduced to less than 1/20 and C: C 'can be reduced to less than 1/50.
In addition, the adhesion strength between the substrate surface and the deposited film is also improved, and the occurrence rate of adhesion failure is smaller than A in the conventional example.

なお、上記実施例では、分割した1個のカソード電極は
横幅55cm,長さ65cmで、その寸法比は1:1.18であるが、
別に検討した結果によると、本発明に適応できるカソー
ド電極36bの横幅と長さの寸法比率は横幅を1として長
さを0.8〜1.3にするのがよい。この比率よりはずれる
と、堆積した膜厚分布のバラツキ幅は15%以上となり、
実用上問題となる。
In the above embodiment, one divided cathode electrode has a width of 55 cm and a length of 65 cm, and its dimensional ratio is 1: 1.18.
According to the result of another examination, it is preferable that the size ratio of the width and length of the cathode electrode 36b applicable to the present invention is 0.8 to 1.3 with the width being 1. If it deviates from this ratio, the variation width of the deposited film thickness distribution will be 15% or more,
It becomes a problem in practical use.

第3図に示したように、チャンバ31-3において、基板電
極35を移動停止状態で非晶質膜i層を堆積して膜厚分
布,膜質及び膜の密着強度が改良されていることを確認
した後、B′,C′の条件で基板電極の搬送装置34を駆動
し、太陽電池を試作して特性,外観を調べた結果、第7
図に示したA条件の堆積速度で作った従来例の太陽電池
と比べて同等以上の特性及び同等以下の不良率となるこ
とを確認した。
As shown in FIG. 3, in the chamber 31-3, the amorphous film i layer is deposited with the substrate electrode 35 stopped moving to improve the film thickness distribution, film quality, and film adhesion strength. After the confirmation, the carrier device 34 for the substrate electrode was driven under the conditions of B'and C ', and a solar cell was made as a prototype to examine the characteristics and appearance.
It was confirmed that the characteristics were equal to or higher than that of the conventional solar cell prepared at the deposition rate of the condition A shown in the figure, and the defective rate was equal to or lower than that.

なお、従来例第5図のチャンバ11-3のカソード電極16-3
に高周波電源を接続する導線17-3は先端を2本に分岐し
てカソード電極と接続しているが、この分岐した各導線
に、各々マッチング装置19-3b(合計2台)を接続して
調整するようにした場合、電極の長さ方向の(第7図に
おいてカソード電極の長さ0〜200cm)両端のi層膜厚
のバランスは若干補正できるが基本的に平均化すること
はできない。また、本発明の構成第1図において、チャ
ンバ31-3のカソード電極36a,36b,36c各分割電極間に隔
離板38を設けない場合は、グロー放電をさせたときに、
各分割電極が相互干渉し、プラズマ状態は不安定とな
り、本発明の目的を達成することができない。
The cathode electrode 16-3 of the chamber 11-3 shown in FIG.
The lead wire 17-3 for connecting the high-frequency power source is connected to the cathode electrode by branching the tip into two, and each matching wire 19-3b (total of 2 units) is connected to each of the branched lead wires. When adjusted, the balance of the i-layer film thickness at both ends in the electrode length direction (cathode electrode length 0 to 200 cm in FIG. 7) can be slightly corrected, but basically cannot be averaged. In addition, in FIG. 1 of the configuration of the present invention, when the separator 38 is not provided between the divided electrodes of the cathode electrodes 36a, 36b, 36c of the chamber 31-3, when glow discharge is performed,
The divided electrodes interfere with each other and the plasma state becomes unstable, so that the object of the present invention cannot be achieved.

上記実施例においては、基板は複数の比較的小型のガラ
ス板などをステンレス鋼製等の金属ホルダに収納した基
板電極を用いたが、大型の金属基板の場合は、単独で基
板電極としてもよい。またゲートバルブ32(第1図)を
差圧排気バルブに置き換えれば、上述の基板より長尺の
各種基板を用いることも可能である。また実施例では基
板電極とカソード電極を水平に対向させているが、縦形
に対向させる場合でも同様に実施可能である。
In the above-mentioned embodiment, the substrate used is a substrate electrode in which a plurality of relatively small glass plates and the like are housed in a metal holder made of stainless steel or the like, but in the case of a large metal substrate, the substrate electrode may be used alone. . Also, if the gate valve 32 (FIG. 1) is replaced with a differential pressure exhaust valve, various substrates longer than the above substrates can be used. Further, although the substrate electrode and the cathode electrode are opposed to each other in the horizontal direction in the embodiment, they can be similarly applied to the case where they are opposed to each other vertically.

発明の効果 以上述べたように、本発明は、搬送手段により連続的に
移動・前進する基板電極に対向配置される長方形状のカ
ソード電極を、長手方向で複数個に分割し、隔離板を配
設して、分割した電極単位でグロー放電時に発生するプ
ラズマを分離独立・調整させるので、対向するカソード
電極の設置条件による影響を大幅に減少し、大きい堆積
速度でも膜厚が均一で欠陥の非常に少ない非晶質膜を基
板の主表面に形成でき、また基板面との密着強度も安定
向上させることができる。また基板電極あるいは基板を
連続的に送れるので、従来例及び実施例で説明したよう
な、比較的膜厚が厚い非晶質膜を必要とする半導体を作
る場合に、従来装置より、装置全体が長大化することな
く、堆積速度を大きくすることでカバーできるなど非晶
質膜半導体生産上に有用なものである。
EFFECTS OF THE INVENTION As described above, the present invention divides a rectangular cathode electrode, which is arranged to face a substrate electrode which is continuously moved and advanced by a transfer means, into a plurality of pieces in the longitudinal direction, and arranges a separator plate. Since the plasma generated during glow discharge is separated and adjusted separately for each divided electrode unit, the influence of the installation conditions of the facing cathode electrode is significantly reduced, and the film thickness is uniform and the defect A very small amount of amorphous film can be formed on the main surface of the substrate, and the adhesion strength with the substrate surface can be stably improved. Further, since the substrate electrode or the substrate can be continuously fed, when manufacturing a semiconductor that requires an amorphous film having a relatively large film thickness, as described in the conventional example and the example, the entire device can be manufactured more than the conventional device. It is useful for the production of amorphous film semiconductors because it can be covered by increasing the deposition rate without increasing the length.

なお、本発明の実施例では、p-i-n3層の非晶質膜のi層
を厚くする例を述べたが、p,nを厚くする、又は2層の
何れかを厚くする場合でも同様に適応することができ
る。
In addition, in the embodiment of the present invention, the example in which the i layer of the amorphous film of the pi-n3 layer is thickened is described, but the same applies to the case where p, n is thickened or either of the two layers is thickened. Can be adapted.

【図面の簡単な説明】[Brief description of drawings]

第1図は本発明の具体例を示す非晶質膜堆積装置のi層
を堆積するチャンバ内の、電極構成全体を示す要部縦断
面を示すブロック図、第2図aは同電極構成の分割した
中央部の電極の側面拡大図、第2図bは基板電極の進行
方向に直角に縦断した拡大図、第3図は同装置で堆積し
た非晶質膜の膜厚分布を示す図、第4図は本発明の対象
の非晶質シリコン太陽電池の断面構造を示す図、第5図
は第1の従来例の非晶質膜堆積装置の側面を示すブロッ
ク図、第6図は同じく別の従来例を示すブロック図、第
7図は第1の従来例の装置で堆積した非晶質膜の電極の
位置による膜厚分布図である。 31-3……i層を堆積するチャンバ、32……ゲートバル
ブ、34……基板電極の搬送装置、34a……同押えローラ
ー、34b……同駆動ローラー、35……基板電極、35-1…
…基板、35f……基板電極のカソード電極との対向面、3
6a,36b,36c……分割したカソード電極、37a,37b,37c…
…各カソード電極の導線、38……隔離板、38a……隔離
板の固定治具、39a,39b,39c……マッチング装置、40a,4
0b,40c……高周波電源、41……真空ポンプに接続する排
気管、44a,44b,44c……分割電極単位のプラズマ。
FIG. 1 is a block diagram showing a longitudinal cross section of a main part showing an entire electrode structure in a chamber for depositing an i layer of an amorphous film deposition apparatus showing a specific example of the present invention, and FIG. An enlarged side view of the divided central electrode, FIG. 2b is an enlarged view taken at right angles to the direction of travel of the substrate electrode, and FIG. 3 is a diagram showing the film thickness distribution of an amorphous film deposited by the same device. FIG. 4 is a diagram showing a cross-sectional structure of an amorphous silicon solar cell which is a subject of the present invention, FIG. 5 is a block diagram showing a side surface of an amorphous film deposition apparatus of a first conventional example, and FIG. 6 is the same. FIG. 7 is a block diagram showing another conventional example, and FIG. 7 is a film thickness distribution diagram according to the position of the electrode of the amorphous film deposited by the apparatus of the first conventional example. 31-3 ... chamber for depositing i layer, 32 ... gate valve, 34 ... substrate electrode transfer device, 34a ... same pressing roller, 34b ... same driving roller, 35 ... substrate electrode, 35-1 …
… Substrate, 35f… Face of substrate electrode facing cathode electrode, 3
6a, 36b, 36c …… Divided cathode electrodes, 37a, 37b, 37c…
… Conductor of each cathode electrode, 38 …… Separator, 38a …… Separator fixing jig, 39a, 39b, 39c …… Matching device, 40a, 4
0b, 40c …… High frequency power supply, 41 …… Exhaust pipe connected to a vacuum pump, 44a, 44b, 44c …… Plasma for each split electrode unit.

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】複数のチャンバ間を搬送装置34によって連
続的に移動する基板電極35に対向するように各チャンバ
内にカソード電極を配設した装置を用い、各チャンバ内
にそれぞれ所定組成の原料ガスを導入し、 次いで、基板電極と各カソード電極間に接続、調整する
ようにしたグロー放電用装置によってグロー放電を行な
い、発生したプラズマ中の分解生成物を、移動する基板
電極の基板35-1上に、複数層の非晶質膜として堆積形成
させるに際し、前記複数層の非晶質膜の特定の層を、他
の層と比べて厚く堆積する手段として、該当チャンバ
(31-3)内のカソード電極を基板電極の進行方向に長く
した長方形状とするものにおいて、 上記長方形状のカソード電極を長手方向で複数個に分割
すると共に、分割した各カソード電極36a,36b,36c間及
び両端に絶縁性の隔離板38を配設して、分割電極毎にプ
ラズマを分離し、 上記基板電極35を連続移動させながら、各々マッチング
装置などのグロー放電用装置を接続した各分割カソード
電極36a,36b,36c面を順次通過させて、基板電極35の基
板35-1の面上に、一つの層の非晶質膜を形成することを
特徴とする非晶質半導体の製造法。
1. A raw material having a predetermined composition is used in each chamber by using a device in which a cathode electrode is provided in each chamber so as to face a substrate electrode 35 that continuously moves between a plurality of chambers by a transfer device. Gas is introduced, and then glow discharge is performed by a glow discharge device that is connected and adjusted between the substrate electrode and each cathode electrode, and the decomposition products in the generated plasma are transferred to the substrate 35- When depositing and forming a plurality of amorphous films on one layer, as a means for depositing a specific layer of the plurality of amorphous films thicker than other layers, the corresponding chamber (31-3) In the rectangular shape in which the cathode electrode inside is elongated in the traveling direction of the substrate electrode, the rectangular cathode electrode is divided into a plurality of pieces in the longitudinal direction, and the divided cathode electrodes 36a, 36b, 36c are arranged between and at both ends. Insulating separator 38 is provided to separate the plasma for each divided electrode, and while continuously moving the substrate electrode 35, each divided cathode electrode 36a connected to a glow discharge device such as a matching device, A method for producing an amorphous semiconductor, characterized in that one layer of an amorphous film is formed on the surface of the substrate 35-1 of the substrate electrode 35 by sequentially passing through the surfaces 36b, 36c.
【請求項2】上記カソード電極を分割するに際し、分割
した1個の電極の横幅と長さの寸法比率を横幅を1とし
て長さを0.8〜1.3とした特許請求の範囲第1項記載の非
晶質半導体の製造法。
2. When the cathode electrode is divided, the dimensional ratio of the width and length of one divided electrode is 0.8 to 1.3 with the width being 1 and the length is 0.8 to 1.3. Method for manufacturing crystalline semiconductor.
JP59250025A 1984-11-27 1984-11-27 Amorphous film semiconductor manufacturing method Expired - Fee Related JPH0697649B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59250025A JPH0697649B2 (en) 1984-11-27 1984-11-27 Amorphous film semiconductor manufacturing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59250025A JPH0697649B2 (en) 1984-11-27 1984-11-27 Amorphous film semiconductor manufacturing method

Publications (2)

Publication Number Publication Date
JPS61128514A JPS61128514A (en) 1986-06-16
JPH0697649B2 true JPH0697649B2 (en) 1994-11-30

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JP59250025A Expired - Fee Related JPH0697649B2 (en) 1984-11-27 1984-11-27 Amorphous film semiconductor manufacturing method

Country Status (1)

Country Link
JP (1) JPH0697649B2 (en)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4679051B2 (en) * 2003-11-26 2011-04-27 株式会社カネカ CVD equipment

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4438723A (en) * 1981-09-28 1984-03-27 Energy Conversion Devices, Inc. Multiple chamber deposition and isolation system and method

Also Published As

Publication number Publication date
JPS61128514A (en) 1986-06-16

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