JPH0697538B2 - Digital signal recording / reproducing device - Google Patents

Description

The present invention relates to digital signal recording / reproducing, and more particularly to a digital signal recording / reproducing apparatus suitable for recording and reproducing by the same apparatus.

[Conventional technology]

As one of digital signal recording / reproducing systems, Japanese Patent Laid-Open No. 58-12
There is a rotary head type PCM recorder as described in 2606. The method using such a rotary head is characterized in that the track width can be narrowed and the areal recording density can be improved. When recording / reproducing using a rotary head, a recording / reproducing head is generally used, and recording / reproducing is performed by switching this head.

[Problems to be solved by the invention]

In the above-mentioned conventional technique, the output signal from the recording circuit and the reproduction signal from the head are present at the same time in the switching circuit for performing reproduction, particularly for switching the head. The output signal from the recording circuit is not connected to the head during playback, but the signal level is much higher than that of the playback signal, so leakage may affect the playback signal and increase data errors during playback. There is a problem of doing.

An object of the present invention is to prevent an abnormal recording signal from being recorded and to prevent the output signal of the recording circuit from leaking into the reproduction signal in the switching circuit.

[Means for solving problems]

The above object can be achieved by providing a gate circuit in the recording section of the digital signal processing circuit so that the recording signal is output after a predetermined time during recording and the recording signal is not output during reproduction.

[Action]

The gate circuit is controlled by a recording / reproduction switching signal,
During recording, the recording signal is output as it is after a certain time from the recording state, and during reproduction, a fixed value is output. As a result, an abnormal signal before the generation of the recording signal in the signal processing circuit is not recorded during recording, and the output signal of the recording circuit is not input to the switching circuit of the head during reproduction. The output signal of the recording circuit does not leak into the signal.

Example of Invention

 An embodiment of the present invention will be described below with reference to FIG.

FIG. 1 shows a PCM signal recording / reproducing apparatus which records or reproduces a PCM signal by a recording / reproducing switching signal inputted from an input terminal 28. First, the case of recording will be described.

During recording, the analog signal input from input terminal 26
It is converted into a PCM signal by the A / D converter 25. The input signal may be a PCM signal output from another PCM signal reproducing device or a digital signal other than the PCM signal. In this case, the A / D converter 25 is unnecessary. This is the same when outputting. The PCM signal converted by the A / D converter 25 is written in the RAM 21 through the bus line 20. RAM21 at this time
The write address of is generated by the input / output address generation circuit 17. Incidentally, when the PCM signal is written in the RAM 21, the recording signal can be monitored from the output terminal 27 by simultaneously inputting it to the D / A converter 24 through the error correction circuit 23. At this time, the error correction circuit 23 may be controlled so as not to operate.

The PCM signal written in RAM21 is corrected address generation circuit 16
Is read according to the address generated by the bus line 20
Is input to the error correction circuit 22 to generate an error correction code. That is, the error correction circuit 22 generates an error correction code at the time of recording and corrects an error in the reproduction signal by the error correction code at the time of reproduction. The error correction circuit 22 generates an error correction code based on the input PCM signal, and writes the generated error correction code in the RAM 21.

After the generation of the error correction code, the PCM signal and the error correction code recorded in the RAM 21 are read according to the address generated by the recording / reproducing address generation circuit 11, and the recording circuit is read through the bus line 20 and the interface circuit 6. Input to 5. The recording circuit 5 adds and modulates synchronization signals, control signals, and the like. And the recording amplifier 4
After being amplified by, the data is recorded on the magnetic tape 1 by the rotary head 2. The rotary head 2 is mounted on the cylinder 18
It is composed of two heads, A and B, which are mounted facing each other at 0 °. The magnetic tape 1 is wound around a cylinder, and the winding angle is usually 180 ° or less, for example 90 °. Then, a signal is recorded when the head comes over the magnetic tape.

The timing generation circuit 15 generates a timing signal for controlling each part by a clock oscillated by the oscillation circuit 14. The oscillation frequency of the oscillator circuit 14 is selected to be an integral multiple of the sampling frequency of the PCM signal. The oscillator circuit 10 oscillates a clock having a frequency corresponding to the transmission rate of the recording signal. Then, the PCM signal and the error correction code are sequentially recorded according to this clock. The switching circuits 18 and 19 switch the address of the RAM 21. Further, the servo circuit 13 controls the rotational phase of the rotary head 2. The position detection circuit 12 detects the phase of the cylinder by the reference signal indicating the position of the cylinder. Then, the recording timing is determined according to this reference signal.

The gate circuit 29 is a circuit that gates a recording signal output from the recording circuit 5 during reproduction, and outputs a recording signal during recording and 0 during reproduction. The switching circuit 3 is a switching circuit for the head, which outputs a recording signal to the rotary head 2 during recording and reproduces a reproduction signal from the head during reproduction.
Output to. As described above, by providing the gate circuit 29 at the output of the digital circuit on the recording circuit side of the switching circuit 3, it is possible to eliminate the influence of leakage of the recording signal during reproduction.

The recording signal can be gated by stopping the operation of the recording circuit 5.

FIG. 2 shows a recording pattern on the magnetic tape 1. 30 is 1
Shows the track of a book. On one track, a PCM signal and an error correction code are recorded by being divided into a plurality of blocks, for example, 128 blocks. FIG. 3 shows the structure of one block. Reference numeral 31 is a synchronization signal, 32 is a control signal related to the PCM signal, 33 is a block address indicating the order of the block, and 34 is a PCM signal and an error correction code.

FIG. 4 shows the timing of inputting a PCM signal during recording, generating an error correction code, and recording. 35 is A / D converter 2
5, the write timing to the RAM 21; 36, the timing for generating the error correction code; 37, the reference signal of the servo circuit 13; 38, the position detection signal of the rotary head 2; 39, the read timing from the RAM 21 to the recording circuit 5; Is the recording timing on the magnetic tape. The numbers 35, 36 and 39 indicate the recording areas of the RAM 21. That is, the RAM 21 has a capacity for storing PCM signals and error correction codes for four tracks, and has a first area, a second area, a third area, and a fourth area, respectively. A and B in 40 indicate recording heads. Writing from the A / D converter 25 to the RAM 21 is performed at a constant cycle according to the sampling frequency. For example, if the sampling frequency of the PCM signal is set to 48 KHz and the PCM signal of 2 channels is recorded, it is necessary to write once in about 10 μsec. Here, assuming that the access frequency of the RAM 21 is 64 times the sampling frequency, that is, 3.072 MHz, and a PCM signal with a quantization bit number of 16 bits is written in 8-bit units, writing is performed twice in 32 accesses. There is a need to do. Writing from the A / D converter 25 to the RAM 21 is performed by rotating the rotary head once (360 °) in the first and second areas as shown at 35, and by the next one rotation, third and fourth.
Will be written to the area. At this time, as shown by 36, an error correction code is generated for the PCM signal written in the first and second areas in the previous rotation. For the PCM signals written in the third and fourth areas, the error correction code is similarly generated in the next one rotation. After the error correction code is generated, the PCM signal and the error correction code are read from the RAM 21 at the timing of 39, and the magnetic tape 1 is read at the timing of 40.
Recorded above. The recording timing is determined based on the position detection signal 38. The position detection signal 38 indicates the position where the rotary head is at 0 ° (the position where the head A starts scanning the magnetic tape 1). The servo circuit 13 controls the rotation phase of the rotary head 2 so that the falling edge of the reference signal 37 generated by the timing generation circuit 15 and the position detection signal 38 match. Then, the recording / reproducing address generation circuit 11 determines the recording timing with reference to the position detection signal 38, and RA
Reads PCM signal and error correction code from M21. This reading is performed at a frequency corresponding to the recording rate oscillated by the oscillator circuit 10. The position of the position detection signal 38 is
It may be at a position other than 0 °. Further, although the error correction code generation timing 36 and the recording read timing 39 partially overlap, if the error correction code generation order and the recording order are matched, the PCM signal already recorded at the time of recording There is no problem because the generation of the error correction code is completed.

Next, a case of performing reproduction in the PCM signal recording / reproducing apparatus of FIG. 1 will be described.

During reproduction, the switching circuit 3 is switched to the reproducing side by the recording / reproducing switching signal input from the input terminal 28, and the reproducing signal reproduced by the rotary head 2 is amplified and waveform equalized by the reproducing amplifier 7. It is input to the reproduction circuit 8. The recording / reproduction switching signal also switches the operation timing of the RAM 21, switches the operation of the error correction circuit 22, and prohibits the operation of the A / D converter 25.

The reproduction circuit 8 demodulates the PCM signal and the error correction code and detects the synchronization signal and the control signal. The PCM signal demodulated by the reproduction circuit 8 and the error correction code are written in the RAM 21 via the interface circuit 9 and the bus line 20. The address of the RAM 21 at the time of writing is generated by the recording / reproducing address generating circuit 11 with reference to the block address in the synchronizing signal and the reproducing signal detected by the reproducing circuit 8.

The PCM signal and the error correction code written in the RAM 21 are read according to the address generated by the correction address generation circuit 16 and input to the error correction circuit 22 through the bus line 20 to perform error correction. PCM corrected by the error correction circuit 22
The signal is written to RAM21 again.

The error-corrected PCM signal is read from the RAM 21 according to the address generated by the input / output address generation circuit 17, and input to the error correction circuit 23 through the bus line 20. The error correction circuit 23 performs error correction such as average value interpolation for replacing the error that cannot be corrected with the average value of the preceding and following values, and outputs it to the D / A converter 24. And D / A converter
It is converted to an analog signal at 24 and output from the output terminal 27.
The reproduced PCM signal may be directly output to another PCM device without being converted into an analog signal.

Recording / reproducing address generation circuit 11, correction address generation circuit 16
In addition, since the address generated at the time of recording and the address generated at the time of reproduction are the same, the same circuit can be used at the time of recording and reproduction.

FIG. 5 shows the timing of signal reproduction, error correction, and PCM signal output during reproduction. 70 is a reproduction timing from the magnetic tape 1, 71 is a writing timing from the reproducing circuit 8 to the RAM 21, 72 is an error correction timing, and 73 is a RAM 21.
This is the read timing to the error correction circuit 23. The reproduction of the signal from the magnetic tape 1 is performed in synchronization with the reference signal 37. Then, at the timing 71, the first to the fourth of the RAM 21
The areas are sequentially written. Error correction is performed at timing 72 for the reproduction signal written in the RAM 21. Although the timing of writing the reproduced signal and the timing of error correction partially overlap, there is no problem if the order of reproduction and the order of error correction are matched. The error-corrected PCM signal is output by one rotation (360 °) of the next rotary head.

The switching timing of the switching circuits 18 and 19 may be the same as during recording.

FIG. 6 shows an example of the structure of the gate circuit 29. 80 is a shift register, and 81 and 82 are AND circuits. Also, input terminal 83
Is an input terminal of a recording signal from the recording circuit 5, an output terminal 86 is an output terminal of a recording signal to the recording amplifier 4, an input terminal 84 is an input terminal of a recording / reproducing switching signal, and an input terminal 85 is a shift clock of a shift register 80. It is an input terminal. Here, the recording / reproduction switching signal is recorded when it is 1 and reproduced when it is 0. As the shift clock of the shift register 80, the reference signal 37 shown in FIG. 4 is used. Other signals may be used as long as they are signals of similar timing, that is, signals that change in the vicinity of the 0 ° position of the rotary head. The shift register 80 shifts at the falling edge of the clock.

The operation will be described below with reference to the timing chart of FIG. In the figure, 87 is a recording / reproducing switching signal, 88 is an AND circuit 81
Shows the output of. During reproduction, the output of the AND circuit 81 is 0, and no recording signal is output. When the reproduction is changed to the recording, that is, when 87 is changed from 0 to 1, the output of the shift register 80 becomes 1 with a delay. At that time, the output of the AND circuit 81 becomes 1 and the recording signal is output. As can be seen from Fig. 4, the A / D converter 25
The signal input to is output from the recording circuit 5 with a delay of one rotation. Therefore, the recording signal output immediately after switching from reproduction to recording is not a normal recording signal. Here, in consideration of the switching time of the timing circuit after switching, the output of the recording signal is started after two revolutions from recording. When recording changes to reproduction, that is, when the recording / reproduction switching signal changes from 1 to 0,
The output of the AND circuit 81 immediately becomes 0 and the output of the recording signal is stopped.

As described above, by stopping the output of the recording signal from the digital circuit during reproduction, it is possible to prevent the recording signal from leaking out and affecting the reproduction circuit.
Further, by delaying the start of output of the recording signal at the start of recording, it is possible to prevent recording of an abnormal signal.

EFFECTS OF THE INVENTION According to the present invention, during recording, an abnormal signal is recorded before the generation of the recording signal in the signal processing circuit is completed, and the signal output from the recording circuit is reproduced in the reproducing circuit. It is possible to prevent the reproduction signal from deteriorating by degrading.

[Brief description of drawings]

FIG. 1 is a configuration diagram of an embodiment of a PCM signal recording / reproducing apparatus of the present invention, FIG. 2 is a recording pattern diagram on a magnetic tape, FIG. 3 is a block configuration diagram, FIG. 4 is a timing diagram at the time of recording, FIG. 5 is a timing diagram at the time of reproduction, FIG. 6 is a block diagram of the gate circuit, and FIG. 7 is a timing diagram showing the operation of the gate circuit. 2 ... Rotating head, 3 ... switching circuit, 4 ... recording amplifier, 7 ... reproducing amplifier, 5 ... recording circuit, 6,9 ... interface circuit, 8 ... reproducing circuit, 10,14 ... oscillation Circuit, 11 ... Recording / reproducing address generation circuit, 15 ... Timing generation circuit, 16 ... Correction address generation circuit, 17 ... Input / output address generation circuit, 18, 19 ... Switching circuit, 21 ... RAM, 22 ... Error correction circuit, 23 error correction circuit, 24 D / A converter, 25 A / D converter, 80 shift register, 81, 82 AND circuit.

Claims (1)

[Claims] 1. A digital signal processing circuit for generating a recording signal by performing a predetermined process on an input digital signal at the time of recording and generating a digital signal from the reproduction signal at the time of reproduction, and the recording signal at a predetermined value. A recording amplifier that amplifies the reproduced signal, a reproduction amplifier that amplifies and equalizes the reproduced signal to the digital signal processing circuit, a head that records or reproduces on a recording medium, and an output of the recording amplifier when recording. In a digital signal recording / reproducing apparatus comprising a switching circuit for inputting to the head and for reproducing, the signal reproduced from the head is inputted to the reproducing amp, the recording signal generated by the digital signal processing circuit is
Output of the recording signal to the recording amplifier is started after a certain period of time after the signal processing circuit is in the recording state, and output of the recording signal to the recording amplifier is stopped when the recording signal processing circuit is in the reproducing state. A digital signal recording / reproducing apparatus characterized in that a gate circuit is provided.