JPH0697323A - Semiconductor integrated circuit device - Google Patents
Semiconductor integrated circuit deviceInfo
- Publication number
- JPH0697323A JPH0697323A JP4245384A JP24538492A JPH0697323A JP H0697323 A JPH0697323 A JP H0697323A JP 4245384 A JP4245384 A JP 4245384A JP 24538492 A JP24538492 A JP 24538492A JP H0697323 A JPH0697323 A JP H0697323A
- Authority
- JP
- Japan
- Prior art keywords
- heat
- package
- heat dissipation
- die pad
- resin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、半導体集積回路装置に
関し、特に、半導体チップを封止するＬＳＩパッケージ
の放熱性の改善に適用して有効な技術に関するものであ
る。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor integrated circuit device, and more particularly to a technique effectively applied to improve heat dissipation of an LSI package for sealing a semiconductor chip.
【０００２】[0002]
【従来の技術】近年、ＱＦＰ(Quad Flat Package) など
の樹脂封止型ＬＳＩパッケージは、ＬＳＩの高集積化、
高速化に伴って半導体チップの発熱量が増大しているた
め、放熱性の改善が重要な課題となっている。2. Description of the Related Art In recent years, resin-sealed LSI packages such as QFP (Quad Flat Package) have been developed for higher integration of LSI.
Since the heat generation amount of the semiconductor chip is increasing with the increase in speed, improvement of heat dissipation is an important issue.
【０００３】このような放熱性改善対策の一つに、パッ
ケージ本体の底面に金属製の放熱板を接合するものがあ
る。これは、半導体チップを搭載したダイパッドの裏面
に放熱板を貼り付けてその裏面をパッケージ本体の底面
に露出させ、この放熱板とダイパッドとを通じて半導体
チップの熱を外部に逃がすようにしたものである。One of such measures for improving heat dissipation is to join a metal heat dissipation plate to the bottom surface of the package body. In this, a heat sink is attached to the back surface of a die pad on which a semiconductor chip is mounted, the back surface is exposed on the bottom surface of the package body, and the heat of the semiconductor chip is released to the outside through the heat sink and the die pad. .
【０００４】[0004]
【発明が解決しようとする課題】しかしながら、パッケ
ージ本体の底面に金属製の放熱板を接合する前記従来技
術は、パッケージ本体と放熱板との界面剥離などに起因
してパッケージ本体の底面から水分が内部に浸入し易
く、信頼性に問題があった。However, in the above-mentioned prior art in which a metal heat sink is joined to the bottom surface of the package body, moisture is removed from the bottom surface of the package body due to interface separation between the package body and the heat sink. It was easy to get inside and there was a problem with reliability.
【０００５】そこで、本発明の目的は、樹脂封止型ＬＳ
Ｉパッケージの耐湿性を低下させることなく、放熱性を
向上させることのできる技術を提供することにある。Therefore, an object of the present invention is to provide a resin-sealed LS.
It is an object of the present invention to provide a technique capable of improving heat dissipation without lowering the moisture resistance of the I package.
【０００６】本発明の前記ならびにその他の目的と新規
な特徴は、本明細書の記述および添付図面から明らかに
なるであろう。The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.
【０００７】[0007]
【課題を解決するための手段】本願において開示される
発明のうち、代表的なものの概要を簡単に説明すれば、
次のとおりである。Among the inventions disclosed in the present application, a brief description will be given to the outline of typical ones.
It is as follows.
【０００８】本発明の樹脂封止型ＬＳＩパッケージは、
半導体チップを搭載したダイパッドの裏面に貫通孔を設
けて該貫通孔内に液状ないしゲル状の放熱材を充填する
と共に、パッケージ本体の底面に放熱板を接合したもの
である。The resin-sealed LSI package of the present invention is
A through hole is provided in the back surface of a die pad on which a semiconductor chip is mounted, a liquid or gel heat radiating material is filled in the through hole, and a heat radiating plate is joined to the bottom surface of the package body.
【０００９】[0009]
【作用】上記した手段によれば、半導体チップの熱をダ
イパッド、放熱材および放熱板を通じて外部に逃がすこ
とができるので、放熱性の高い樹脂封止型ＬＳＩパッケ
ージを提供することができる。According to the above-mentioned means, the heat of the semiconductor chip can be released to the outside through the die pad, the heat radiating member and the heat radiating plate, so that the resin-sealed LSI package having high heat radiating property can be provided.
【００１０】また、ダイパッドと放熱板との間に放熱材
を充填した貫通孔を設けたことにより、パッケージ本体
底面からの水分の浸入経路が長くなり、耐湿性の低下が
防止される。Further, since the through hole filled with the heat radiation material is provided between the die pad and the heat radiation plate, the moisture infiltration path from the bottom surface of the package body is lengthened, and the deterioration of the moisture resistance is prevented.
【００１１】[0011]
【実施例】以下、本発明の一実施例である樹脂封止型Ｌ
ＳＩパッケージの構成を図１を用いて説明する。EXAMPLE A resin-sealed type L which is an example of the present invention will be described below.
The configuration of the SI package will be described with reference to FIG.
【００１２】本実施例の樹脂封止型ＬＳＩパッケージ１
は、合成樹脂の成型体からなるパッケージ本体２の底面
に放熱板３が接着剤４により接合されている。半導体チ
ップ５を搭載したダイパッド６の裏面には、貫通孔７が
設けられており、この貫通孔７内には、ゲル状の放熱材
８が充填されている。半導体チップ５の電極パッド９と
リード１０との間には、Ａｕのワイヤ１１がボンディン
グされている。Resin-sealed LSI package 1 of this embodiment
The heat dissipation plate 3 is bonded to the bottom surface of the package body 2 made of a synthetic resin molded body with an adhesive 4. A through hole 7 is provided on the back surface of the die pad 6 on which the semiconductor chip 5 is mounted, and the through hole 7 is filled with a gel-like heat dissipation material 8. An Au wire 11 is bonded between the electrode pad 9 and the lead 10 of the semiconductor chip 5.
【００１３】上記放熱板３、ダイパッド６およびリード
１０は、Ｃｕなどの高熱伝導性金属で構成されている。
また、貫通孔７内の放熱材８は、Ｃｕ、Ａｌなどの高熱
伝導性金属粉末を混入したシリコーンゲルで構成されて
いる。なお、放熱材８は、熱伝導性が良く、吸湿性の低
い液状ないしゲル状の物質であれば、金属粉末を混入し
たシリコーンゲルに限定されるものではない。The heat radiating plate 3, the die pad 6 and the leads 10 are made of high heat conductive metal such as Cu.
Further, the heat dissipation material 8 in the through hole 7 is made of silicone gel mixed with highly heat conductive metal powder such as Cu and Al. The heat dissipating material 8 is not limited to silicone gel mixed with metal powder as long as it is a liquid or gel substance having good thermal conductivity and low hygroscopicity.
【００１４】上記ＬＳＩパッケージ１を組み立てるに
は、常法によりダイパッド６上にＡｇペーストなどを用
いて半導体チップ５を接合した後、電極パッド９とリー
ド１０との間にワイヤ１１をボンディングし、続いてト
ランスファモールドによりパッケージ本体２を成形す
る。ダイパッド６の裏面の貫通孔７は、このとき同時に
形成する。その後、貫通孔７内に放熱材８を充填した
後、パッケージ本体２の底面に放熱板３を接合する。To assemble the LSI package 1, the semiconductor chip 5 is bonded onto the die pad 6 using Ag paste or the like by a conventional method, and then the wire 11 is bonded between the electrode pad 9 and the lead 10. And the package body 2 is molded by transfer molding. The through holes 7 on the back surface of the die pad 6 are simultaneously formed at this time. After that, after filling the through hole 7 with the heat dissipation material 8, the heat dissipation plate 3 is bonded to the bottom surface of the package body 2.
【００１５】上記のように構成された本実施例によれ
ば、半導体チップ５の熱をダイパッド６、放熱材８およ
び放熱板３を通じて外部に逃がすことができるので、放
熱性の高い樹脂封止型ＬＳＩパッケージ１を提供するこ
とができる。According to the present embodiment configured as described above, the heat of the semiconductor chip 5 can be released to the outside through the die pad 6, the heat radiating material 8 and the heat radiating plate 3. The LSI package 1 can be provided.
【００１６】また、ダイパッド６と放熱板３との間に放
熱材８を充填した貫通孔７を設けたことにより、ダイパ
ッドの裏面に放熱板を直接接合する従来技術に比べてパ
ッケージ本体２底面からの水分の浸入経路が長くなるた
め、耐湿性の低下が防止され、信頼性の高い樹脂封止型
ＬＳＩパッケージ１を提供することができる。Further, since the through hole 7 filled with the heat dissipation material 8 is provided between the die pad 6 and the heat dissipation plate 3, as compared with the conventional technique in which the heat dissipation plate is directly bonded to the back surface of the die pad, Since the moisture infiltration path becomes long, it is possible to provide the highly reliable resin-sealed LSI package 1 in which the moisture resistance is prevented from being deteriorated.
【００１７】さらに、ＬＳＩパッケージ１を半田リフロ
ーによって基板に実装する際の熱ストレスなどに起因す
る応力を貫通孔７内に充填したゲル状の放熱材８が吸収
するので、パッケージクラック耐性の向上した樹脂封止
型ＬＳＩパッケージ１を提供することができる。Further, the gel-shaped heat radiating material 8 filled in the through holes 7 absorbs the stress caused by the thermal stress when the LSI package 1 is mounted on the substrate by the solder reflow, so that the package crack resistance is improved. It is possible to provide the resin-sealed LSI package 1.
【００１８】以上、本発明者によってなされた発明を実
施例に基づき具体的に説明したが、本発明は前記実施例
に限定されるものではなく、その要旨を逸脱しない範囲
で種々変更可能であることはいうまでもない。Although the invention made by the present inventor has been specifically described based on the embodiments, the present invention is not limited to the embodiments and various modifications can be made without departing from the gist thereof. Needless to say.
【００１９】[0019]
【発明の効果】本願によって開示される発明のうち、代
表的なものによって得られる効果を簡単に説明すれば、
以下の通りである。The effects obtained by the typical ones of the inventions disclosed in this application will be briefly described as follows.
It is as follows.
【００２０】半導体チップを搭載したダイパッドの裏面
に貫通孔を設けて該貫通孔内に液状ないしゲル状の放熱
材を充填すると共に、パッケージ本体の底面に放熱板を
接合したことにより、樹脂封止型ＬＳＩパッケージの耐
湿性を低下させることなく、放熱性を向上させることが
できる。By forming a through hole in the back surface of the die pad on which the semiconductor chip is mounted, filling the through hole with a liquid or gel heat radiating material, and by bonding a heat radiating plate to the bottom surface of the package body, resin sealing is performed. The heat dissipation can be improved without lowering the moisture resistance of the die LSI package.
【図面の簡単な説明】[Brief description of drawings]
【図１】本発明の一実施例であるＬＳＩパッケージを示
す断面図である。FIG. 1 is a cross-sectional view showing an LSI package that is an embodiment of the present invention.
１ 樹脂封止型ＬＳＩパッケージ ２ パッケージ本体 ３ 放熱板 ４ 接着剤 ５ 半導体チップ ６ ダイパッド ７ 貫通孔 ８ 放熱材 ９ 電極パッド １０ リード １１ ワイヤ 1 Resin Sealed LSI Package 2 Package Body 3 Heat Sink 4 Adhesive 5 Semiconductor Chip 6 Die Pad 7 Through Hole 8 Heat Dissipator 9 Electrode Pad 10 Lead 11 Wire
───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.5 識別記号 庁内整理番号 ＦＩ 技術表示箇所 Ｈ０１Ｌ 23/36 Ｈ０１Ｌ 23/36 Ｃ ─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. 5 Identification code Internal reference number FI Technical indication H01L 23/36 H01L 23/36 C
Claims (3)
面に設けた貫通孔内に液状ないしゲル状の放熱材を充填
すると共に、パッケージ本体の底面に放熱板を接合した
ことを特徴とする半導体集積回路装置。1. A semiconductor integrated circuit characterized in that a through hole provided on the back surface of a die pad on which a semiconductor chip is mounted is filled with a liquid or gel heat dissipation material, and a heat dissipation plate is bonded to the bottom surface of the package body. apparatus.
コーンゲルであることを特徴とする請求項１記載の半導
体集積回路装置。2. The semiconductor integrated circuit device according to claim 1, wherein the heat dissipation material is a silicone gel mixed with metal powder.
なることを特徴とする請求項１または２記載の半導体集
積回路装置。3. The semiconductor integrated circuit device according to claim 1, wherein the die pad and the heat dissipation plate are made of Cu.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4245384A JPH0697323A (en) | 1992-09-16 | 1992-09-16 | Semiconductor integrated circuit device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4245384A JPH0697323A (en) | 1992-09-16 | 1992-09-16 | Semiconductor integrated circuit device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0697323A true JPH0697323A (en) | 1994-04-08 |
Family
ID=17132861
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4245384A Pending JPH0697323A (en) | 1992-09-16 | 1992-09-16 | Semiconductor integrated circuit device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0697323A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7187063B2 (en) | 2002-07-29 | 2007-03-06 | Yamaha Corporation | Manufacturing method for magnetic sensor and lead frame therefor |
| WO2007138681A1 (en) * | 2006-05-30 | 2007-12-06 | Kokusan Denki Co., Ltd. | Resin-sealed semiconductor device and electronic device using such semiconductor device |
-
1992
- 1992-09-16 JP JP4245384A patent/JPH0697323A/en active Pending
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7187063B2 (en) | 2002-07-29 | 2007-03-06 | Yamaha Corporation | Manufacturing method for magnetic sensor and lead frame therefor |
| CN100346168C (en) * | 2002-07-29 | 2007-10-31 | 雅马哈株式会社 | Magnetic sensor producing method and lead wire frame |
| US7494838B2 (en) | 2002-07-29 | 2009-02-24 | Yamaha Corporation | Manufacturing method for magnetic sensor and lead frame therefor |
| US7541665B2 (en) | 2002-07-29 | 2009-06-02 | Yamaha Corporation | Lead frame for a magnetic sensor |
| US8138757B2 (en) | 2002-07-29 | 2012-03-20 | Yamaha Corporation | Manufacturing method for magnetic sensor and lead frame therefor |
| WO2007138681A1 (en) * | 2006-05-30 | 2007-12-06 | Kokusan Denki Co., Ltd. | Resin-sealed semiconductor device and electronic device using such semiconductor device |
| US7868451B2 (en) | 2006-05-30 | 2011-01-11 | Kokusan Denki Co. Ltd. | Resin sealing semiconductor device and electronic device using resin sealing semiconductor device |
| JP5024289B2 (en) * | 2006-05-30 | 2012-09-12 | 国産電機株式会社 | Resin-sealed semiconductor device and electronic device using this semiconductor device |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR970005712B1 (en) | High heat sink package | |
| US6876069B2 (en) | Ground plane for exposed package | |
| US6630371B2 (en) | Chip on board and heat sink attachment methods | |
| US6737755B1 (en) | Ball grid array package with improved thermal characteristics | |
| US8049313B2 (en) | Heat spreader for semiconductor package | |
| CN100378972C (en) | Heat spreader and package structure utilizing the same | |
| US7221055B2 (en) | System and method for die attach using a backside heat spreader | |
| US8643172B2 (en) | Heat spreader for center gate molding | |
| JPS61236130A (en) | Semiconductor device | |
| JPS6149446A (en) | Resin seal type semiconductor device | |
| JPH0697323A (en) | Semiconductor integrated circuit device | |
| EP0405330A2 (en) | Flagless leadframe, package and method | |
| JPH0846100A (en) | Semiconductor integrated circuit device | |
| JPH0864730A (en) | Semiconductor integrated circuit device | |
| JPS61137349A (en) | Semiconductor device | |
| JPH0837256A (en) | Semiconductor device | |
| JPS6129162A (en) | Semiconductor device | |
| TWI746391B (en) | Integrated cirsuit pacakge system | |
| TW200522300A (en) | Chip package sturcture | |
| JPH0637221A (en) | Resin sealing type semiconductor device | |
| KR100214857B1 (en) | Multi-chip package | |
| JPH10308480A (en) | Semiconductor device sealing resin material and semiconductor device | |
| JP2003007967A (en) | Semiconductor device, its manufacturing method and mounting structure | |
| JPH1197586A (en) | Semiconductor device and its manufacture | |
| KR20040003841A (en) | Semiconductor package improving a heat spread way and manufacturing method thereof |