JPH0695538B2 - Method for manufacturing semiconductor device - Google Patents

Method for manufacturing semiconductor device

Info

Publication number
JPH0695538B2
JPH0695538B2 JP62163743A JP16374387A JPH0695538B2 JP H0695538 B2 JPH0695538 B2 JP H0695538B2 JP 62163743 A JP62163743 A JP 62163743A JP 16374387 A JP16374387 A JP 16374387A JP H0695538 B2 JPH0695538 B2 JP H0695538B2
Authority
JP
Japan
Prior art keywords
bonding
pads
pad
wire
pellet
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP62163743A
Other languages
Japanese (ja)
Other versions
JPS647530A (en
Inventor
巧 松倉
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62163743A priority Critical patent/JPH0695538B2/en
Publication of JPS647530A publication Critical patent/JPS647530A/en
Publication of JPH0695538B2 publication Critical patent/JPH0695538B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05554—Shape in top view being square
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/061—Disposition
    • H01L2224/0612—Layout
    • H01L2224/0615—Mirror array, i.e. array having only a reflection symmetry, i.e. bilateral symmetry
    • H01L2224/06153—Mirror array, i.e. array having only a reflection symmetry, i.e. bilateral symmetry with a staggered arrangement, e.g. depopulated array
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/494—Connecting portions
    • H01L2224/4943—Connecting portions the connecting portions being staggered
    • H01L2224/49431—Connecting portions the connecting portions being staggered on the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/78—Apparatus for connecting with wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/78—Apparatus for connecting with wire connectors
    • H01L2224/7825—Means for applying energy, e.g. heating means
    • H01L2224/783—Means for applying energy, e.g. heating means by means of pressure
    • H01L2224/78301—Capillary
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/78—Apparatus for connecting with wire connectors
    • H01L2224/7825—Means for applying energy, e.g. heating means
    • H01L2224/783—Means for applying energy, e.g. heating means by means of pressure
    • H01L2224/78301—Capillary
    • H01L2224/78302—Shape
    • H01L2224/78305—Shape of other portions
    • H01L2224/78307—Shape of other portions outside the capillary
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8512—Aligning
    • H01L2224/85148—Aligning involving movement of a part of the bonding apparatus
    • H01L2224/85169—Aligning involving movement of a part of the bonding apparatus being the upper part of the bonding apparatus, i.e. bonding head, e.g. capillary or wedge
    • H01L2224/8518—Translational movements
    • H01L2224/85181—Translational movements connecting first on the semiconductor or solid-state body, i.e. on-chip, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01039—Yttrium [Y]

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体装置の製造方法に関し、特に高密度に配
置されたボンディングパッドのボンディング方法に関す
る。The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a bonding method for bonding pads arranged at high density.

〔従来の技術〕[Conventional technology]

従来この種のボンディング方法は第４図に示すように、
ペレットＤ上に配設されたボンディングパッド（以下単
にパッドと記す）Ｃに対応るボンディング用リード（以
下ステッチと記す）Ａ間をボンディングワイヤー（以下
単にワイヤーと記す）Ｂを介して接続する時、そのボン
ディング順序を時計方向と逆廻りに一巡する方式をとっ
ていた。すなわち、第４図中に記された番号順１〜ｎに
従ってボンディング開始位置Ｓからボンディング終了位
置ｎへ向けて時計方向と逆廻りに一巡する方式を行って
いた。Conventionally, this type of bonding method is as shown in FIG.
When connecting between bonding leads (hereinafter referred to as stitches) A corresponding to bonding pads (hereinafter simply referred to as pads) C arranged on the pellet D via bonding wires (hereinafter simply referred to as wires) B, The bonding sequence was set to go counterclockwise and once. That is, according to the numerical order 1 to n described in FIG. 4, a system is used in which the bonding start position S is rotated in the counterclockwise direction to the bonding end position n.

〔発明が解決しようとする問題点〕[Problems to be solved by the invention]

しかしながら上述した従来のボンディング方式では、半
導体ペレット内の回路素子の高密度化に伴い、パッド数
も増加した場合、単にパッドをペレットに列設すること
はペレットサイズの増大につながり、半導体装置の製造
歩留を悪化させる。また、パッドピッチを縮小した場合
にはワイヤーとキャピラリーの接触によりワイヤーが変
形し、不良となるという欠点がある。これはペレットの
コーナー部において、特に顕著である。すなわち、ペレ
ットコーナー部においては第６図に示すボンディング順
序でボンディングされる場合 まず、パッドC1とステッチA1がワイヤーB1を介して接続
され、次に、パッドC2、ワイヤーB2を介してステッチA2
に接続されるがキャピラリーＹがパッドC2上にワイヤー
B2を圧着する時、点ＰにおいてキャピラリーＹの高さｌ
における外径の領域Y1がワイヤーB1と接触してしまう。
また、パッドを千鳥状に配置した場合にも第７図に示す
ようにパッドC21にボンディングする際に先にボンディ
ングしたワイヤーB11とキャビラリーが接触する。これ
は、ワイヤーのペレット端に対する角度θが小さくなる
程顕著となる。However, in the conventional bonding method described above, when the number of pads is increased as the density of the circuit elements in the semiconductor pellet is increased, simply arranging the pads on the pellet leads to an increase in the pellet size, which leads to the manufacturing of the semiconductor device. It deteriorates the yield. Further, when the pad pitch is reduced, the wire is deformed due to the contact between the wire and the capillary, resulting in a defect. This is particularly noticeable at the corners of the pellet. That is, in the case where the pellet corner portion is bonded in the bonding order shown in FIG. 6, first, the pad C1 and the stitch A1 are connected via the wire B1, and then the stitch A2 is connected via the pad C2 and the wire B2.
Capillary Y is connected to pad C2 on the wire
When crimping B2, height l of capillary Y at point P
The outer diameter region Y 1 at the point of contact with the wire B 1 .
Also, when the pads are arranged in a zigzag pattern, as shown in FIG. 7, when bonding to the pad C 21 , the previously bonded wire B 11 comes into contact with the cavity. This becomes more remarkable as the angle θ of the wire with respect to the pellet end becomes smaller.

本発明の目的は、ペレット上のパッドを千鳥状に配設、
しかもパッドを高密度に配置しペレットサイズを縮小化
しても、従来パッドの高密度化で問題となっていたワイ
ヤーとキャピラリーの接触による不良品の発生がなくな
り工程歩留を向上でき、かつ信頼性も向上させることが
できる半導体装置の製造方法を提供することにある。The object of the present invention is to arrange the pads on the pellet in a staggered manner,
Moreover, even if the pads are arranged at a high density to reduce the pellet size, defective products due to the contact between the wire and the capillary, which had been a problem with the high density of the pads, can be eliminated, and the process yield can be improved. Another object of the present invention is to provide a method of manufacturing a semiconductor device that can also improve the above.

〔問題点を解決するための手段〕[Means for solving problems]

本発明による方法は、上記のようにボンディングパッド
が２列に千鳥状に配置された半導体ペレットに対するボ
ンディングを行なう際に、まず外側のボンディングパッ
ド列に対しペレットのコーナー部側のパッドから中央部
のパッドに向けて順にボンディングし、その後、外側の
残りのパッドに対しペレットの他のコーナー部側のパッ
ドから中央部のパッドに向けて順にボンディングし、そ
して、内側のパッド列に対し同様にボンディングするこ
とを特徴とする。According to the method of the present invention, when the bonding is performed on the semiconductor pellet in which the bonding pads are arranged in two rows in a zigzag manner, first, from the pad on the corner side of the pellet to the central section with respect to the outer bonding pad row. Bonding to the pads in sequence, then to the remaining pads on the outside, from the other corner pad of the pellet to the central pad, and then to the inner pad row. It is characterized by

〔実施例〕〔Example〕

以下、本発明の実施例につき図面を用いて説明するが、
その前に第１図、第２図を用いて、従来の問題点を一応
解決できるボンディング方法についても説明する。Hereinafter, embodiments of the present invention will be described with reference to the drawings.
Before that, a bonding method which can solve the conventional problems will be described with reference to FIGS. 1 and 2.

第１図に示すように、ペレットＤ上に千鳥状に設けられ
たパッドＣとリードフレームのステッチＡ間をワイヤー
Ｂを介して接続するボンディング方法において、外側の
パッドC1からボンディングを開始し、次に、次の外側の
パッドであるパッドC2をボンディングしその後パッドC1
とパッドC2の間の内側パッドであるパッドC3をボンディ
ングする。その後同様に隣接するパッドでは外側のパッ
ドを内側のパッドよりも先にボンディングする。すなわ
ちボンディング開始位置Ｓから1,3,2,5,4,7,6…の順に
ボンディングを実施する。As shown in FIG. 1, in the bonding method of connecting the pads C provided in a staggered manner on the pellet D and the stitches A of the lead frame via the wire B, the bonding is started from the outer pad C 1 . Then bond the next outer pad, pad C 2 , and then pad C 1.
Bond pad C 3 , which is the inner pad between pad C 2 and pad C 2 . Thereafter, similarly, in the adjacent pads, the outer pads are bonded before the inner pads. That is, bonding is performed in the order of 1,3,2,5,4,7,6 ... From the bonding start position S.

第２図は第１図のコーナー部の拡大図でパッドC4，C5，
C6をボンディングした後パッドC7をボンディングするの
であるがその時キャピラリーＹのペレット面からｌの高
さにおけるキャピラリーの外径領域Y1はまったく他のワ
イヤーと接触しない、すなわち何ら接触もなくして自由
にボンディングが実施されることになる。FIG. 2 is an enlarged view of the corner portion of FIG. 1, where pads C 4 , C 5 ,
The pad C 7 is bonded after C 6 is bonded. At that time, the outer diameter region Y 1 of the capillary at a height of 1 from the pellet surface of the capillary Y does not come into contact with any other wire at all, that is, without any contact. Bonding will be performed.

このように、第１図、第２図で説明した方法では従来の
問題点が一応は解決できる。しかしながら、第１図にも
示すようにコーナー部に近いパッドＣから延びるワイヤ
ＢはペレットＤの辺に対して傾いており、この傾きはパ
ッド数（ステッチ数）が多くなるほどきつくなる。この
ため、パッドC6に対するボンディングを行うときにキャ
ピラリがパッドC4から延びるワイヤB7に接触することが
ある。As described above, the problems described in the related art can be solved by the method described with reference to FIGS. 1 and 2. However, as shown in FIG. 1, the wire B extending from the pad C near the corner is inclined with respect to the side of the pellet D, and this inclination becomes tighter as the number of pads (the number of stitches) increases. For this reason, the capillary may come into contact with the wire B 7 extending from the pad C 4 when performing bonding to the pad C 6 .

そこで、本発明は第３図にその一実施例を示すように、
まず、外側のパッドを各象限毎にコーナー部から中央部
に向けてボンディングを行ない、次に内側のパッドを同
様にボンディングを行なう。この場合でも外側ボンディ
ング時には内側からのワイヤーは存在しない為、キャピ
ラリーとワイヤーの接触事故は発生しない。したがっ
て、この実施例ではコーナー部から中心部に向けてボン
ディングを行なっている為に外側パッド間ピッチ、内側
パッド間ピッチが小さな場合でもワイヤーキャピラリー
の接触はない。Therefore, the present invention, as shown in FIG.
First, the outer pad is bonded in each quadrant from the corner to the center, and then the inner pad is bonded in the same manner. Even in this case, since the wire from the inside does not exist at the time of the outside bonding, the contact accident between the capillary and the wire does not occur. Therefore, in this embodiment, since the bonding is performed from the corner portion toward the center portion, the wire capillaries do not contact even when the outer pad pitch and the inner pad pitch are small.

〔発明の効果〕〔The invention's effect〕

以上説明したように本発明はペレット上のパッドを千鳥
状に配設し、高密度化を達成すると共に、ボンディング
に際しては、まず外側のパッド列に対しコーナー部側の
パッドから中央部のパッドに向ってボンディングし、残
りの外側パッド列に対し他のコーナー部側のパッドから
中央部のパッドに向ってボンディングし、そして内側の
パッド列に対し同様にボンディングするようにしたた
め、これによる不良品の発生がなくなり工程歩留を向上
できるばかりでなく信頼性も向上させることができると
いう効果が得られる。As described above, the present invention arranges the pads on the pellets in a zigzag manner to achieve high density, and at the time of bonding, first, from the pads on the corner side to the pads on the center side with respect to the outside pad row. Bonding toward the other outer pad row, bonding from the other corner side pads toward the central pad, and then to the inner pad row in the same way It is possible to obtain the effect that not only the generation is eliminated but the process yield can be improved, but also the reliability can be improved.

【図面の簡単な説明】[Brief description of drawings]

第１図は改良されたボンディング方法を説明するための
平面図、第２図は第１図の部分拡大図、第３図は本発明
の一実施例を説明するための平面図、第４図は従来のボ
ンディング方法の説明図、第５図（ａ），（ｂ）はボン
ディング時のパッドにワイヤーを圧着する時のキャピラ
リーの位置大きさを説明する説明図であり第５図（ａ）
はその側断面図、第５図（ｂ）は高さｌにおけるその上
面図、第６図、第７図は従来のボンディング方法の問題
点を説明する為の説明図で第６図は通常のパッド配置、
第７図は千鳥状にパッドを配置した場合を示す。 A,A1〜A6…ステッチ、B,B1〜B6…ワイヤー、C,C1〜C6…
パッド、Ｄ…ペレット、Ｓ…ボンディング開始位置、Ｅ
…ボンディング終了位置、Ｙ…キャピラリー、Y1…高さ
ｌにおけるキャピラリーの外径領域、Ｐ…ワイヤーキャ
ピラリー接触箇所。FIG. 1 is a plan view for explaining an improved bonding method, FIG. 2 is a partially enlarged view of FIG. 1, FIG. 3 is a plan view for explaining an embodiment of the present invention, and FIG. Is an explanatory view of a conventional bonding method, and FIGS. 5 (a) and 5 (b) are explanatory views for explaining the position size of the capillary when the wire is pressure-bonded to the pad during bonding.
Is a side sectional view thereof, FIG. 5 (b) is a top view thereof at a height l, FIGS. 6 and 7 are explanatory views for explaining problems of the conventional bonding method, and FIG. Pad layout,
FIG. 7 shows a case where pads are arranged in a staggered pattern. A, A 1 to A 6 … Stitch, B, B 1 to B 6 … Wire, C, C 1 to C 6 …
Pad, D ... Pellet, S ... Bonding start position, E
... Bonding end position, Y ... Capillary, Y 1 ... Capillary outer diameter region at height l, P ... Wire capillary contact point.

Claims (1)

【特許請求の範囲】[Claims] 【請求項１】半導体ペレットの周辺に沿って２列に千鳥
状に配置された複数のボンディングパッドの各々にワイ
ヤをボンディングする際に、前記半導体ペレットの周辺
に近い側のボンディングパッド列に対し前記半導体ペレ
ットのコーナー部側のボンディングパッドから中央部の
ボンディングパッドに向けて順にワイヤをボンディング
し、その後、同一のボンディングパッド列の残りのボン
ディングパッドに対し前記半導体ペレットの他のコーナ
ー部側のボンディングパッドから中央部のボンディング
パッドに向けて順にワイヤをボンディングして前記同一
のボンディングパッド列の各々のボンディングパッドに
対するボンディングを終了し、しかる後、前記半導体ペ
レットの周辺から遠い側のボンディングパッド列に対し
同様にワイヤをボンディングすることを特徴とする半導
体装置の製造方法。1. When bonding a wire to each of a plurality of bonding pads arranged in a zigzag pattern in two rows along the periphery of a semiconductor pellet, the bonding pad row closer to the periphery of the semiconductor pellet is bonded to the bonding pad row. Wires are sequentially bonded from the bonding pad on the corner side of the semiconductor pellet to the bonding pad on the center part, and then the bonding pads on the other corner side of the semiconductor pellet with respect to the remaining bonding pads of the same bonding pad row. From the central bonding pad to the bonding pads in the central part to finish the bonding to the respective bonding pads of the same bonding pad row, and thereafter to the bonding pad row on the side far from the periphery of the semiconductor pellet. Wire The method of manufacturing a semiconductor device, characterized by loading.
JP62163743A 1987-06-29 1987-06-29 Method for manufacturing semiconductor device Expired - Lifetime JPH0695538B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62163743A JPH0695538B2 (en) 1987-06-29 1987-06-29 Method for manufacturing semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62163743A JPH0695538B2 (en) 1987-06-29 1987-06-29 Method for manufacturing semiconductor device

Publications (2)

Publication Number Publication Date
JPS647530A JPS647530A (en) 1989-01-11
JPH0695538B2 true JPH0695538B2 (en) 1994-11-24

Family

ID=15779835

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62163743A Expired - Lifetime JPH0695538B2 (en) 1987-06-29 1987-06-29 Method for manufacturing semiconductor device

Country Status (1)

Country Link
JP (1) JPH0695538B2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5215940A (en) * 1990-02-05 1993-06-01 Orcutt John W Wire looping method during wire bonding
JP2974821B2 (en) * 1991-06-19 1999-11-10 沖電気工業株式会社 Pattern formation method

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6185832A (en) * 1984-10-03 1986-05-01 Toshiba Corp Wire-bonding
JPS6185833A (en) * 1984-10-03 1986-05-01 Toshiba Corp Wire-bonding
JPS61105851A (en) * 1984-10-30 1986-05-23 Toshiba Corp Wire bonding method

Also Published As

Publication number Publication date
JPS647530A (en) 1989-01-11

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