JPH069358B2 - Automatic phase control circuit - Google Patents
Automatic phase control circuitInfo
- Publication number
- JPH069358B2 JPH069358B2 JP61144787A JP14478786A JPH069358B2 JP H069358 B2 JPH069358 B2 JP H069358B2 JP 61144787 A JP61144787 A JP 61144787A JP 14478786 A JP14478786 A JP 14478786A JP H069358 B2 JPH069358 B2 JP H069358B2
- Authority
- JP
- Japan
- Prior art keywords
- frequency
- phase
- signal
- band
- pass filter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
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Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、通信・放送などの分野において、マイクロ波
周波数帯の4相PSK変調信号を復調する復調装置など
に使用される高周波自動位相制御回路に関する。The present invention relates to a high frequency automatic phase control used in a demodulator for demodulating a four-phase PSK modulated signal in a microwave frequency band in the fields of communication and broadcasting. Regarding the circuit.
衛星放送における音声信号系は、占有帯域幅および伝送
効率の面で優れている4相PSK変調方式が用いられて
いる。4相PSK変調信号の復調は、約12GHzを14
0MHzに変換した変調信号について行なう。復調には同
期検波方式を用いるので搬送波を再生しなければならな
いが、140MHzのように高い周波数では逆変調方式で
搬送波を再生するのが適している。The audio signal system in satellite broadcasting uses a 4-phase PSK modulation method which is excellent in terms of occupied bandwidth and transmission efficiency. For demodulation of 4-phase PSK modulated signal, approximately 12 GHz is 14
Performed on the modulated signal converted to 0 MHz. Since the synchronous detection method is used for demodulation, it is necessary to reproduce the carrier wave, but it is suitable to reproduce the carrier wave by the inverse modulation method at a high frequency such as 140 MHz.
逆変調方式の4相PSK復調装置は、第3図に示すよう
に、4相PSK変調信号aを直交位相復調回路1で復調
し、復調データ(b,c)を出力するとともに、再変調
回路2で、復調データ(b,c)で、変調信号aを遅延
回路4で遅延し、位相を調整した信号a’を変調する。
これが逆変調で出力信号dが再生搬送波信号になる。信
号dは自動位相制御回路(APC)を経て、余分な周波
数を除くとともに、また入力変調信号との位相調整を行
なう。このように位相調整した搬送波信号eを直交位相
復調回路1に使用している。The inverse modulation 4-phase PSK demodulator demodulates the 4-phase PSK modulated signal a by the quadrature phase demodulation circuit 1 and outputs demodulated data (b, c), as shown in FIG. At 2, the modulated signal a is delayed by the delay circuit 4 with the demodulated data (b, c), and the phase-adjusted signal a ′ is modulated.
This is inverse modulation, and the output signal d becomes the reproduced carrier signal. The signal d goes through an automatic phase control circuit (APC) to remove excess frequencies and also adjusts the phase with the input modulation signal. The carrier signal e whose phase has been adjusted in this way is used in the quadrature phase demodulation circuit 1.
上記APC回路の設計は、復調装置の取扱う周波数が1
40MHzと高いことと、入力変調波信号の周波数変動が
GHz帯から140MHzまで数段の周波数変換を行なうた
め、避けられないことから、相当厳しいものとなってい
る。C/N比向上のため、APC回路に含まれる帯域通
過フィルタの通過帯域幅を狭くすると、周波数変動に伴
うその位相変位が大きくなるという相反関係があるので
何らかの工夫が必要となる。The frequency of the APC circuit designed by the demodulator is 1
It is considerably severe because it is as high as 40 MHz and the frequency fluctuation of the input modulated wave signal is unavoidable because it requires several steps of frequency conversion from the GHz band to 140 MHz. If the pass band width of the band pass filter included in the APC circuit is narrowed in order to improve the C / N ratio, there is a reciprocal relation that the phase displacement due to the frequency fluctuation becomes large, and therefore some measure is required.
以上に説明した回路は、4相PSK復調装置に組込まれ
る回路であるが、本発明の一般的に高周波において、C
/N比が高く、また入力周波数の変動があっても固定的
な位相を維持できる回路(APC回路)を対象とするも
のである。したがって使用場所としても衛星放送に限定
するものではない。Although the circuit described above is a circuit incorporated in a 4-phase PSK demodulator, in general, at high frequencies of the present invention, C
It is intended for a circuit (APC circuit) having a high / N ratio and capable of maintaining a fixed phase even when the input frequency fluctuates. Therefore, the place of use is not limited to satellite broadcasting.
高周波APC回路として、その要件をみたすものとし
て、本発明者が発明者の一人である特願昭60−149
336号の4相PSK復調装置では、第4図の回路を用
いている。As a high-frequency APC circuit, a Japanese Patent Application No. 60-149 in which the present inventor is one of the inventors, which satisfies the requirements.
The four-phase PSK demodulator of No. 336 uses the circuit shown in FIG.
この回路では、高周波のフィルタ実現の困難性をさける
ため、入力を一旦低い周波数に変換し、再びもとの周波
数に変換して出力するようにしている。入力信号20
(周波数f)は共通の電圧制御発振器7の信号(周波数
f0)24と、乗算器5で乗算し、その出力信号21を
所定の変換周波数をとおす帯域通過フィルタ8を介して
低周波信号(周波数f−f0)22に変換する。この信
号22は帯域通過フィルタ9をとおし、信号23として
再び乗算器6で信号(周波数f0)24と乗算し、もと
の周波数f成分をもつ信号25となし、帯域通過フィル
タ12で信号(周波数f)26とする。電圧制御発振器
7の信号24は乗算器5,6に共通に供給されるので、
入力信号20と、信号26とは同一周波数になるが、信
号22,23は電圧制御発振器7の周波数により、ある
程度の周波数幅内で移動できる。帯域通過フィルタ9は
C/N比向上のため狭帯域にするが、入力信号20の周
波数変動があると、帯域中心周波数からずれ、位相変位
が生ずる。第2図に通過帯域幅の広いフィルタ(a)と狭
いフィルタ(b)とについて利得・位相の周波数特性を示
してあるが、狭帯域にすると位相変位が大きくなる。In this circuit, in order to avoid the difficulty of realizing a high-frequency filter, the input is once converted into a low frequency, and then the original frequency is converted and output again. Input signal 20
The (frequency f) is multiplied by the signal (frequency f 0 ) 24 of the common voltage controlled oscillator 7 in the multiplier 5, and the output signal 21 thereof is passed through the band pass filter 8 passing through a predetermined conversion frequency to obtain the low frequency signal ( Frequency f−f 0 ) 22. This signal 22 passes through the band pass filter 9, and is again multiplied as a signal 23 by the multiplier 6 with the signal (frequency f 0 ) 24 to obtain a signal 25 having the original frequency f component. Frequency f) 26. Since the signal 24 of the voltage controlled oscillator 7 is commonly supplied to the multipliers 5 and 6,
Although the input signal 20 and the signal 26 have the same frequency, the signals 22 and 23 can be moved within a certain frequency width depending on the frequency of the voltage controlled oscillator 7. The band pass filter 9 narrows the band to improve the C / N ratio, but if the frequency of the input signal 20 fluctuates, it shifts from the band center frequency and a phase displacement occurs. FIG. 2 shows the frequency characteristics of gain and phase for the filter (a) with a wide pass band width and the filter (b) with a narrow pass band width.
ところで、第4図の回路は、帯域通過フィルタ9の両端
の信号(信号22,23)の位相比較を位相比較器10
でなし、その出力を低域通過フィルタ11を介して、電
圧制御発振器7に印加し、その周波数を変化させるPL
L(位相同期ループ)を形成している。このPLLによ
り信号22,23の周波数が自動的に変化し帯域通過フ
ィルタ9の中心周波数となることで、帯域通過フィルタ
9による位相差が生じない。このようにして、入力信号
20と、信号26とは入力信号20の周波数変動があっ
ても、常に同一周波数で同一位相とすることができ、ま
た信号26のC/N比が向上する。なお信号26はリミ
ッタ13で一定振幅となし、可変移相器14で、所定の
位相をもつ信号27として出力することができる。By the way, in the circuit of FIG. 4, the phase comparison of the signals (signals 22 and 23) at both ends of the band pass filter 9 is performed by the phase comparator 10.
The output is applied to the voltage controlled oscillator 7 through the low pass filter 11 to change its frequency.
L (phase locked loop) is formed. By this PLL, the frequencies of the signals 22 and 23 are automatically changed to the center frequency of the band pass filter 9, so that the phase difference by the band pass filter 9 does not occur. In this way, the input signal 20 and the signal 26 can always have the same frequency and the same phase even if the frequency of the input signal 20 varies, and the C / N ratio of the signal 26 is improved. The signal 26 has a constant amplitude by the limiter 13 and can be output as the signal 27 having a predetermined phase by the variable phase shifter 14.
以上、説明したように、第4図はきわめて優れた特性を
有するが、入力信号の周波数変化があまり大きい場合に
は、狭い通過帯域幅の帯域通過フィルタ9の出力が小さ
くなり、位相比較器10が正常に位相比較ができなくな
る。そのため上記の位相ロックができない場合が生ず
る。しかし、通過帯域幅を大きくするとC/N比向上が
できないという矛盾がある。この問題は、復調装置以前
の高周波段の設計にも関係するもので、その高周波段の
周波数変動が常に一定内におさまり、また偶発的な大き
い周波数変動がなければ、第4図は充分に有用である。As described above, although FIG. 4 has extremely excellent characteristics, when the frequency change of the input signal is too large, the output of the bandpass filter 9 having a narrow passband becomes small and the phase comparator 10 However, the phase comparison cannot be performed normally. Therefore, there may be a case where the above phase lock cannot be performed. However, there is a contradiction that the C / N ratio cannot be improved if the pass bandwidth is increased. This problem is also related to the design of the high-frequency stage before the demodulator. If the frequency variation of the high-frequency stage always stays within a certain range and there is no accidental large frequency variation, FIG. 4 is sufficiently useful. Is.
本発明の目的は、上記事情に鑑み、回路構成が従来例に
比し複雑になるが、入力信号の周波数変動が大きかった
り、偶発的に大きい周波数変動があった場合にも、この
APC回路が充分に動作するような回路を提供すること
にある。In view of the above circumstances, the object of the present invention is that the circuit configuration becomes more complicated than the conventional example, but even when the frequency fluctuation of the input signal is large or there is a large frequency fluctuation by accident, this APC circuit is It is to provide a circuit that operates sufficiently.
本発明の回路は局部発振器を共通とする入力信号の周波
数をダウンする第1の周波数変換器と,再び周波数をア
ップして出力信号とする第2の周波数変換器とを有し、
第1・第2周波数変換器間の経路に同一中心周波数の通
過帯域幅を広・狭と異ならしめた第1・第2の帯域通過
フィルタと,電圧制御移相器とをその順に直列接続して
おく。そして第1帯域通過フィルタの両端の位相差を比
較し、該位相差に応じて前記局部発振器の周波数を制御
する手段と,第2帯域通過フィルタの両端の位相差を比
較して、前記電圧制御移相器の移相量を制御する手段と
を設けたものである。The circuit of the present invention has a first frequency converter that reduces the frequency of an input signal that shares a local oscillator, and a second frequency converter that raises the frequency again to generate an output signal.
In the path between the first and second frequency converters, the first and second band pass filters having different pass bands of the same center frequency, wide and narrow, and the voltage control phase shifter are connected in series in that order. Keep it. Then, the voltage control is performed by comparing the phase difference between both ends of the first band pass filter and comparing the phase difference between both ends of the second band pass filter with the means for controlling the frequency of the local oscillator according to the phase difference. And means for controlling the amount of phase shift of the phase shifter.
本発明では、帯域通過フィルタとして広帯域通過フィル
タと狭帯域通過フィルタとの2フィルタを備え、入力信
号の周波数変動が大きい場合にも、追随できるように
し、狭帯域通過フィルタでC/N比向上を図っている。
ただし実施例で詳細に説明するが、広帯域通過フィルタ
の位相特性から広帯域通過フィルタと電圧制御発振器と
を含むPLLの応答特性が充分でなく、広帯域通過フィ
ルタをとおる信号は中心周波数がずれ、多少の位相差が
生ずる。この位相差は、同一中心周波数を有する狭帯域
通過フィルタの両端の信号の位相差として拡大して検出
し、電圧制御移相器を動かすことにより補償できる。In the present invention, two filters, a wide band pass filter and a narrow band pass filter, are provided as the band pass filter so that they can follow up even when the frequency fluctuation of the input signal is large, and the narrow band pass filter improves the C / N ratio. I am trying.
However, as will be described in detail in the embodiments, the response characteristics of the PLL including the wide band pass filter and the voltage controlled oscillator are not sufficient due to the phase characteristics of the wide band pass filter, and the center frequency of the signal passing through the wide band pass filter is deviated and the A phase difference occurs. This phase difference can be compensated by expanding and detecting the phase difference between the signals at both ends of the narrow band pass filter having the same center frequency, and moving the voltage controlled phase shifter.
〔実施例〕 以下、図面を参照して本発明の一実施例につき説明す
る。第1図が回路ブロック図であるが、乗算器101,
102より右側部分が低周波に変換された部分であり、
この低周波部分の上部にPLLが、下部に位相調整部分
が示されている。[Embodiment] An embodiment of the present invention will be described below with reference to the drawings. Although FIG. 1 is a circuit block diagram, the multiplier 101,
The part on the right side of 102 is the part converted to low frequency,
The PLL is shown above the low frequency part and the phase adjusting part is shown below.
入力信号201は、乗算器101で電圧制御発振器(以
下VCOと略す)103の出力信号202と乗算され、
その出力信号203を帯域通過フィルタ(以下BPFと
略す)104にとおすことで、低い周波数f−f0に周
波数変換された信号204とする。ここでfは信号20
1の,f0は信号202の周波数である。信号204は
広い通過帯域幅を有する第1BPF105に入力し、そ
の両端の位相差を位相比較器106で求め、この位相差
は低域通過フィルタ(以下LPFと略す)107で平滑
化し、制御電圧103aとしてVCO103を制御す
る。このPLLによって入力信号201に周波数変動が
あっても、VCO103の周波数が追随し、信号204
は前記位相差を小さくするような一定の周波数におさま
る。ただし、本発明では、入力信号201の周波数変動
がかなり大きい場合でも追随できるように第1BPF1
05の通過帯域幅を広くとってあるので、第1BPF1
05の両端の位相差は第2図(a)に示すように比較的小
さく、制御電圧103aが小さい。そのため周波数変動
がそれ程大きくない場合には、PLLのループ利得が小
さく追随誤差があり、信号204,205は第1BPF
105の中心周波数より少しずれ、位相差が生ずる。こ
の位相差は、次段の狭い通過帯域幅を有する第2BPF
108を含む位相調整部分で補償する。第2BPF10
8は、中心周波数が第1BPF105と同一であるが、
狭帯域であり、第2図(b)に示すように信号204,2
05が中心周波数より少し周波数がずれても両端の位相
差を検出する位相比較器109の出力は大きくなる。こ
の出力をLPF110で平滑化し、可変移相器113に
印加する。可変移相器113は電圧制御移相器であっ
て、初期調整として可変電圧112で一定移相量を与え
るようにしておく。そして前記LPF110の直流電圧
を加算器111で、可変電圧112で固定した電圧に重
畳することで、第1BPF105,第2BPF108の
全体の位相誤差を補償できる。The input signal 201 is multiplied by the output signal 202 of the voltage controlled oscillator (hereinafter abbreviated as VCO) 103 in the multiplier 101,
The output signal 203 is passed through a bandpass filter (hereinafter abbreviated as BPF) 104 to obtain a signal 204 that has been frequency-converted to a low frequency f-f 0 . Where f is signal 20
1, f 0 is the frequency of the signal 202. The signal 204 is input to the first BPF 105 having a wide pass band width, the phase difference between both ends thereof is obtained by the phase comparator 106, the phase difference is smoothed by the low pass filter (hereinafter abbreviated as LPF) 107, and the control voltage 103a is obtained. To control the VCO 103. Even if the frequency of the input signal 201 varies due to this PLL, the frequency of the VCO 103 follows and the signal 204
Falls within a constant frequency so as to reduce the phase difference. However, in the present invention, the first BPF 1 is designed to be able to follow even when the frequency fluctuation of the input signal 201 is considerably large.
Since the pass band width of 05 is wide, the first BPF1
The phase difference between both ends of 05 is relatively small as shown in FIG. 2 (a), and the control voltage 103a is small. Therefore, when the frequency fluctuation is not so large, the loop gain of the PLL is small and there is a tracking error, and the signals 204 and 205 are the first BPF.
A slight difference from the center frequency of 105 causes a phase difference. This phase difference is due to the second BPF having a narrow pass band in the next stage.
The phase adjustment portion including 108 is used for compensation. Second BPF10
8 has the same center frequency as the first BPF 105,
It is a narrow band, and as shown in FIG.
Even if the frequency of 05 is slightly deviated from the center frequency, the output of the phase comparator 109 for detecting the phase difference between both ends becomes large. This output is smoothed by the LPF 110 and applied to the variable phase shifter 113. The variable phase shifter 113 is a voltage-controlled phase shifter, and is configured to give a constant amount of phase shift with the variable voltage 112 as an initial adjustment. Then, the DC voltage of the LPF 110 is superposed on the voltage fixed by the variable voltage 112 by the adder 111, so that the phase error of the entire first BPF 105 and the second BPF 108 can be compensated.
可変移相器113の出力信号207は、再びVCO10
3の出力信号202と乗算器102で乗算する。乗算器
102でもとの周波数fを含む信号208に変換されB
PF114,リミッタ115を介して、出力信号209
とする。この信号209は入力信号201に周波数変動
があっても同一周波数である。さらに第2BPF108
が狭帯域フィルタなのでC/N比が向上した信号となる
ばかりでなく、その位相は、初期的に調整した特定位相
を保持している。The output signal 207 of the variable phase shifter 113 is returned to the VCO 10 again.
The output signal 202 of No. 3 is multiplied by the multiplier 102. The signal is converted into a signal 208 including the original frequency f by the multiplier 102 and B
An output signal 209 is output via the PF 114 and the limiter 115.
And This signal 209 has the same frequency even if the input signal 201 changes in frequency. Furthermore, the second BPF 108
Since it is a narrow band filter, not only a signal with an improved C / N ratio is obtained, but also its phase holds a specific phase that was initially adjusted.
以上詳しく説明したように、本発明では高周波入力信号
を低周波信号に変換して、低周波領域でAPC操作を行
なう。周波数変換にあたり、共通の局部発振器を用いる
ので、入力信号・出力信号は同一周波数である。APC
操作に関与する回路要素である帯域通過フィルタ,位相
比較器,電圧制御移相器などは低周波動作なので設計が
容易である。APC回路に含まれる帯域通過フィルタと
しては、共通の中心周波数をもち帯域幅を広・狭と異な
らしめた2つのフィルタを直列接続にする。広帯域通過
フィルタは入力信号の周波数変動が大きくても、このフ
ィルタを含む位相同期ループによって、中心周波数近傍
に周波数が変換されるように局部発振器(電圧制御発振
器)の周波数を追随させる。As described in detail above, in the present invention, the high frequency input signal is converted into the low frequency signal, and the APC operation is performed in the low frequency region. Since a common local oscillator is used for frequency conversion, the input signal and the output signal have the same frequency. APC
Circuit elements involved in operation, such as bandpass filters, phase comparators, and voltage-controlled phase shifters, are low-frequency operation, so design is easy. As a bandpass filter included in the APC circuit, two filters having a common center frequency and different bandwidths of wide and narrow are connected in series. Even if the frequency fluctuation of the input signal is large, the wide band pass filter causes the frequency of the local oscillator (voltage controlled oscillator) to follow so that the frequency is converted to the vicinity of the center frequency by the phase locked loop including this filter.
上記のように中心周波数近傍に周波数変換された信号は
狭帯域通過フィルタをとおすことでC/N比を増大させ
るとともに、その周波数変動に対する位相差の変化を利
用して狭帯域通過フィルタに直列接続された電圧制御移
相器によって周波数変動による位相差を補償することが
できる。その結果、APC回路の位相としては電圧制御
移相器で固定的に定めたバイアスによる特定位相とする
ことができる。The signal whose frequency is converted to the vicinity of the center frequency as described above increases the C / N ratio by passing through the narrow band pass filter, and is connected in series to the narrow band pass filter by utilizing the change in the phase difference due to the frequency fluctuation. The phase difference caused by the frequency fluctuation can be compensated by the voltage controlled phase shifter. As a result, the phase of the APC circuit can be set to a specific phase by the bias fixedly determined by the voltage control phase shifter.
上記のように、本発明によって入力周波数変動があって
も、常に正しくさだめられた位相とすることができ、ま
たC/N比の高いAPC回路を得ることができる。As described above, according to the present invention, even if the input frequency varies, the phase can be always properly adjusted, and an APC circuit having a high C / N ratio can be obtained.
第1図は本発明の一実施例の回路ブロック図、第2図は
帯域通過フィルタの特性を示す図、第3図は4相PSK
復調装置のブロック図、第4図はAPC回路の従来例を
示す図である。 101,102…乗算器、 103…電圧制御発振器(VC0)、 104,114…帯域通過フィルタ、 107,110…低域通過フィルタ、 105…第1帯域通過フィルタ(広帯域)、 108…第2帯域通過フィルタ(狭帯域)、 106,109…位相比較器、 113…電圧制御移相器。FIG. 1 is a circuit block diagram of an embodiment of the present invention, FIG. 2 is a diagram showing characteristics of a bandpass filter, and FIG. 3 is a 4-phase PSK.
FIG. 4 is a block diagram of a demodulator, and FIG. 4 is a diagram showing a conventional example of an APC circuit. 101, 102 ... Multiplier, 103 ... Voltage controlled oscillator (VC0), 104, 114 ... Band pass filter, 107, 110 ... Low pass filter, 105 ... First band pass filter (wide band), 108 ... Second band pass Filters (narrow band), 106, 109 ... Phase comparators, 113 ... Voltage controlled phase shifters.
Claims (1)
と、入力信号の周波数変動にかかわらず一定の位相を保
持することのできる高周波自動位相制御回路として、 局部発振器を共通とする入力信号の周波数をダウンする
第1の周波数変換器と,再び周波数をアップして出力信
号とする第2の周波数変換器とを有し、第1・第2周波
数変換器間の経路に同一中心周波数の通過帯域幅を広・
狭と異ならしめた第1・第2の帯域通過フィルタと,電
圧制御位移相器とをその順に直列接続するとともに、 第1帯域通過フィルタの両端の位相差を比較し、該位相
差に応じて前記局部発振器の周波数を制御する手段と,
第2帯域通過フィルタの両端の位相差を比較して、前記
電圧制御移相器の移相量を制御する手段とを有すること
を特徴とする高周波自動位相制御回路。1. A high-frequency automatic phase control circuit capable of improving a C / N ratio by a bandpass filter and maintaining a constant phase regardless of frequency fluctuations of an input signal. It has a first frequency converter that lowers the frequency and a second frequency converter that raises the frequency again to produce an output signal, and passes the same center frequency on the path between the first and second frequency converters. Wide bandwidth
The first and second band-pass filters, which are different from the narrow band, and the voltage-controlled phase shifter are serially connected in that order, and the phase difference between both ends of the first band-pass filter is compared, and according to the phase difference. Means for controlling the frequency of the local oscillator;
A high-frequency automatic phase control circuit comprising: means for comparing the phase difference between both ends of the second band-pass filter to control the amount of phase shift of the voltage controlled phase shifter.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61144787A JPH069358B2 (en) | 1986-06-23 | 1986-06-23 | Automatic phase control circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61144787A JPH069358B2 (en) | 1986-06-23 | 1986-06-23 | Automatic phase control circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS632447A JPS632447A (en) | 1988-01-07 |
JPH069358B2 true JPH069358B2 (en) | 1994-02-02 |
Family
ID=15370435
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP61144787A Expired - Lifetime JPH069358B2 (en) | 1986-06-23 | 1986-06-23 | Automatic phase control circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH069358B2 (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01241907A (en) * | 1988-03-23 | 1989-09-26 | Fujitsu Ten Ltd | Demodulator for angular modulated signal |
-
1986
- 1986-06-23 JP JP61144787A patent/JPH069358B2/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JPS632447A (en) | 1988-01-07 |
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