JPH0693295B2 - Recording device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a recording device, and more particularly to a method of creating a pilot signal in a magnetic recording / reproducing device that performs tracking control using a pilot signal.

2. Description of the Related Art As a tracking control method for a magnetic recording / reproducing apparatus (hereinafter simply referred to as a VTR), there is a method using four types of pilot signals having different frequencies. This method is well known as a control method for a so-called 8 mm VTR, and therefore, its outline will be briefly described here.

FIG. 10 is a magnetization trajectory in which a pilot signal is recorded,
A ₁ , B ₁ , A ₂ , B ₂ , ... Are magnetization loci in which the video signals for one field are recorded as one track by the A head and the B head. f _{1 to} f ₄ are four types of pilot signals,
It is cyclically switched for each field, and superposed on the video signal and recorded. The frequency of each pilot signal is
1 when the horizontal synchronizing signal frequency is f _H, as shown in the figure, a frequency of about 6.5f _H ~10.5f _H.

At the time of reproduction, the pilot signals recorded on both adjacent tracks located before and after the main recording track scanned by the head are reproduced by a head wider than the recording track pitch or reproduced as a crosstalk signal. The control system is configured so as to be stable in that the levels of the pilot signals reproduced from the tracks are equal. With such a configuration, the head can perform on-track on the main scanning track for reproduction scanning.

Each pilot signal can be created by dividing a common signal having a constant frequency value. Common signal is NTSC
The signal has a frequency of 378 f _{H in} the method and 375 in the CCIR method.
It is a signal of frequency f _H. Here, the NTSC method will be described below as an example.

The simplest method of creating a pilot signal is to divide a 378f _H signal to create a rectangular wave signal, and this method is shown in FIG. In the figure, 1101 is a circuit for generating a signal having a frequency of 378f _H , and 1102 to 1105 are frequency dividing circuits having the frequency dividing ratios shown in the figure. The output signal of each frequency dividing circuit becomes a pilot signal of f _{1 to} f ₄ as shown in the figure. A multiplexer 1106 cyclically switches the signals f _{1 to} f ₄ for each field and sequentially outputs the signals to a terminal 1107. Switching of the multiplexer, the head switching signal (H · SW signal) supplied from the terminal 1108,
It is controlled by a signal obtained by dividing the H · SW signal by 1/2 in the circuit 1109. The H.SW signal is a signal that is phase-synchronized with the rotational phase of the rotary head that records and reproduces a video signal, and is a rectangular wave signal that switches between High and Low for each field.
There are four combinations of High and Low for the H · SW signal and the signal obtained by dividing the H · SW signal by 1/2. Therefore, if each pilot signal is output according to these four combinations,
The pilot signals of f _{1 to} f ₄ can be cyclically switched and output.

FIG. 8 is a diagram showing the frequency band of each signal. Reference numeral 801 is a luminance signal, which is FM-modulated between 4.2 MHz and 5.4 MHz. Reference numeral 802 is a color signal, which has been subjected to low frequency conversion using 743 KHz as a carrier signal. 803 is a pilot signal, about 1
It has a fundamental wave between 00KHz and 170KHz. Actually, there is a component of the FM audio signal, but it is omitted here.

When the pilot signal is a rectangular wave, odd harmonics are present, and these harmonics become noise components for the color signal. Assuming that the S / N ratio of the reproduced color signal is 40 dB or more, for example, the recording current of the nth harmonic of the pilot signal
It is necessary to set Ipn to Ipn / Ic ≦ −40 dB (1) with respect to the recording current Ic of the color signal.

On the other hand, the recording current Ip ₁ of the fundamental wave of the pilot signal is 8 mmVT
According to the R standard, Ip ₁ / Ic = -14dB ± 2dB (2).

Therefore, the harmonic level of the pilot signal with respect to the fundamental wave must satisfy the value Ipn / Ip ₁ ≤-28 dB (3), which is the value obtained by subtracting the strict condition of equation (2) from equation (1). Can be said.

Now, let's take a 50:50 square wave with a pilot signal of Dudy as an example. At this time, the even harmonics are zero,
If the order of the odd-numbered harmonics is n, the n-th harmonic level has a value of 1 / n with respect to the fundamental wave. Considering the pilot signal f ₁ (102 KHz) with the lowest frequency, its third harmonic is 306 KHz, and without a filter its level is 1 / 3≈−10 dB. Now, considering a 5th-order low-pass filter (LPF) with a break frequency at 200 KHz, L
The amount of attenuation by PF is Therefore, considering the attenuation of 1 / n, the value satisfies the condition of Eq. (3). However, the LRF that allows each pilot signal of about 100 KHz to 170 KHz to pass through without any level difference and has a break frequency at 200 KHz requires accuracy, and is constructed by using selected L and C components or the capacitor C. It is necessary to use an active filter or the like that is composed of a resistor R that is laser-trimmed according to the value. These LPFs are large in shape and expensive.

If the break frequency of the LPF can be set to about 300 KHz, each pilot signal of f _{1 to} f ₄ can be passed without any level difference even if there are some variations in the values of the components. Therefore, as described in JP-A-59-19224, a method of reducing the third harmonic to zero has been proposed. However, even in this method, it is necessary to sufficiently attenuate other harmonics. A high-order filter of the 5th order or so is required.

Further, in JP-A-59-140626, a triangular wave is created,
Although a method using a double integration filter has been proposed,
In order to pass the pilot signals of f _{1 to} f ₄ without any level difference, an LPF having a corner frequency of 300 KHz or higher is desirable for the above reason. In such an LPF, the third harmonic of f ₁ is almost nonexistent. It does not decay. Therefore, the attenuation of the third harmonic in the case of a triangular wave is about -19 dB according to the formula of 1 / n ² .

Further, in order to make the waveform as close as possible to the sine wave, a waveform as shown in FIG. 9 in which the sine wave is sampled and held at regular intervals can be considered. Although detailed description is omitted here, f ₁
In order to make the fundamental wave levels of ~ f ₄ almost equal, the sample time must be sufficiently short, which has the disadvantage of increasing the number of step waves.

Problems to be Solved by the Invention In the conventional method, disadvantages such as the need for a high-order LPF to sufficiently attenuate the harmonic components of the pilot signal and the need for a step wave with a large number of steps was there.

According to the present invention, it is possible to attenuate a harmonic component of a pilot signal to a necessary and sufficient value even with a relatively rough first-order LPF having a break frequency of about 300 KHz, and record the pilot signal together with the information signal. The purpose is to provide a device.

Means for Solving the Problems In the present invention, a common original signal is counted, and a staircase wave signal is produced which is increased or decreased at a predetermined equal value and at a constant level. The predetermined count value is 3 as described later.
The values are set to values that can be actually counted in order to bring the values of the next, fifth, and seventh harmonic components close to zero.

Action According to the above means, it is possible to obtain a staircase signal in which the values of the 3rd, 5th, and 7th harmonic components are sufficiently attenuated.
The first-order LPF having a corner frequency near 300 KHz can attenuate each harmonic up to the seventh harmonic and each harmonic above the ninth harmonic to a necessary and sufficient value. Since the staircase wave signal obtained at this time is a ± 4 step staircase wave signal that changes at the same level, a large number of steps is not required.

Further, the relative level difference of the values of the fundamental wave component of the staircase wave signal generated by the above means is 0.15 for each signal of f _{1 to} f _4.
Can be below dB.

Furthermore, since the staircase wave signal can be created without using an element having an inductance component and a capacitance component, the circuit configuration is suitable for an IC.

Practical Examples Before describing the embodiments of the present invention, the concept of a waveform that makes the value of the nth odd harmonic component zero is first described.

FIG. 6 is a diagram showing the concept that the value of the second harmonic component becomes zero. A rectangular wave with a duty of 50:50 is shown in FIG. It is well known that in such a rectangular wave, the value of the even harmonic component becomes zero. Now, consider this reason qualitatively. FIG. 2B shows the second-order harmonic component of the rectangular wave shown in FIG. 1A on the assumption that it actually exists. The second harmonic 604 indicated by the solid line can be considered to be generated by being excited at the rising edge of the rectangular wave indicated by 601 and 603. On the other hand, the second harmonic 605 indicated by the broken line can be considered to be generated by being excited at the falling edge indicated by 602. Therefore, the second harmonic generated by the rectangular wave shown in FIG. 6a becomes a composite signal of the respective second harmonics indicated by 604 and 605 and cannot actually exist.

The same idea can be applied to the n-th harmonic component.

FIG. 7 is a diagram showing a method for obtaining a waveform that makes the value of the third harmonic component zero. Reference numerals 701 and 702 shown in FIG. 10A are rectangular waves with a duty of 50:50, and the phases of both rectangular waves are the period T.
More than half of Is deviated by the amount of. The signal 703 shown in FIG. 7B is the third harmonic generated by the rectangular wave 701. Excited in the positive direction (upward on the paper) at the rising edge of the rectangular wave 701,
Excited in the negative direction on the falling edge. Since the timing of increasing / decreasing the third-order harmonic coincides with the direction of excitation at the rising and falling edges of the rectangular wave, the third-order harmonic (generally an odd-order harmonic) remains in the rectangular wave. The signal indicated by 704 is the third harmonic component of the rectangular wave 702. If they are combined with the third harmonics 703 and 704, they cancel each other out to zero. That is, the waveform obtained by synthesizing the rectangular waves 701 and 702 becomes a signal waveform having no even harmonics and no third harmonic components. This signal is the signal shown at 705 in FIG. 7c. The signal 706 shown in FIG. 7C is a staircase wave of the same shape as 705, but both signals are The phase is shifted by the time of. Therefore, signals 705 and 706
The signal obtained by combining and becomes a signal in which the value of each component of the even harmonics and the third and fifth harmonics becomes zero.

In a similar way, The values of the harmonic components of any order can be made zero by synthesizing the signals whose positions are shifted by just.

Although the above explanation is a qualitative explanation, if the staircase wave signal actually created based on this idea is expanded to the Fourier series, the value of the nth harmonic component becomes zero as described above. Has been confirmed.

In the present invention, based on this idea, the ± 4 step staircase wave signal shown in FIG. 1d is created.

FIG. 1 is a diagram showing a process of creating the staircase signal 110,
The combined signal of signals 102 and 103 is 104, the combined signal of signals 104 and 105 is 107, and the combined signal of signals 107 and 108 is 1
Shown in 10. The phase difference between the solid line and the broken line shown in the figure is half the period T, 1/3 for 103, 1/5 for 105,
109 is a value obtained by multiplying each value of 1/7. Therefore, the signal 110
Is a signal in which the values of the even harmonics and the odd harmonic components up to the seventh become zero. Further, the change width of each level of the signal 110 is equal. This is because the signals whose phases are shifted based on the signal 101 are added, and the level change is a value obtained by multiplying the level change of the signal 101 by an integer.

The t ₁ to t ₁₇ shown in FIG. 1e show the time when the level of the signal in FIG. 1d changes. Where t ₄ and t ₅
The time difference between is small. This time difference is the time of t ₅ And t ₄ time And the value is about 0.005T, so in practice
It is also possible to set t ₄ = t ₅ .

Next, it is sufficient to attenuate the even harmonics and the odd harmonics up to the 7th order in order to satisfy the condition shown in the equation (3) by using the first-order LPF having a break point at 300 KHz. This will be explained.

Let us consider the attenuation of harmonic components due to an LPF with a break frequency (hereinafter referred to as fl) of 300 KHz. Lowest pilot signal
The attenuation of the 9th harmonic of f ₁ (about 100KHz) is 300KHz / 900KHz
And about −10 dB. On the other hand, even with a normal square wave,
The level of the second harmonic is 1/9 of the level of the fundamental wave, that is, -19 dB. Therefore, the total is -29 dB, and the condition of the initial target of -28 dB or less can be satisfied. Therefore, the 7th harmonic component is attenuated to a necessary and sufficient value. First
If the signal shown in FIG. D110 is created, a pilot signal that does not affect the color signal can be created by the primary LPF.

Next, specific examples for realizing the present invention will be described.

FIG. 2 is a diagram showing an embodiment of the present invention, FIG. 3 is a more detailed block diagram of the decoder circuit section 212 shown in FIG. 2, and FIG. 4 is a pulse generation circuit 307 to 307 shown in FIG. 1 of 310
5 is a more detailed block diagram, FIG. 5 is a diagram showing an output waveform of a pilot signal and opening / closing timings of the switches 206 to 210 shown in FIG.

In FIG. 2, reference numerals 201 to 204 denote resistances, all of which have the same resistance value. 205 is when the power supply voltage is V _CC , Is a voltage source that outputs the value of. 206 is an analog switch, which is switched to the V _CC potential side and the ground potential side by a signal described later. The switches 207 to 210 are switches for sequentially extracting the potential divided by each resistor to the output terminal 211. The decoder circuit 212 is a circuit that produces signals for instructing opening and closing of the switches 206 to 210, and these instruction signals are produced from 378f _H and H · SW signals supplied from terminals 213 and 214.

Since all the resistors 201 to 204 have the same value, the potential between the resistors is 205. And the potential difference between the switch 206 and the common terminal of the switch 206 are equally divided. Now assume that switch 206 is connected to the V _CC side.
At this time, if any one of the switches is closed in the order of 210, 209, 208, 207, the potential obtained at the output terminal 211 increases by a constant potential.

Since the opening / closing timing of each switch is shown in FIG. 5, the description will be made below with reference to FIGS. 2 and 5.

In FIG. 5, (a) is a signal obtained at the output terminal 211. In the figure, (b), (c), (d), and (e) are signals indicating the open / closed states of the switches 210, 209, 208, and 207. Here, when the signals (b) to (e) are at the high level, it indicates that the corresponding switches are closed. The signal in FIG. 5 (f) indicates the open / closed state of the switch 206,
The switch 206 is connected to the V _CC side when the signal f is at the high level, and is connected to the ground potential side when the signal f is at the low level. During times 502-503, switch 206 is connected to the V _CC side. During this time,
If only one of the switches 207 to 210 is closed in the order of 210,209,208,207,208,209,210, the output terminal 211 will receive the signal 501 of the signal 501 shown in FIG. Higher half cycle voltage changes are obtained. Time 503
If the switch 206 is connected to the ground potential side at, since the switch closed at this time is 210, the output terminal 211
The potential obtained at It is a value that is a certain potential lower than. Then switch 209, 20
If only one switch is closed in the order of 8,207,209,210, the signal 501 Lower half cycle voltage changes can be obtained.

It is clear from the figure that the signals shown in FIGS. 5B to 5E are periodically repeated every half cycle of the signal (a). Further, in FIG. 5, it is assumed that the times t ₄ and t ₅ , and t ₁₂ and t ₁₃ described in FIG. 1e have the same value.

The open / close signal of each switch shown in FIG. 5 is generated by the decoder circuit 212 shown in FIG.
An embodiment will be described.

FIG. 3 shows an embodiment of the decoder circuit. Same figure 315-319
The signals corresponding to FIGS. 5B to 5F are output to the output terminals shown in FIG. 5B corresponding to FIGS. 3B to 3F. In FIG. 3, an H · SW signal is supplied from the terminal 301 and a reference signal of 378f _H is supplied from the terminal 302. 30
3 is a circuit that divides the H / SW signal in half. The ROM 304 is a ROM for outputting various preset values, and the circuit 305
Is a preset circuit for selecting and extracting each value supplied from the ROM 304 and setting a preset value of a preset counter (hereinafter simply referred to as a counter) 306. Counter 30
6 counts the signal of 378f _H from the preset value, and if it overflows, it is reset by the overflow signal 311 and counts from the preset value again. The overflow signal triggers the T flip-flop (T-FF) 312, and the output of the T-FF 312 becomes the signal shown in FIG. Table 1 shows the frequency division values required to obtain the pilot signals f _{1 to} f ₄ from 378f _H.

A preset value is set in the counter 306 so that the value will be half of each frequency division value shown in Table 1, for example, if f ₁ is 29, 29 counters will overflow. The preset value is H
A value corresponding to f _{1 to} f ₄ is selected by a combination of levels (4 types) of the SW signal and the H · SW signal divided in half. 307 to 310 are pulse generation circuits, and counter 306
It is a circuit that outputs a High or Low signal when the count value supplied from the device and the predetermined value supplied from the selection circuit 314 match. The pulse generation circuit will be described later. The selection circuit 314 selects and takes out each value set in the ROM 313 and supplies it to each of the pulse generation circuits 307 to 310. Select the value of ROM313 by 1 / H signal and H / SW signal.
It is performed by combining the levels of the signals divided by two. The ROM 313 stores the level change time of each signal in FIGS. 5B to 5E in association with the count value of the counter 306.

Next, the pulse generation circuit will be described.

FIG. 4 is a block diagram showing one of the pulse generating circuits 307 to 310 shown in FIG. 3, for example, the circuit of 308. In FIG. 4, 401 to 404 are coincidence circuits, and the counter 40
When the value of the signal 409 supplied from 9 and the value of the signal 410 supplied from the selection circuit 314 match, a pulse signal having a positive short time width is output. The output signal of each matching circuit is
For example, if the signal shown in FIG.
Each time (each count value) 505 to 508 from the match circuit 40
It matches the output timing of each circuit from 1 to 404. Circuit 405
And 406 are OR circuits, and the circuit 407 is a reset / set flip-flop circuit (RS-FF). The output signals of the matching circuits 401 and 403, that is, the positive pulse signals output at the timings of 505 and 507 are supplied to the set side of the RS-FF circuit 407, and the matching circuit 40 corresponding to the time of 506 and 508.
Since the output signals of 2 and 404 are supplied to the reset side of the RS-FF circuit 407, the output signal of the RS-FF circuit obtained at the terminal 408 becomes the signal shown in FIG. Note that the pulse signal after 508 can be obtained in the same way as described above because the counter 306 is reset at time 503. Also, as shown in the signal in FIG.
Between 1 and 503, the number of resets and sets is 1 each
It will be apparent that the two coincidence circuits and the OR circuit shown in FIG. 4 can be omitted if the signal is a one-time signal.

Next, a practical staircase signal according to the present invention, which corresponds to each pilot signal of f _{1 to} f ₄ , will be described.

In order to make the odd harmonic components up to the 7th order zero, the first
Although the signal described with reference to FIG. D is ideal, a clock signal with a very high frequency is required to create such an ideal staircase signal. Therefore, it is practical to use the 378f _H signal as a clock signal and count one clock at a time. The resolution at this time is limited by the frequency division value shown in Table 1 for each pilot signal. That is, for example, when the pilot signal of f ₁ is taken as an example, the level of the staircase signal can be changed only at any time of each timing obtained by dividing one cycle into 58. As a result of examining various combinations under such conditions,
It was found that the conditions shown in Table 2 are the most desirable.

The timing symbols shown in Table 2 are the same as the timing symbols shown in FIG. In addition, the level is standardized with the value of one step amount that changes at the same level as 1, for example,
The meaning of level 2 at the timing of t ₆ is that the level from the timing indicated by t ₆ to the next timing t ₇ is 2. Each count number is a value indicating how many counts have been started from the timing of t ₄ = t ₅ . Also t ₂₀ = t
It is clear that the timing of _{21 corresponds to} the timing of t ₄ = t ₅ .

Table 3 shows each harmonic level when each staircase signal satisfying the function shown in Table 2 is expanded by the Fourier series. The order of the harmonics, where 1 indicates the fundamental wave level, 2, 3, 4, ...
... indicates a harmonic component of the order corresponding to each numerical value. The harmonic level is displayed in (dB). Table 3
It is clear that each harmonic level can be attenuated to a necessary and sufficient value by combining the value shown in and the LPF having a break point at 300 KHz. From Table 3, it can be seen that the relative level change of each fundamental wave is suppressed to 0.15 dB or less.

The above is a detailed description of the present invention for the purpose of attenuating each harmonic component up to the 7th order. Generally, when it is desired to attenuate each harmonic component up to the nth order, It is known that it is sufficient to change the level at equal intervals by the number of steps of, and each timing for changing the level may be calculated according to the principle described so far.

In the description of the embodiments of the present invention, the value shown in Table 2 is used as the value of the count number for changing the level, but the count number at this time is an ideal value that makes the harmonic components up to the 7th order zero. Any value that is close to, and can be actually counted, and that attenuates the harmonic component to a required value is sufficient.

In the embodiment of the present invention, the method of changing the potential between the ground potential and the power supply voltage at the same level has been described as an example, but it is clear that the maximum amplitude of the staircase wave signal may be any value. Is.

Further, the concrete circuit for generating the step wave signal according to the present invention is not limited to the embodiment described here.

Furthermore, although the present invention has been described by taking four types of pilot signals as an example, the present invention can be applied to applications in which harmonic components need to be attenuated.

EFFECTS OF THE INVENTION As is clear from the above description, the staircase wave signal according to the present invention can sufficiently attenuate even harmonic components up to nth odd harmonic components, and therefore four types of the present invention are provided. If it is applied to the application of generating the pilot signal of, the harmonic component can be attenuated to a necessary and sufficient value by creating the step wave signal of ± 4 steps. Also,
The circuit configuration for creating the staircase wave signal does not include an inductance and a capacitance component, and is suitable for an IC.

[Brief description of drawings]

FIG. 1 is a waveform diagram showing a staircase wave signal and its preparation process according to the present invention, FIG. 2 is a circuit diagram showing an embodiment of the present invention, and FIG.
FIG. 4 is a block diagram showing an embodiment of a decoder circuit, FIG. 4 is a circuit diagram showing an embodiment of a pulse creating circuit, and FIG. 5 is a second step for creating a staircase signal according to the present invention.
FIG. 6 is a signal diagram showing the opening and closing timing of each switch of the embodiment shown in the figure, FIGS. 6 and 7 are waveform diagrams for explaining the basic idea of the present invention, and FIG. Fig. 9 is a characteristic diagram showing the frequency distribution of the information signal, Fig. 9 is a waveform diagram showing a pseudo sine wave signal, Fig. 10 is a recording magnetization locus diagram of the pilot signal, and Fig. 11 is a block diagram showing a conventional pilot signal generating circuit. is there. 110 …… staircase signal, 212 …… decoder circuit, 304 …… RO
M, 313 …… ROM, 314 …… Selection circuit, 401-404 …… Match circuit.

Claims (2)

[Claims] 1. A second signal is created by synthesizing a first signal and a signal obtained by shifting the phase of the first signal, and then the phase of the second signal is shifted from that of the second signal. Is a step wave signal waveform created by synthesizing a signal that is sequentially synthesized and a signal that is out of phase with each other as if the third signal is generated by synthesizing the first signal, When the period is T and the rectangular wave has a duty of 50:50, and n = 3, 5, 7, 9, 11, ..., the phase shift amount is sequentially set. Recording the staircase signal waveform created by shifting to any n greater than or equal to n = 7, or a staircase signal signal that can be actually created that approximates this staircase signal waveform together with the main information signal to be recorded. Recording device characterized by. 2. The recording according to claim 1, wherein a staircase wave signal is used as a pilot signal for tracking control, and a staircase wave signal created with a maximum value of n is 7. apparatus.