JPH0691161B2 - Method for forming insulating film of semiconductor device - Google Patents

Method for forming insulating film of semiconductor device

Info

Publication number
JPH0691161B2
JPH0691161B2 JP30163386A JP30163386A JPH0691161B2 JP H0691161 B2 JPH0691161 B2 JP H0691161B2 JP 30163386 A JP30163386 A JP 30163386A JP 30163386 A JP30163386 A JP 30163386A JP H0691161 B2 JPH0691161 B2 JP H0691161B2
Authority
JP
Japan
Prior art keywords
wiring
film
semiconductor device
insulating layer
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP30163386A
Other languages
Japanese (ja)
Other versions
JPS63155746A (en
Inventor
俊一 福山
昭二 芝
和正 斎藤
陽子 川崎
慶二 渡部
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP30163386A priority Critical patent/JPH0691161B2/en
Publication of JPS63155746A publication Critical patent/JPS63155746A/en
Publication of JPH0691161B2 publication Critical patent/JPH0691161B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Description

【発明の詳細な説明】 〔概 要〕 多層配線構造体の導体配線層間の絶縁層をポリりん酸シ
ロキサン共重合体膜として、またはポリりん酸シロキサ
ン共重合体膜と無機物質膜との二重膜として形成し、こ
れによって導体配線層による段差を平坦化し、かつ配線
の切断および短絡ならびに絶縁層のクラック発生を防止
する。
DETAILED DESCRIPTION OF THE INVENTION [Outline] An insulating layer between conductor wiring layers of a multilayer wiring structure is used as a polyphosphoric acid siloxane copolymer film or a double layer of a polyphosphoric acid siloxane copolymer film and an inorganic material film. It is formed as a film, thereby flattening the step due to the conductor wiring layer and preventing disconnection and short circuit of the wiring and generation of cracks in the insulating layer.

〔産業上の利用分野〕[Industrial application field]

本発明は半導体集積回路に使用する多層配線構造体に関
する。
The present invention relates to a multilayer wiring structure used in a semiconductor integrated circuit.

〔従来の技術〕[Conventional technology]

多層配線構造体の導体配線層間の絶縁層として、従来は
二酸化けい素、窒化けい素、アルミナ、りんガラスなど
の無機物質、またはポリイミド、シリコーンなどの樹脂
を使用していた。
As an insulating layer between conductor wiring layers of a multilayer wiring structure, conventionally, an inorganic substance such as silicon dioxide, silicon nitride, alumina, phosphor glass, or a resin such as polyimide or silicone has been used.

第2図を参照して無機物質膜について説明する。蒸着ま
たはCVD(chemical vapor deposition)によって形成さ
れる無機物質膜4は段差被覆性が悪いので、金属導体配
線2および上下配線接続部による段差がそのまま残る。
従って絶縁層4上の配線を微細化することが困難であ
り、配線の切断7および配線の短絡8を生じる問題があ
る。
The inorganic material film will be described with reference to FIG. Since the inorganic material film 4 formed by vapor deposition or chemical vapor deposition (CVD) has poor step coverage, the steps due to the metal conductor wiring 2 and the upper and lower wiring connecting portions remain as they are.
Therefore, it is difficult to miniaturize the wiring on the insulating layer 4, and there is a problem that the wiring is cut 7 and the wiring is short-circuited 8.

次に第3図を参照して樹脂膜について説明する。スピン
コートして250℃〜350℃に加熱し硬化させたポリイミド
などの耐熱性樹脂は膜厚が厚いので、絶縁層3はその下
の配線などによる段差をかなり平坦化することができる
が、この樹脂は500℃において熱分解を開始すること、
および吸湿しやすい問題がある。
Next, the resin film will be described with reference to FIG. Since the heat-resistant resin such as polyimide, which is spin-coated and heated to 250 ° C. to 350 ° C. and hardened, has a large film thickness, the insulating layer 3 can considerably flatten the step due to the wiring thereunder. The resin starts thermal decomposition at 500 ° C,
And there is a problem that it easily absorbs moisture.

有機溶剤に可溶なシリコーン樹脂もスピンコートして25
0℃〜350℃に加熱し硬化させる。樹脂膜3は段差をかな
り平坦化することができ、かつ窒素気流中で500℃で1
時間加熱しても熱分解は起こらない。しかし、この樹脂
膜3を通して上下配線2を接続した後に、窓明け用マス
クに使用したレジストを酸素プラズマでアッシングする
とき、または500℃、1時間の加熱後に膜厚10μm程度
に積層された部分の樹脂層にクラックを発生するという
問題がある。
Silicone resin soluble in organic solvent is also spin-coated 25
Heat to 0 ° C-350 ° C to cure. The resin film 3 can flatten the level difference considerably, and it is 1 at 500 ° C in a nitrogen stream.
No thermal decomposition occurs even when heated for hours. However, after connecting the upper and lower wirings 2 through the resin film 3, when the resist used for the window opening mask is ashed with oxygen plasma, or after heating for 1 hour at 500 ° C. There is a problem that cracks occur in the resin layer.

また、これらの膜を組み合わせて使用しても上記問題を
完全に解決することはできない。
Further, even if these films are used in combination, the above problems cannot be completely solved.

〔発明が解決しようとする問題点〕[Problems to be solved by the invention]

多層配線構造の半導体装置は、導体配線層によって絶縁
層に段差を形成するので、上部配線の切断および短絡を
生じ、かつ加熱によって絶縁膜の熱分解およびクラック
を生ずる問題がある。
A semiconductor device having a multilayer wiring structure has a problem that a step is formed in the insulating layer by the conductor wiring layer, so that the upper wiring is cut and short-circuited, and the insulating film is thermally decomposed and cracked by heating.

〔問題点を解決するための手段〕[Means for solving problems]

上記問題点は、一般式 (式中、Rは水素、低級のアルキル基またはアリール基
を示し、nおよびmは正の整数である)で表わされるポ
リりん酸シロキサン共重合体を配線層間絶縁層とするこ
とを特徴とする半導体装置によって解決することができ
る。
The above problem is a general formula (Wherein R represents hydrogen, a lower alkyl group or an aryl group, and n and m are positive integers), and the polyphosphoric acid siloxane copolymer is used as the wiring interlayer insulating layer. It can be solved by a semiconductor device.

〔実施例〕〔Example〕

ジメチルジクロルシラン100gと、ジクロルりん酸メチル
100gと、メチルイソブチルケトン200mlとを室温(20
℃)で混合し、これにイオン交換水50mlを滴下した。滴
下終了後、反応溶媒を200℃で10時間加熱して重合反応
を行った。この反応液は、溶媒を徐々に除去して完全に
乾燥させた。こうして得られた生成物は、赤褐色の固形
物であり、重量平均分子量は1×104であり、w/n
は1.6であった。
100 g of dimethyldichlorosilane and methyl dichlorophosphate
100 g and 200 ml of methyl isobutyl ketone are mixed at room temperature (20
(° C) and mixed with 50 ml of ion-exchanged water. After completion of dropping, the reaction solvent was heated at 200 ° C. for 10 hours to carry out a polymerization reaction. The reaction solution was dried by removing the solvent gradually. The product thus obtained is a reddish brown solid, has a weight average molecular weight of 1 × 10 4 , and has a w / n
Was 1.6.

このものは赤外吸収スペクトルが、1100cm-1付近にシロ
キサンに関する吸収が、1020cm-1付近にりん酸に関する
吸収が認められた。また、酸素雰囲気中での熱重量分析
から、380℃付近でSi−CH3の熱酸化が、550℃付近でP
−O−CH3の熱酸化が観測され、生成物がポリりん酸シ
ロキサン共重合体であることを確認した。
This compound infrared absorption spectrum, absorption relates siloxane around 1100 cm -1 were observed absorption relates phosphate in the vicinity of 1020 cm -1. Also, from thermogravimetric analysis in an oxygen atmosphere, thermal oxidation of Si—CH 3 at around 380 ° C. and P at around 550 ° C.
Thermal oxidation of —O—CH 3 was observed, confirming that the product was a polyphosphoric acid siloxane copolymer.

第1図に示すように、(a)シリコン基板1の上に膜厚
1.0μmのアルミニウム配線層2を形成し(b)その上
に前記ポリりん酸シロキサン共重合体の35wt%メチルイ
ソブチルケトン溶液を3,000rpmでスピンコートした。こ
れを120℃で10分間加熱して乾燥させ、さらに450℃で1
時間加熱して硬化させた。こうして形成した膜厚1.2〜
1.5μmの硬化膜3の上に(c)さらに膜厚1.0μmのり
んガラス(PSG)膜4をCVDにより形成した。(d)次に
第一配線層と、第二配線層との接続を行うために、ホト
レジスト(商品名AZ1350J)5をマスクとしてCF4プラズ
マにより絶縁層をエッチングしてスルーホール6を形成
し、(e)酸素プラズマによりレジスト5の除去を行
い、(f)さらに第二配線層とする膜厚1.0μmのアル
ミニウム2を蒸着により形成して第一配線層のアルミニ
ウムと接続させた。このようにして製造した多層配線構
造体は、電圧25Vを印加してもリーク電流を示さなかっ
た。
As shown in FIG. 1, (a) the film thickness on the silicon substrate 1.
An aluminum wiring layer 2 having a thickness of 1.0 μm was formed, and (b) a 35 wt% solution of the polyphosphoric acid siloxane copolymer in methyl isobutyl ketone was spin-coated at 3,000 rpm. This is heated at 120 ° C for 10 minutes to dry, and then at 450 ° C for 1 minute.
Heated and cured for hours. The film thickness thus formed 1.2 ~
(C) A phosphor glass (PSG) film 4 having a thickness of 1.0 μm was formed on the cured film 3 having a thickness of 1.5 μm by CVD. (D) Next, in order to connect the first wiring layer and the second wiring layer, the through hole 6 is formed by etching the insulating layer with CF 4 plasma using the photoresist (product name AZ1350J) 5 as a mask. (E) The resist 5 was removed by oxygen plasma, and (f) aluminum 2 having a film thickness of 1.0 μm to be the second wiring layer was further formed by vapor deposition and connected to the aluminum of the first wiring layer. The multilayer wiring structure manufactured in this manner did not show a leak current even when a voltage of 25 V was applied.

実施例2 工程(c)の無機膜を形成しないことの他は、実施例1
と同様にして、多層配線構造体を製造した。この多層配
線構造体は、電圧20Vを印加してもリーク電流を示さな
かった。
Example 2 Example 1 except that no inorganic film is formed in step (c)
A multilayer wiring structure was manufactured in the same manner as in. This multilayer wiring structure did not show a leak current even when a voltage of 20 V was applied.

比較例1 実施例の工程(b)を行なわないことの他は実施例1と
同様にして、第一配線層と第二配線層との間に膜厚1.0
μmのりんガラス膜4をCVDにより形成して多層配線構
造体を製造した。電圧13Vで1mAに近いリーク電流を示し
た。
Comparative Example 1 Similar to Example 1, except that the step (b) of Example was not performed, the film thickness between the first wiring layer and the second wiring layer was 1.0.
A μm phosphorous glass film 4 was formed by CVD to manufacture a multilayer wiring structure. It showed a leak current close to 1mA at a voltage of 13V.

比較例2 りんガラス膜4を蒸着により形成したことの他は比較例
1と同様にして多層配線構造体を製造した。電圧10Vで1
mAを超えるリーク電流を示した。
Comparative Example 2 A multilayer wiring structure was manufactured in the same manner as Comparative Example 1 except that the phosphorus glass film 4 was formed by vapor deposition. 1 at 10V
It showed a leakage current exceeding mA.

〔発明の効果〕〔The invention's effect〕

本発明の共重合体膜は、その下に位置する導体配線層に
よる段差を平坦化することができるので配線の切断およ
び短絡を生じることがなく、かつ500℃で熱分解せず、
膜厚を500℃で10μmとしてもクラックを生じることが
ない。
The copolymer film of the present invention is capable of flattening the step due to the conductor wiring layer located thereunder, thus causing no disconnection and short circuit of the wiring, and not thermally decomposing at 500 ° C.,
No crack occurs even if the film thickness is 500 μC and 10 μm.

【図面の簡単な説明】[Brief description of drawings]

第1図は本発明の多層配線構造体の製造工程図であり、 第2図は本発明の他の実施態様である共重合体のみを絶
縁層とする多層配線構造体の断面図であり、 第3図は従来の無機物質のみを絶縁層とする多層配線構
造体の断面図である。 1……基板、2……導体配線層、 3……ポリりん酸シロキサン共重合体膜、 4……無機物質膜、5……レジスト、 6……窓、7……配線の切断、 8……配線の短絡。
FIG. 1 is a manufacturing process diagram of a multilayer wiring structure of the present invention, and FIG. 2 is a sectional view of a multilayer wiring structure having only a copolymer as an insulating layer, which is another embodiment of the present invention. FIG. 3 is a cross-sectional view of a conventional multi-layer wiring structure using only an inorganic material as an insulating layer. 1 ... Substrate, 2 ... Conductor wiring layer, 3 ... Polyphosphoric acid siloxane copolymer film, 4 ... Inorganic substance film, 5 ... Resist, 6 ... Window, 7 ... Wiring cut, 8 ... … Short wiring.

フロントページの続き (72)発明者 川崎 陽子 神奈川県川崎市中原区上小田中1015番地 富士通株式会社内 (72)発明者 渡部 慶二 神奈川県川崎市中原区上小田中1015番地 富士通株式会社内Front page continuation (72) Inventor Yoko Kawasaki 1015 Kamiodanaka, Nakahara-ku, Kawasaki City, Kanagawa Prefecture, Fujitsu Limited

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】一般式 (式中、Rは水素、低級のアルキル基またはアリール基
を示し、nおよびmは正の整数である)で表わされるポ
リりん酸シロキサン共重合体を配線層間絶縁層とするこ
とを特徴とする半導体装置。
1. A general formula (Wherein R represents hydrogen, a lower alkyl group or an aryl group, and n and m are positive integers), and the polyphosphoric acid siloxane copolymer is used as the wiring interlayer insulating layer. Semiconductor device.
【請求項2】前記ポリりん酸シロキサン共重合体単独、
またはこれと無機物質との組合せを配線層間絶縁層とす
る、特許請求の範囲第1項記載の半導体装置。
2. A homopolymer of the polyphosphoric acid siloxane copolymer,
The semiconductor device according to claim 1, wherein a wiring interlayer insulating layer is formed of a combination of this and an inorganic substance.
JP30163386A 1986-12-19 1986-12-19 Method for forming insulating film of semiconductor device Expired - Lifetime JPH0691161B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP30163386A JPH0691161B2 (en) 1986-12-19 1986-12-19 Method for forming insulating film of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP30163386A JPH0691161B2 (en) 1986-12-19 1986-12-19 Method for forming insulating film of semiconductor device

Publications (2)

Publication Number Publication Date
JPS63155746A JPS63155746A (en) 1988-06-28
JPH0691161B2 true JPH0691161B2 (en) 1994-11-14

Family

ID=17899293

Family Applications (1)

Application Number Title Priority Date Filing Date
JP30163386A Expired - Lifetime JPH0691161B2 (en) 1986-12-19 1986-12-19 Method for forming insulating film of semiconductor device

Country Status (1)

Country Link
JP (1) JPH0691161B2 (en)

Also Published As

Publication number Publication date
JPS63155746A (en) 1988-06-28

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