JPH0690384A - Gamma correction circuit - Google Patents

Abstract

PURPOSE:To obtain an output with a smooth gamma correction value in a gamma correction circuit for a display device. CONSTITUTION:In the gamma correction circuit employing a ROM 2 as a table and obtaining a gamma correction output based on data read from the ROM 2, data of the ROM 2 are used for high-order bits and an input video signal is given to a synchronizing separator circuit 4, in which the signal is separated into a horizontal synchronizing signal and a vertical synchronizing signal. Dot clocks in the horizontal direction of a picture are counted by a 1st counter 6 based on the horizontal synchronizing signal and horizontal lines are counted by a 2nd counter 7 based on the vertical synchronizing signal. The counted values are used as an address of a dither ROM 8 to read low-order bit data of data from the ROM 2 and the data of the dither ROM 8 are read repetitively over the entire picture to increase a data bit number for analog conversion in a D/A converter circuit 9.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a gamma correction circuit used in a liquid crystal projector or the like.

[0002]

2. Description of the Related Art Conventionally, this type of gamma correction circuit has a structure shown in FIG. 4, for example, and corresponds to an A / D conversion circuit 1 for digitally converting an input video signal and a gamma characteristic of a liquid crystal display device in advance. A gamma correction ROM (hereinafter referred to as ROM) 2 that stores gamma correction data and uses the digital signal from the A / D conversion circuit 1 as an address;
A D / A converter 3 for analog-converting the data read from the ROM 2 is provided, and the analog-converted signal is used as a gamma correction output of the liquid crystal display device. As described above, by using the ROM 2 as a table, it is possible to obtain the control signal for correcting the gradation characteristic of the liquid crystal display by the input signal.

[0003]

By the way, when the above-mentioned gamma correction circuit performs gamma correction of 2.2, the luminance difference level of the display image by the input video signal is large as shown in the graph of FIG. 5, for example. By the way, since the gamma correction value largely changes, vertical stripes are generated on the screen, and in the case of a color image, for example, there is a drawback that the brightness difference portion looks green.

To solve this, the A / D conversion circuit 1 is used.
You can increase the number of bits of
The D conversion circuit is expensive, which increases the cost.

The present invention has been made in view of the above problems, and an object thereof is to increase the number of bits of data for obtaining a gamma correction output, obtain a smooth gamma correction output, and have a large luminance difference. An object of the present invention is to provide a gamma correction circuit capable of smoothing an image and smoothing gradation.

[0006]

In order to achieve the above object, the present invention uses a ROM as a table when displaying an image (image) by an input image signal, and stores data read from the ROM in a D In a gamma correction circuit that performs A / A conversion into a gamma correction signal, first A / D conversion means for digitally converting the input video signal and predetermined gamma correction data are stored in advance, and the first A / D conversion is performed. Storage means capable of reading data of gamma correction corresponding to the input video signal by using the data obtained by the means as an address, and dither for outputting a threshold of a dither matrix to horizontal and vertical synchronizing signals of the input video signal. The matrix means and the data read from the memory are used as the upper bits, and the data obtained by the dither matrix means is Position as a bit, is characterized in that a D / A converting means the data constituted by these upper and lower bits into analog and control signals of the gamma correction.

[0007]

With the above structure, data (threshold value) is read from the dither ROM corresponding to each pixel of the screen, and this data is stored in the storage means (gamma correction ROM).
The lower bit of the original data for gamma correction read from is added, and the number of data bits for obtaining the gamma correction output is increased by adding the lower bit data.

As a result, the gamma correction output obtained by the D / A conversion means is made smooth,
Even when there is a large difference in the brightness of the image, the gamma correction value does not change extremely, and vertical stripes do not occur at the boundary of the brightness difference on the screen.

[0009]

BEST MODE FOR CARRYING OUT THE INVENTION The present invention is a gamma correction circuit that uses a ROM as a table to obtain a gamma correction output based on an input video signal, and converts the data read from the ROM by digitally converting the input video signal. As the upper bits, the threshold value of the systematic dither matrix is called to this upper bit data and added as lower bit data, and the added upper bit data and lower bit data are converted to analog, that is, D / A conversion is effective. The number of target bits is increased to obtain a gamma-corrected output that smooths a sudden change in the video (image) level.

Therefore, as shown in FIG. 1, the gamma correction circuit of the present invention synchronizes with the horizontal synchronizing signal of the input video signal and the sync separating circuit 4 for separating the horizontal synchronizing signal and the separated horizontal synchronizing signal. And a dot clock reproducing circuit 5 for reproducing a dot clock of a predetermined frequency (sample clock used by the driver of the display), and a first counter (counting this dot clock, which is cleared by the separated horizontal synchronizing signal). (Horizontal counter) 6, a second counter (vertical counter) 7 that counts the separated horizontal synchronizing signal and is cleared by the separated vertical synchronizing signal, and the first and second counters 6, 7 The count value of is used as an address (for example, 2 bits each), and the data from the gamma correction ROM (hereinafter referred to as ROM) 2 is used. A dither ROM8 to enable reading the lower bit data (e.g. 4 bits data),
Data composed of high-order bits and low-order bits read from ROM 2 and dither ROM 8 (12 bits)
And a D / A conversion circuit (for example, 12-bit) 9 that converts the analog signal into a gamma-corrected output.

In the figure, the same parts as those in FIG. Further, since the systematic dither method uniquely determines the threshold value for binarization depending on the position, the dither ROM 8 may be, for example, the Bayer shown in FIG.
The r) type is used to obtain the lower 4-bit data.

Next, the operation of the gamma correction circuit having the above configuration will be described with reference to the schematic diagram of the dither ROM in FIG. 2 and the display screen diagram in FIG. 3 when displaying an image by an input video signal on a liquid crystal display. The input video signal is A /
It is converted into a digital signal by the D conversion circuit 1, and the gamma correction data is read from the gamma correction ROM (hereinafter referred to as ROM) 2 by this digital signal. At this time, the horizontal and vertical sync signals of the input video signal are separated by the sync separation circuit 4, and the dots in the horizontal direction of the screen 10 are counted by the first counter 6 based on this horizontal sync signal, and the above vertical The horizontal synchronizing signal of the screen 10 is counted by the second counter 7 based on the synchronizing signal.

Then, the data (threshold value) of the dither ROM 8 is read by the count values of the first and second counters 6 and 7. In this case, as shown in FIG. 3, there are 0 to 15 elements of the Bayer matrix, which are assigned from (0000) to (1111).

Therefore, the D / A conversion circuit 9 includes:
Similarly to the conventional case, 8-bit data read from the ROM 2 is used as upper bits, and 4-bit data read from the dither ROM 8 is input as lower bits.
The bit data is converted to analog to obtain a gamma correction control signal.

The above Bayer type matrix is 16
Since it is a single piece, dither RO is applied to the screen 10.
The data of M8 is repeatedly read on the entire screen 10 (shown by the broken line in FIG. 3).

As described above, the original gamma correction data of the ROM 2 used as the gamma correction table is set as the upper bit, and the number of bits is set by using the data (threshold value) by the dither ROM 8 as the lower bit of the upper bit data. Since the data with the increased number of bits is analog-converted into the gamma correction output, smooth correction output can be obtained even in the case where the brightness difference is large, and vertical stripes appear in the display image (image) by the input video signal, for example. It does not occur, and in the case of a color image, the boundary of brightness does not appear as green. That is, it becomes difficult to understand the difference in brightness of the display image, that is, the gradation of the display image at that position becomes smooth. Further, since it is not necessary to use the A / D conversion circuit 1 having a large number of bits, the cost can be reduced.

[0017]

As described above, according to the present invention, the input video signal is digitally converted into an address of the gamma correction ROM as a table for gamma correction, and the data read from the gamma correction ROM is used. In the gamma correction circuit that converts the analog signal to output the gamma correction control signal, while counting the screen dot clock based on the horizontal sync signal of the input video signal, the horizontal sync signal based on the vertical sync signal of the input video signal Are counted, the data (threshold value) of the dither ROM is read using these count values as addresses of the dither ROM, and the read data is used as the lower bit of the data read from the ROM for D / A conversion. Increase the number of bits,
Since the data with the increased number of bits is converted into an analog output for gamma correction output, smooth gamma correction output can be obtained, and vertical stripes do not occur where the level difference of the display image is large. It is possible to increase the number of bits of the data for obtaining the gamma correction output with a relatively simple circuit, since the boundary of luminance does not appear to be green, and there is no need to use an A / D conversion circuit having a large number of bits.

[Brief description of drawings]

FIG. 1 is a schematic block diagram of a gamma correction circuit showing an embodiment of the present invention.

FIG. 2 is a schematic diagram of a dither ROM used in the gamma correction circuit shown in FIG.

FIG. 3 is a schematic partial screen view for explaining the operation of the gamma correction circuit shown in FIG.

FIG. 4 is a schematic block diagram of a conventional gamma correction circuit.

5 is a schematic graph illustrating the operation of the gamma correction circuit shown in FIG.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 A / D conversion circuit (8 bits) 2 Gamma correction ROM (storage means) 4 Sync separation circuit 5 Dot clock reproduction circuit 6 First counter 7 Second counter 8 Dither ROM (4 bits) 9 D / A conversion Circuit (12 bits)

Claims (2)

[Claims] 1. A gamma correction circuit that obtains a gamma correction output based on data obtained by digitally converting an input video signal when displaying an image based on the input video signal on a display. A / D conversion means, data for predetermined gamma correction are stored in advance, and the first A
A storage unit capable of reading the data for gamma correction corresponding to the input video signal by using the data obtained by the D / D conversion unit as an address, and a dither matrix based on the horizontal and vertical synchronization signals of the input video signal. A dither matrix means for outputting a threshold value, the data read from the storage means as upper bits, the data obtained by the dither matrix means as lower bits, and the data composed of these upper bits and lower bits is analog. A gamma correction circuit for a liquid crystal display, comprising: a D / A conversion means for converting to a gamma correction output. 2. The dither matrix means includes a sync separation means for separating horizontal and vertical sync signals of the input video signal, and a dot clock for generating a dot clock for the display in synchronization with the separated horizontal sync signal. Generating means and a first counter which counts the generated dot clock and uses the horizontal synchronizing signal as a clear signal;
A second counter that uses the horizontal synchronizing signal as a count and the vertical synchronizing signal as a clear signal and a threshold value of the dither matrix are stored in advance, and the count values of the first and second counters are used as addresses. 2. A dither ROM capable of reading a threshold value.
The gamma correction circuit described.