JPH10145806A - White balance adjustment circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To conduct detailed white balance adjustment even with a small memory capacity in a video display device on which a digital video signal is displayed. SOLUTION: Digital video signals S1r,... are given to addresses of RAMs 2r,... and video signals S2r,... subject to gamma correction are outputted. An MPU 5 and a white balance processing section 6a select corresponding data from an LUT 4 to obtain new sets of RGB of gamma correction data. For example, when R2, G3, B1 are used for new RGB sets, the MPU 5 sets an address translation value to an address translation section 3 so that data of the R2, G3, B1 are read from the LUT 4. The MPU 5 selects an output from the MPU sequentially for address changeover device 1r, 1g, 1b according to the procedure of a gamma correction processing section 6b and the LUT 4 is read by an address translated by the address translation unit 3 and the data are written in the RAMs 2r, 2g, 2b.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a white balance adjustment circuit which can be used for a PDP or the like for displaying television images or the like using digital signals and which can perform fine white balance adjustment with a small memory capacity.

[0002]

2. Description of the Related Art In a video display device for inputting and displaying a digital video signal such as a PDP, it is necessary to convert an input analog video signal into a digital video signal by A / D conversion. In this case, it is not desirable to adjust the white balance by changing the RBG ratio while changing the input level of the analog video signal, because of a reduction in S / N and digital signal processing at a subsequent stage. Therefore, generally, LUT (Look Up Ta)
The white balance is adjusted by changing the RGB ratio by a gamma correction circuit of the ble) system. However, in order to perform fine white balance adjustment by this method, it is necessary to have many types of RGB ratio data, and there is a problem that the memory capacity of the LUT increases.

[0003]

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned problems, and provides an image display apparatus for displaying an image by a digital signal, which can perform fine white balance adjustment with a small memory capacity. The purpose is to do.

[0004]

A plurality of sets of correction data of R (red), G (green), and B (blue) for gamma correction for correcting linearity of display luminance are stored for white balance adjustment. A memory, a gamma correction unit that reads data from the memory and performs gamma correction for each of the RGB colors, an address conversion unit that converts a read address of the memory, and an address data specification unit that specifies data of the address conversion unit.
By manipulating the address from which data is read from the memory from the address data designating section, a plurality of sets of RG
The white balance is adjusted by selecting arbitrary RGB data from the B data and forming a new RGB set with data having an arbitrary ratio of RGB, thereby performing fine white balance adjustment with a small memory capacity. .

[0005]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS In a white balance adjustment circuit of a video display device such as a PDP which displays a digital video signal as an input video signal, correction data of each of RGB colors for gamma correction for correcting linearity of display luminance is provided. A memory storing a plurality of sets for white balance adjustment, a gamma correction unit for reading data from the memory and performing gamma correction for each of RGB, an address conversion unit for converting a read address of the memory, and an address conversion unit. An address data designating unit for designating data is provided, and by operating an address for reading data from the memory from the address data designating unit, arbitrary RGB data is selected from the plurality of sets of RGB data of gamma correction. The white balance is adjusted by using a new set of RGB.

The gamma correction section comprises a RAM (Random Access Memory) for inputting an input video signal as an address and outputting gamma-corrected data, wherein the address conversion section converts the address and reads the memory. Is written in the RAM.

The address conversion unit includes an offset register for storing a difference between a start address of the memory and a start address of arbitrary data in RGB data, an output of the offset register, and an address of the memory before conversion. It consists of an adder for adding.

The writing of the gamma correction data into the RAM is performed during a vertical blanking period of the input video signal.

The gamma correction section and the memory have a ROM for inputting an input video signal to a lower address, inputting a selection address of gamma correction data for adjusting white balance to a higher address, and outputting gamma corrected data. (Re
ad only memory), and the address conversion unit is an address register that stores an address storing arbitrary data in the RGB, which is a high-order address for selecting gamma correction data.

[0010] The address is stored in the address register during a vertical blanking period of the input video signal.

[0011]

FIG. 1 shows (A) a main block diagram, (B) a memory map of an LUT, and (C) gamma correction characteristics of an embodiment of a white balance adjustment circuit according to the present invention. For example, an input digital video signal S1 composed of an 8-bit RGB signal
r, S1g, and S1b are input to the addresses of the RAMs 2r, 2g, and 2b, respectively, and the video signal S2 gamma-corrected by the gamma correction data stored in the RAM in advance.
r, S2g and S2b are output, and PDP etc. (not shown)
And display it on the video display device. The gamma correction characteristic is corrected so that the total gamma value becomes 1 when an input video signal adjusted to a CRT having a gamma value of approximately 2.2 is displayed on a PDP having a gamma value of approximately 1. That is, the output video signal S2 is the 2.2 power of the input video signal S1. In order to adjust the white balance using this gamma correction, the RGB signal level ratio of the gamma correction data is changed.

When adjusting the white balance of a video display device according to an external command from the remote controller 7 or the like, the MPU
5 according to the procedure of the white balance processing unit 6a,
RG according to the up / down instruction of each color signal level of GB
The ratio of B is changed. The LUT 4 stores RGB gamma correction data of various signal levels. For example, a set of gamma correction data R1, G1, B1, R2, G2,
The sets of B2 are set so that the output signal level becomes smaller in the order of each set. Note that the gamma correction data R1, G
Each of 1,... Becomes 256 bytes of data in the case of an 8-bit video signal according to the number of gradations of the video signal.
The MPU 5 and the white balance processing unit 6a execute the LU control in accordance with the up / down commands for each color level of the white balance adjustment.
The corresponding data is selected from T to be a new RGB set of gamma correction data. As an example, when a display unit such as a PDP emits green (G) light intensely, blue (B) is weak, and red (R) is intermediate, R2, G3, and B1 represent RGB values of new gamma correction data. It is assumed that white balance can be obtained when a pair is formed. In this case, the MPU 5 sets the address conversion value in the address conversion unit 3 so that the data of R2, G3, and B1 are read from the LUT 4.

When the white balance adjustment circuit performs gamma correction and white balance adjustment to output the video signal S2, the MPU 5 follows the procedure of the gamma correction processing unit 6b at the leading edge of the vertical synchronizing signal S3 to switch the address switch 1r. 1g, 1
b is sequentially switched to the output from the MPU, and the output is converted to the LUT with the address converted by the address converter 3.
4 is read and the data is sequentially read from the RAMs 2r, 2g, 2
Write to b. By performing this writing during the vertical blanking period, the signal of the subsequent video portion is gamma-corrected by the above-described gamma correction characteristics, and an output S2 in which white balance is adjusted is obtained. A new (RGB) set for performing gamma correction and white balance adjustment in this manner is the above (R)
2, G3, B1), (R1, G1, B2),
(R1, G1, B3), (R1, G2, B1), (R
1, G3, B1), (R2, G1, B1),... Can be used.

FIG. 2 shows an embodiment of the address converter of the white balance adjustment circuit according to the present invention. Address translation unit 3
Is an offset register 3a for storing the difference between the start address of the LUT 4 and the start address of new RGB data.
r, 3ag, 3ab and offset registers 3ar, 3a
g, 3ab, and an adder 3b for adding an address before conversion from the MPU 5. The MPU 5 calculates the offset address as described above according to the procedure of the white balance processing unit 6a, and
ar, 3ag, and 3ab are set. For example, in the above example, the start addresses of R2, G3, and B1 of the LUT are set in the offset registers 3ar, 3ag, and 3ab. RA
When writing gamma correction data into M2r, 2g, and 2b, the outputs of the offset registers 3ar, 3ag, and 3ab are sequentially switched by the switch 3c and output to the adder 3b.

FIG. 3 is a block diagram of a main part of another embodiment of the white balance circuit according to the present invention. Various gamma correction data R1, R2,..., G1, G2,.
ROMs 32r, 32g, 3 in which 2,.
The digital video signals S1r and S1
1g and S1b are input, gamma correction is performed and white balance is adjusted, and video signals S2r, S2g, S2b
Is output. Selection data of gamma correction data for adjusting the white balance is input to higher addresses of the ROMs 32r, 32g, and 32b. The selection of the gamma correction data is set according to an external input from the remote controller 35 or the like.
In accordance with the up / down instruction of each color from the remote controller 35, the MPU 33 performs various procedures of the white balance processing unit 34 to store various kinds of gamma correction data R1, R2,..., G1, G2,. B
The address of the corresponding data is calculated from 1, B2,... And is set in the address registers 31r, 31g, 31b during the vertical blanking period signal S33 of the input video signal.
For example, in the above example, the ROM is stored in the address register 31r.
32r is set to the address at which R2 is stored, the address register 31g is set to the address at which G3 is stored in the ROM 32r, and the address register 31b is set to B at the ROM 32b.
An address storing 1 is set, gamma correction is performed for a set of R2, G3, and B1, and white balance adjustment is performed.

[0016]

The present invention is embodied in the form described above, and has the following effects.

A memory for storing a plurality of sets of correction data for each color of RGB for gamma correction for correcting the linearity of display luminance for white balance adjustment, and a gamma correction for reading data from the memory and performing gamma correction for each color of RGB. An address conversion unit for converting a read address of the memory;
By providing an address data designating unit for designating data of the address conversion unit and manipulating an address for reading data from the memory from the address data designating unit, arbitrary RGB data can be selected from a plurality of sets of gamma-corrected RGB data. Is selected and a new RGB set is used to adjust the white balance, so that an arbitrary combination of RGB of gamma correction data for obtaining white balance can be selected. Fine white balance adjustment can be performed, which is economical, and a high-quality display can be obtained.

The gamma correction section comprises a RAM (Random Access Memory) for inputting an input video signal as an address and outputting gamma-corrected data, wherein the address conversion section converts the address and reads the memory. By writing the output data into the RAM, a white balance adjustment circuit that can flexibly correspond to the display device can be obtained.

The address converter includes an offset register for storing a difference between a start address of the memory and a start address of arbitrary data in RGB data, an output of the offset register, and an address of the memory before conversion. An address translation unit can be easily constructed by using an adder for adding.

The writing of the gamma correction data into the memory is performed during the vertical retrace period of the input video signal, so that the white balance can be set without causing display disturbance.

The gamma correction unit and the memory are configured to input an input video signal to a low-order address, input a selection address of gamma correction data for adjusting white balance to a high-order address, and output gamma-corrected data. (Re
ad Only Memory), and the address conversion unit is an address register that stores an address that stores arbitrary data in the RGB, which is a high-order address for selecting data for gamma correction. A white balance adjustment circuit can be obtained.

The storage of the address in the address register is performed during the vertical blanking period of the input video signal, so that the white balance can be set without disturbing the display.

[Brief description of the drawings]

FIG. 1A is a block diagram of a main part of an embodiment of a white balance adjustment circuit according to the present invention, FIG. 1B is a memory map of an LUT,
(C) Gamma correction characteristics.

FIG. 2 is an embodiment of an address conversion unit of the white balance adjustment circuit according to the present invention.

FIG. 3 is a main part block diagram of another embodiment of the white balance circuit according to the present invention.

[Explanation of symbols]

S1, S1r, S1g, S1b Input digital video signal S2, S2r, S2g, S2b Output digital video signal 1r, 1g, 1b Switcher 2r, 2g, 2b RAM 3 Address conversion unit 4 LUT (Look Up Table) 5 MPU 6a White Balance processing unit 6b Gamma correction processing unit 7 Remote controller R1, G1, B1, R2, G2, B2,... Gamma correction data 3ar, 3ag, 3ab Offset register 3b Adder 3c Switch 31r, 31g, 31b Address register 32r, 32g , 32b ROM 33 MPU 34 White balance processing unit 35 Remote control S33 Vertical blanking period signal

Claims (6)

[Claims] 1. PDP (Plasma Display Panel)
In a white balance adjustment circuit of a video display device for inputting and displaying a digital video signal, such as gamma correction R (red), G (green), and B for gamma correction for correcting linearity of display luminance.
(Blue) A memory storing a plurality of sets of correction data for each color for white balance adjustment, a gamma correction unit for reading data stored in the memory and performing gamma correction for each of RGB colors, and converting a read address of the memory. An address conversion unit and a conversion data specification unit that specifies conversion data of the address conversion unit are provided. By manipulating addresses when reading data stored in the memory by the conversion data specification unit, the plurality of sets of gammas are set. RGB for correction
A white balance adjustment circuit characterized in that the white balance is adjusted by selecting arbitrary data from among the above data and using it as new RGB set data. 2. The gamma correction section comprises a RAM (Random Access Memory) that inputs an input video signal as an address and outputs gamma-corrected data, and the address conversion section performs address conversion and reads the memory. 2. The white balance adjustment circuit according to claim 1, wherein said output data is written as gamma correction data of said RAM. 3. An offset register for storing a difference between a head address of arbitrary data in RGB data from a head address of the memory and an output of the offset register, and an output of the offset register before conversion of the memory. 3. The white balance adjusting circuit according to claim 1, comprising an adder for adding an address. 4. The white balance adjustment circuit according to claim 2, wherein the writing of the gamma correction data to the RAM is performed during a vertical blanking period of the input video signal. 5. The gamma correction unit and the memory input a selected address of gamma correction data for adjusting a white balance to a high-order address by setting an input video signal to a low-order address and output gamma-corrected data. ROM
2. The white balance adjustment circuit according to claim 1, wherein the white balance adjustment circuit comprises an address register that stores a high-order address for selecting the gamma correction data. 6. The white balance adjustment circuit according to claim 5, wherein the storage of the address in the address register is performed during a vertical blanking period of the input video signal.