JPH0686079A - Image coding device - Google Patents

Abstract

PURPOSE:To code again the image data that could not be coded by an arithmetic code by using the template function of a reference picture element when the counter contained in an arithmetic coder has an overflow. CONSTITUTION:The coder of a coder/decoder 5 is started and the coding processing is carried out for one stripe. Thus the reduced image data on a strip 0 part are outputted to a frame memory FM 2 and the bit stream of a stripe 0 is outputted to a code memory 6 respectively. When these output operations are normally complete, the code output processing is carried out. The FF counter of an arithmetic coder has an overflow and is unable to perform the coding operation with a stripe 2. Thus the value of ATLagX of the stripe 2 is compared with the maximum value Mx. Then the coding failure is decided if ATLagX>Mx is satisfied. Meanwhile the control procedure is set back to the head of a main stripe if ATLagX<Mx is satisfied.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image coding apparatus for coding image data using an arithmetic coder.

[0002]

2. Description of the Related Art Conventionally, JBIG (Joint Bi-level Image)
The CCITT Draft is a subtractive arithmetic coding method used in the hierarchical coding method of binary images studied by the Group).
Recommendation T.82, ISO / IEC Committee Draft 1154
As described in 4, the bit output from the encoding register by the shift process becomes the code output, but the carry may spread to the higher order than the encoding register depending on the subsequent orient addition. is there. Therefore, if the code output from the encoding register is immediately output to the transmission line, the propagation of carry cannot be dealt with. Therefore, when there is a possibility of carry, a measure to absorb it in some way is taken. Is required.

In the standard proposal of JBIG, in order to cope with this carry propagation, it is necessary to store a pattern 01 ... 1 in which 0 starts and 1 continues as a code bit pattern that is ejected, and carry occurs. The "carry wait method" is adopted in which all possible propagation ranges are stored and the output waits until there is no possibility of propagation. In order to realize this "carry standby method", Committee Draft
In 11544, when outputting the code from the encoding register,
An FF counter that counts the number of "FFs" and a BUFFER that buffers the immediately preceding code are provided to carry out this carry propagation process.

[0004]

However, in order to implement the above processing by actual hardware, it is necessary to limit the bit length of the above FF counter. For example, 0 to 7 for 3 bits and 0 for 4 bits
It can take values up to ~ 15, but this is "FF"
It means that you can only stack up to 7 or 15. And more than this value "FF"
There is a problem in that image data that continues to be unable to be encoded.

Further, if the bit length of the FF counter is increased, the hardware scale will increase accordingly, and the cost of the device will increase. Further, from the principle of the standardization method described above, it is not possible to specify the maximum value of "FF", and there is a possibility of taking a logically infinite value, so the maximum bit length of the FF counter is logically determined. There is also the problem that you cannot do it.

An object of the present invention is to provide an image coding apparatus which has a high probability of coding image data which could not be coded by a coding system using arithmetic codes in the JBIG bit stream format, or having a high probability of coding. It is to be.

[0007]

In order to achieve the above object, the invention according to claim 1 is an image coding apparatus for hierarchically coding binary image data using an arithmetic coder, wherein: Means for detecting overflow of the counter value of carry propagation in the arithmetic encoder, means for changing the template of the reference pixel used as a prediction model of encoding when the overflow is detected, using the template, Re-encoding means for re-encoding image data that could not be encoded due to the overflow.

According to a seventh aspect of the present invention, in an image encoding apparatus for hierarchically encoding binary image data using an arithmetic encoder, the carry propagation counter value in the arithmetic encoder is Means for detecting overflow, means for selecting encoding other than arithmetic encoding by the arithmetic encoder when the overflow is detected, and encoding by the overflow due to the selected encoding Re-encoding means for re-encoding the image data, and the encoded data by the re-encoding means is put into the bit stream output by the arithmetic encoder to form one bit stream.

[0009]

With the above arrangement, it functions to encode the image data that could not be encoded by the encoding method using the arithmetic code.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings. [First Embodiment] FIG. 1 is a schematic block diagram of an entire image coding apparatus (hereinafter referred to as apparatus) according to a first embodiment of the present invention. In this embodiment, it is considered that the input image is divided into stripes and the coding is performed in stripe units.

In FIG. 1, reference numeral 1 is an encoder / decoder for encoding / decoding image data in stripe units. The encoding / decoding method in the present embodiment is as described in JBIG within the International Standardization Committee.
The hierarchical encoding method of the value image is used. Encoder / Decoder 1
The FM1 (2) and FM2 (3) that make up are frame memories for storing image data at the time of encoding / decoding, and have two surfaces for hierarchical encoding. That is,
Image data of a certain resolution and image data of a resolution one layer lower than that are stored and encoded / decoded. Also, the stripe-unit encoder / decoder 5 is, for example,
The image data is read from the FM1 and the reduced image data is output to the FM2 while operating as an encoder so that the encoded data is output to the code memory 6 in stripe units, or vice versa. It has a function as a decoder that reads the encoded data from the memory 6 and restores the image data in stripe units.

In addition, when the FF counter overflows in the arithmetic encoder, the encoder sets a "failure flag" in the normal / failure flag in the register memory described later, and even during the encoding. Operates to stop by setting the end flag in the register. On the contrary, when all the image data can be encoded, the normal / failure flag is set to the'normal flag 'and the end flag is set to stop the operation.

The register memory 4 is a group of registers for controlling the encoder / decoder 1 from the CPU. Further, the code buffer memory 6 stores a bitstream which is an output at the time of encoding or a bitstream which is an input at the time of decoding. And FM1, F
The M3, the register memory 4, and the code memory 6 are connected to the system bus 7 so that they can be read / written by a CPU described later.

The CPU 8 is a central control unit for controlling the entire apparatus, the memory 9 functions as a program memory for storing the control program of the CPU 8 and data, and the disk 10 is for the above program and Stores image data. FIG. 2 is a diagram showing an internal configuration of the register memory 4. In the figure, 11 is the X size of the image data to be encoded / decoded, and 12 is the number of lines (Y size) when stripe division is performed.
It represents the number of lines that the decoder 1 processes at one time. Also,
In the case of encoding, 13 stores the number of bytes (code length) of the bit stream generated when the encoder encodes image data for one stripe, and in the case of decoding, the decoder This area stores the number of bytes of the bitstream to be decoded.

The control code field 14 has a code 15
Contains information groups indicated by # 18. 15 of these
Is a “complete failure flag” that is turned on when “encoding is not possible” with this encoder, which will be described later, 16 is a flag indicating whether encoding has succeeded or failed in the encoding process of this time, and Reference numeral 17 is a flag indicating that encoding / decoding is completed, and 18 is an AT (Adaptive Te of JBIG).
mplate) is a field indicating the position of the pixel in the X direction, and is usually 0, that is, AT pixel conversion is not performed.

When changing the pixel of AT, a value other than 0 is entered. Although the maximum value of this numerical value is determined by the performance of the encoder / decoder, it is set to 8 in the case of the present embodiment. In the following description, this maximum value is Mx (Mx =
Represented as 8). Next, the AT pixel conversion will be described.
It should be noted that this description will be given for the template when the differential-layer is encoded.

FIG. 3 shows an example of the template. In the figure, pixels 19, 20, and 21 show pixel data on the high resolution side, and pixels 22 show pixel data on the low resolution side. Also,
The pixel 20 is a pixel of interest, and the pixel 19 is a pixel targeted for AT on the template side. FIG. 4 shows a pixel group that may be converted to the AT pixel. In FIG. 4, in order to express the relationship with FIG. 3, the same numbers as in FIG. 3 are attached to the AT pixel and the target pixel. In this, Figure 3
All the pixel groups that do not overlap with the pixels of the template are target pixels for AT pixel conversion. For example, (3 in FIG.
In the case of performing the AT pixel conversion with the pixel 0), the pixel value at the position 19 in FIG. 3 is replaced with the pixel value (3, 0) in FIG. 4, and a template of the reference pixel is created and encoded.

At this time, in order to comply with the JBIG bit stream format, the code for changing the AT pixel is changed to a break of the stripe (a floating marker code before the encoded data of the stripe for changing the AT pixel is started. Must be inserted into the bitstream as). The details of this process will be described later in the actual process.

Although FIG. 4 shows a two-dimensional AT pixel conversion, in the present embodiment, only one dimension, that is, M is used.
Consider replacement with pixels in the range of y = 0, Mx = 8, (3,0) to (8,0). Hereinafter, the operation of the apparatus according to the present embodiment will be described in detail. In this description, binary image data of X size 1960 pixels and Y size 1951 lines is used as an input image, and the number of lines in one stripe is as follows. Consider a case where an input image is encoded with 128 lines. Also, as the frame memory of FM1 and FM2 in FIG.
It is assumed that there is a memory capacity for the value image data. That is, since it is binary image data, (2048/8 = 2
There is a memory capacity of 56 bytes) × 2048 = 512 Kbytes.

Further, the image data input from the disk 10 or the like is already loaded in the FM 1 of FIG. 1, and the register memory 4 stores 1960 in the X size as information necessary for the present encoding. However, Y size has 128,
Further, it is assumed that 0 is already set in ATlagX. FIG. 7 shows the relationship between the input image data this time and the stripe. Here, since there are 1951 lines in the Y direction, there are 16 stripes in total. As shown in the figure, the 15 stripes from stripes 0 to 14 have 128 lines per stripe, but the final stripe 15 has 31 lines. Here, when encoding the image data of the stripe 2, F
It is assumed that the F counter overflows and cannot be encoded.

FIG. 5 and FIG. 6 are flowcharts showing the processing procedure when the above image data is encoded. Step S100 of FIG. 5 is an initialization routine that must be processed at the beginning of the stripe. here,
This is the stripe initialization process described in Committe Draft 11544. As the main processing in this, at the beginning of the image, there is processing for initializing the prediction table of the arithmetic encoder, setting the value of ATlag to 0, and setting a pointer that references the FM. included. Step S
At 101, the encoder of the encoder / decoder 5 of FIG. 1 is activated to perform encoding processing for one stripe.

For example, when the stripe 0 is encoded, the image data of the stripe 0 of the input image data stored in the FM1, that is, the image data of the portion indicated by reference numeral 30 in FIG. 7 is read line by line, JBIG
The encoding process is performed based on the method. As a result, the reduced image data of the stripe 0 portion is output to the corresponding position of FM2, and the bit stream of the stripe 0 of the encoding result is output to the code memory 6.

When the coding of all the image data of the stripe 0 is completed, the code length field 13 in the register memory 4 is set to the number of bytes of the bit stream output to the code memory 6, and the end flag field 17 is set. Set the end flag to normal / abnormal flag field 1
6 operates to set a normal flag for notifying that the operation is normally completed.

At this time, the CPU determines in step S102 whether or not the operation is completed. If the encoder is still in operation, it waits in step S103 and returns to step S102 again to encode. Wait for the operation of the vessel. Then, when the encoding by the encoder is completed, the processing of the CPU proceeds to step S104, where it is normally terminated, that is, it is judged from the control flag field shown in FIG. 2 whether or not the FF counter has overflowed. .

Since stripe 0 and stripe 1 can be encoded normally, the CPU executes the processing in step S105.
Move to. FIG. 6 is a detailed flowchart of the code output process shown in step S105 of FIG. In the figure, in step S120, it is determined whether or not there was any failure in encoding the current stripe. If there is no failure, a normal end code is output in step S121. In this process, if the current stripe is the first stripe of the image, no process is performed.
The code "NORM" is output.

Next, in step S124, the bit stream output to the code memory 6 is output to a storage medium such as the disk 10. After this processing, the process returns to step S106 of FIG. 5 and it is determined whether the stripe processed this time is the final stripe. And
In the case of the present embodiment, since the stripe 15 is the final stripe, if the determination result in step S106 is NO, the process proceeds to step S to prepare for the next stripe.
Move to 107.

On the other hand, if the stripe processed this time is the 15th stripe, the end code of the final stripe is output in step S115, and the coding of the current layer is ended. In this step S115, "SDNORN"
, Or "SDRST" is output depending on the encoding state of the final stripe. In the process in step S107, for example, pointers and register information for accessing FM1 and FM2 are calculated for the next stripe. Then, the bit stream after the coding up to the stripe 1 is 24, 25, and 26 shown in FIG.

Next, the operation when the stripe 2 is encoded will be described. This stripe 2 is the FF of the arithmetic encoder
It is a stripe that the counter overflows and cannot be encoded. Therefore, the determination in step S104 in the flowchart shown in FIG. 5 is NO, which is different from the above case, and the process proceeds to step S105-1.
In this step S105, the value of ATLagX is incremented by 1, and in the following step S108, the ATLa
The value of gX is compared with Mx.

In this comparison, ATLaggX is Mx (=
If the value is larger than 8), it is judged that the encoding has failed, the process proceeds to step S109, the "completely failed flag" of the control code field 14 in the register memory 4 is set, and the encoding ends. To do. Also, ATLabX is M
When the value is smaller than x, in step S110, F
The pointers to M1 and FM2 are returned to the head of the main stripe (stripe 2) (position 23 in FIG. 7), the prediction table of the arithmetic encoder is cleared to 0, and the encoding fails once in this stripe. Is stored and the process returns to step S101 to be encoded again.

When the JBIG-compliant encoding is performed in step S101, since the value of ATlagX is not 0, the AT pixel is changed to a pixel and a reference pixel template is created to perform encoding. Step S1
02, S104, it is judged whether or not the encoding of this stripe is completed, and if the encoding has failed again,
The processing routine after step S105-1 is executed.
However, if the encoding is completed successfully, step S10
It jumps to the code output processing routine of 5. In step S120 of FIG. 6, since the encoding has failed once or more in this process, the process is moved to step S122, and the abnormal termination code “SDR” specified in JBIG is set.
The "ST" code is output. This routine is also step S1
Similar to 21, if the current stripe is the first stripe of the image, nothing is output.

In step S123, a floating marker code (ATMOVE) for notifying that ATlagX has been changed is output. Then, in step S124, the bit stream output by the current encoding is output to the disk 10 or the like. 24 to 29 of FIG. 8 show the state of the bit stream when the above processing is performed, and thereafter, the process returns to step S106 of FIG.
The above process is repeated until the final stripe.

As described above, according to this embodiment,
When the input image is encoded by the JBIG compliant encoding method, when the FF counter inside the arithmetic encoder overflows, the JBIG AT function is used as the template of the reference pixel used as the prediction model for encoding. By providing the function of re-encoding the image data that could not be encoded, the JBIG standard was complied with without increasing the hardware scale inside the encoder such as the arithmetic encoder. It is possible to reduce the probability that encoding cannot be performed when encoding is performed by the encoding method using the arithmetic code.

In addition, at the time of encoding, as a termination code of the bit stream of each stripe, "SD
Using "NORM" and "SDRST" properly, "ATMOV"
When “E” is performed, “SDRST” is used, and the processing in stripe units such as the arithmetic encoder is divided into “SDNORM” and “SDRST” so that the finally output bit stream conforms to JBIG. It is possible to get the bitstream format.

When encoding is completed in the apparatus according to the above embodiment, a reduced image having a one-step resolution lower than that of FM1 is formed in FM2, and when hierarchical encoding is performed, FM2 is used as an input image and FM1 is output. The image frame memory may be switched to be used, or the reduced image data of FM2 may be copied to FM1 for use. In the above embodiment, the operation of the first layer has been described as the process, but it may be in a layer in the middle of the layer coding, or
The same process can be performed in encoding the lowest-layer instead of the differential-layer. [Second Embodiment] Next, a second embodiment of the present invention will be described.

In the second embodiment, the case where the conversion of AT pixels is performed two-dimensionally will be described. The configuration of the image coding apparatus according to the present embodiment is the same as that of the first embodiment described above, and therefore, illustration and description thereof will be omitted here. Figure 9
It is a figure which shows the structural example of the register memory 4 which concerns on a present Example. 10 and 11 are flowcharts showing the processing procedure of the CPU. In the drawings, the same operations and the same processings as those in the first embodiment are designated by the same reference numerals.
Detailed description thereof will be omitted.

In the structure of the register memory 4 shown in FIG. 9, the field of ATlagY35 is a part added to the structure of the register memory according to the first embodiment shown in FIG. The values of Mx and My here are Mx = 8 and My = 4. In this example,
The difference in the processing performed by the CPU from the first embodiment is the control of ATlagY. That is, FIG.
In step S124, which is the initialization routine of
At the same time that agX is cleared to 0, the value of ATlagY is also cleared to 0. If the encoding fails due to the overflow of the FF counter of the arithmetic encoder, step S116.
Move to.

FIG. 11 is a detailed flowchart of step S116 of FIG. In step S131 of the figure, ATlagX is incremented by 1, and step S1
At 32, ATlagX and Mx (= 8) are compared. At this time, if the value of ATlagX is larger than Mx, the process proceeds to step S133, AtlagY is incremented by 1, and ATlagX is set to −Mx (−8).

Next, in step S134, ATlagY
Is compared with My, and if ATlagY is larger than My (= 4), it means that the encoding has completely failed, and the process proceeds to step S135. In this step S135, since it is assumed that everything has moved, the process is step S1 in FIG.
If you move to 17, the judgment result will be YES, so
The encoding ends in step S109. The processing in step S109 at this time is the same as that in the first embodiment.

In other cases, that is, if the determination in step S132 or step S134 of FIG. 11 is NO and it is determined that all of them have not moved in step S136, the determination result in step S117 of FIG. Is NO
Becomes Therefore, in step S110, re-encoding is performed while converting AT pixels, as in the first embodiment.
In this case, the encoder needs to support the functionality of the two-dimensional ATMOVE.

As described above, in this embodiment, the possibility of completely failing in encoding can be lowered as compared with the first embodiment. [Third Embodiment] In the first and second embodiments described above, the input image is divided into stripes and the encoding is performed in stripe units. However, in the present embodiment, the input image is divided into stripes. Consider the case of not dividing. In this case, the first,
The concept of stripes described in the second embodiment may be considered as one for the input image.

FIG. 12 is a diagram showing the relationship between image data and stripes according to this embodiment. FIG. 7 shows the relationship between the two in the case of dividing into stripes, and the same meanings as those are given the same numbers. That is, the Y size of the input image may be entered in the Y size 12 field of the register memory 4 of FIG. Further, when the encoding fails, the AT pixel is changed and the re-encoding is performed. However, the control for returning the control to the head of the failed stripe described in the first and second embodiments is performed here. It is sufficient to return to the beginning of the image and re-encode all image data. At this time, the change of the AT pixel may be either one-dimensional or two-dimensional.

When the coding is not performed using the hierarchy, the sequential only mode, that is, the lowest-layer coding of the hierarchy coding may be directly performed on the input image. 13 and 14 show examples of reference pixel templates when the lowest-layer is encoded. In the figure, the same numbers as those in the differential-layer shown in FIG. 3 are assigned the same numbers.

The difference between the two is that the differential-l
In the case of ayer, both the high-resolution side and low-resolution side pixel data were referenced, but in the case of lowest-layer, there is no lower resolution image data than this layer, so encoding is performed only from this layer image data. It will be. There are two types of reference pixel templates for 2 lines / 3 lines, and switching between them is performed once for one encoded image.

Here, these pieces of information can be stored in the bitstream as header information of a bitstream (not shown). Further, the principle of AT pixel conversion in the case of encoding this layer is the same as that in the case of encoding the differential-layer, and the changeable pixel area is the same as that shown in FIG. Further, the operation at this time can be performed in the same manner as described in the first and second embodiments. [Fourth Embodiment] The fourth embodiment according to the present invention will be described below.

The coding method used in this embodiment is a hierarchical coding method for binary images using an arithmetic coding method as examined by JBIG in the International Standardization Committee. When the encoding cannot be performed by the arithmetic encoding method, the original image of that portion is encoded by another encoding method and transmitted. In addition, here, when performing hierarchical encoding, it is considered that the input image is divided into stripes and encoding / decoding is performed in stripe units.

FIG. 15 is a block diagram showing the overall structure of the image coding apparatus according to this embodiment. In the figure, the same components as those of the image coding apparatus according to the first embodiment shown in FIG. 1 are designated by the same reference numerals, and the description thereof will be omitted here. In FIG. 15, the register memory 4
Is a memory for controlling the encoder / decoder 5'which performs actual encoding / decoding. This encoder / decoder 5'performs encoding / decoding on a stripe-by-stripe basis, and if the FF counter in the internal arithmetic encoder overflows and encoding cannot be performed, register / decoding is performed.
The corresponding flag in the memory 4 is set to stop the operation.
When the encoding / decoding of the image data for one stripe is completed normally, the corresponding flag in the register memory 4 is set and the next operation is waited for.

FIG. 16 is a block diagram showing the internal structure of the encoder portion of the encoder / decoder 5 '. In the figure,
The signal 116 is a signal for inputting image data from the high resolution side frame memory, and the signal 117 is a signal for outputting image data to the low resolution side frame memory. And, this is a reducer 11 described later.
1 output signal. Here, the switching method of the frame memories FM1 and FM2 is not particularly limited.

The reducer 111 refers to the high-resolution image data and the low-resolution image data, and creates the image data whose resolution is lowered by one step. The arithmetic encoder 113 encodes while referring to the high resolution image data 116 and the reduced image which is the output result of the reducer 111. Also, 11
Reference numeral 2 denotes an encoder that performs encoding different from the arithmetic code of the arithmetic encoder 113. In the fourth embodiment, a method in which the original image is used as it is is considered. Then, the code switching unit 114 switches the outputs from the encoder 112 and the arithmetic encoder 113, and the output becomes the code memory 6.
Note that 115 is a switching signal for controlling the code switching unit of the code switching unit 114.

FIG. 17 is a diagram showing an example of the internal configuration of the register memory 4 in this embodiment. Here, similarly to the register memory in the first embodiment, reference numeral 118 in the drawing indicates the X size of the image data to be encoded / decoded, and 119 indicates the number of lines in one stripe when divided into stripes. , Represents the number of lines processed by the encoder / decoder in this embodiment at one time. Also, 12
0 indicates the number of bytes of the bit stream generated when the encoder encodes image data for one stripe during encoding, and conversely, the number of bytes of the bit stream to be decoded by the decoder during decoding. This is the chord length to represent.

The control code field 121 is a control flag group in which each piece of information is stored. An end flag 122 indicating that the encoder / decoder has completed the encoding / decoding operation, An encoding failure graph 123 indicating that the FF counter in the arithmetic encoder overflowed at the time of encoding and the encoding could not be performed, and a switching flag 124 indicating whether to use the arithmetic code or another encoding.
, And controls the switching signal 115 in FIG.

The operation of the apparatus according to this embodiment will be described in detail below. The image data used for the explanation here is
X size = 1960 pixels, Y size = 1951 pixels, and the number of lines in one stripe is 12 with respect to the input image.
Consider encoding as 8 lines. In addition, FIG.
The FM1 and FM2 frame memories are 2048
It is assumed that there is a memory capacity capable of storing binary image data of pixels × 2048 pixels. That is, since it is binary image data, (2048/8 = 256 bytes) × 20
It is assumed that there is a memory capacity of 48 lines = 512 Kbytes.

Prior to encoding, FM1 in FIG.
In addition, the input image data has already been loaded from the disc 10 or the like, and the X size field in the register memory 4 is stored in the X size field of the input image as the information necessary for encoding in the Y size field. Is set to the number of lines processed by the encoder at one time. In other words, when dividing into stripes, the number of lines in one stripe is 128, and in the control code field switching flag, a flag indicating that the arithmetic encoder side is used is set by a method not shown. It has been done.

FIG. 18 is a diagram showing the relationship between the frame memory, image data, and stripes when the input image data is loaded into FM1. In the figure, 130 indicates the size of the frame memory and 131 indicates the size of the image data. Since the image data is divided into stripes, each stripe is as shown in FIG. 18. Since the number of lines in one stripe is 128 lines and the Y size of the input image is 1951 lines, there are 16 stripes.

Of the 16 stripes, 0 to 14 have 128 lines per stripe,
The stripe 15 is the remaining 31 lines. Therefore,
When the stripe 15 is encoded, 31 will be set in the Y size field of FIG. In addition,
When the stripe 2 in FIG. 18 is encoded, the FF counter in the arithmetic encoder overflows and cannot be encoded.

Therefore, referring to the flowchart shown in FIG. 19, when the image data is encoded in this embodiment,
The contents of processing performed by the CPU 8 will be described. Step S1100 of FIG. 19 is an initialization routine performed at the beginning of the stripe. Here, Committee Draft 11544
As described in, if the stripe this time is the beginning of the image data, the prediction table in the arithmetic encoder is cleared to 0, and the variables for initializing variables in the arithmetic encoder and accessing the frame memory are accessed. A process of setting a pointer or the like is included. Further, in this step, the switching flag 124
Is set on the arithmetic encoder side.

In the next step S1101, the encoder of the encoder / decoder 5'shown in FIG. 15 is activated and the encoding process for one stripe is performed. For example, when encoding the image data of the stripe 0, first, since the high resolution side, that is, the input image data is stored in FM1, a reduced image is created in FM2. Then, the signal 116 shown in FIG. 16 is connected to FM1 and the signal 117 is connected to FM2, and the pointer for accessing FM1 is set to the position of the leading pixel of stripe 0, that is, the position of 133 in FIG. The pointer of FM2 is also set at the corresponding position.

After that, when the encoder is actually activated, the code switching flag 124 is set so as to select the arithmetic encoder side, and therefore the arithmetic encoder 113 operates. Here, the reduction unit 111 creates a reduced image by referring to the image data on the high resolution side and the already reduced image data, writes the output result in the FM2, and at the same time, sends it to the arithmetic encoder 113 as well. Further, the high-resolution image data enters the arithmetic encoder 113 directly from the signal 116. The arithmetic encoder 113 creates a template of reference pixels for encoding from the image data on the high resolution side and the low resolution side, performs arithmetic encoding, and sends the result to the code changeover switch 114.

The code changeover switch 114 switches the output from the encoder 112 and the arithmetic encoder 113 by the switching signal 115. In this processing, however, since it is on the arithmetic encoder side, the arithmetic encoder is It operates to output the output of 113 to the code memory 6. The above processing is performed on the image data for one stripe, and when the processing is completed, the end flag 122 in the register memory 4 is turned ON. Also, this stripe is FF
Since the counter has not overflowed, the failure flag 123 is turned off. Then, the number of bytes of the actually output code is written in the code length field 120.

During this period, the CPU 8 executes step S1102.
In step S1103, it is determined whether or not the encoding has been completed, and if it is still in operation, after the wait in step S1103, the operation of returning to the process of step S1102 is performed again. When the operation of the encoder is completed, the process proceeds to step S1104, and it is determined from the failure flag 123 whether or not the operation is completed normally. If the failure flag is OFF, the CPU 8 advances the process to step S1105 and outputs the marker code at the normal time. Here, it is determined whether or not the current stripe is at the beginning of the image, and if it is at the beginning, no processing is performed. However, if the stripe is at the beginning of the image, "SDNORM" is output as the marker code to the disk 10 or the like.

In step S1106, the number of bytes written in the code length field 120 is read from the code memory 6 and the corresponding bit stream is output to the disk 10 or the like. After that, step S
In step 1110, it is determined whether the stripe processed this time is the final stripe. If it is not the final stripe, the process returns to step S1100 to encode the next stripe. However, if it is determined in step S1110 that the stripe is the final stripe, step S111.
When "1", "SDNORM" is output to the disk 10 as the last marker code.

When the above processing is performed up to, for example, stripe 1, the bit stream of the disk 10 is 230 to 23 of the bit streams shown in FIG.
Up to 2 are output. Next, the encoding process of the stripe 2 in which the FF counter in the arithmetic encoder overflows during the encoding process will be described.

Initially, this stripe is also encoded by the arithmetic encoder as in the case of the above processing. At that time, if the FF counter overflows, the encoder turns on the end flag 122 and the failure flag 123. Is turned on to end the operation. Therefore, the CPU 8 performs step S
If NO is determined in 1104, the process proceeds to step S1107.
At this stage, the code output by the arithmetic encoder up to this point is stored in the code memory 6, but is ignored here. Then, the number of bytes, which is the data amount for one stripe, is calculated and input to the code length field 120 in the register memory 4.

In this processing, the number of pixels is 1960 pixels ×
Since there are 128 pixels, 1960 × 128/8 = 313
Set 60 bytes. Then, "SDRST" is output to the disk 10 as a marker card indicating that the operation has failed. Similar to step S1105, this marker code output is also not processed if the current stripe is at the beginning of the image. However, if the stripe is not at the beginning of the image, this marker code is output.

Next, the "COMMENT" marker code is output to the disc to identify the user's unique code. In this "COMMENT" marker code,
Number of bytes of image data that follows (3136 this time)
Enter 0). At this time, the prediction table in the arithmetic encoder is cleared to 0. Then, the CPU 8 executes step S11.
At 08, while returning control to the head of stripe 2,
The switching flag 124 is set to another encoding side.

In this processing, since the mode is the mode in which the high resolution image data is output as it is, step S11
At 09, the encoder is activated again to encode stripe 2. By doing so, the reducer 111 operates and a reduced image is created. Further, the other encoder 112 is selected as the encoder, and the other encoder 112 operates so that the high-resolution image data from the signal 116 is sent to the code changeover switch 114 as it is.

The code changeover switch 114 operates so as to select the data on the side of the other encoder 112 and transfer the data to the code memory 6. Then, step S11
Proceeding to 06, the same processing as above is performed. Note that FIG.
230 to 235 indicate the bit stream after the processing of the stripe 2. When the process shown in the flowchart of FIG. 19 is performed on all the stripes of the input image, it is possible to obtain the bitstreams 230 to 239 of FIG. FM2, FM
Reduced image data whose resolution is one step lower than the input image data stored in No. 1 is created.

As described above, according to this embodiment,
When the FF counter in the arithmetic encoder overflows and cannot be coded, the image data that cannot be coded by the JBIG method can be coded by the JBIG bit stream format by sending the image data as it is and performing the reduction process. There is an effect. After that, in order to perform further hierarchical encoding, FM2 is used for input image data
1 is used as the frame memory for the output image data by switching between the two frame memories, or F
The reduced image data created in M2 may be copied to FM1, and FM1 may be fixedly used as an input frame memory and FM2 as an output frame memory in the same manner as described above.

Further, in the first embodiment, the operation of the first layer (highest resolution) of the layer coding process has been described.
Even when there is a stripe that cannot be coded in a layer in the middle of the hierarchical coding process, the same process as above can be performed. Furthermore, in the case of the lowest-layer encoding, the same processing as above can be performed without the reduction image being generated by the reduction unit 111. [Fifth Embodiment] Next, a fifth embodiment according to the present invention will be described.

In the fourth embodiment, a method of sending image data as it is is described as an encoding method different from the arithmetic encoding, but in the fifth embodiment, MR and MMR used in a facsimile machine are described. The case of using encoding will be described. The overall configuration of the image coding apparatus according to the present embodiment is
Since it has the same configuration as the device according to the fourth embodiment, its illustration is omitted here. Also, since the MR and MMR methods are known encoding methods, description of the operation of encoding itself is omitted.

A problem in MR and MMR encoding is the code length (number of bytes). In the fourth embodiment, since the image data itself is sent, the data size (the number of bytes) could be calculated, but MR, M
In the case of MR, the number of bytes can be known only after encoding. Further, in order to insert data other than arithmetic codes into the bit stream defined by JBIG, as described in the fourth embodiment, {“COMMENT” marker code} + {the number of bytes following it}. The format is + {user data (MR, MMR code)}.

Therefore, the processing procedure in the apparatus according to this embodiment will be described with reference to the flowchart. FIG. 21 shows
6 is a flowchart showing an image data encoding process in the present embodiment. In the figure, the same numbers are assigned to the processing steps that perform the same operations as those in the above-described fourth embodiment, and the description thereof will be omitted. Also, in the description here, the same image data as in the fourth embodiment is used, and MR encoding will be described as another encoding method. And the operation when the FF counter in the arithmetic encoder does not overflow,
That is, when encoding stripe 2,
Since it is similar to the fourth embodiment, its explanation is omitted.

The operation of the CPU 8 is the same as that of the fourth embodiment up to the end of the operation of the arithmetic encoder, and since the determination in step S1104 is NO, step S1
In 113, in order to indicate that the arithmetic code has failed,
The "SDRST" marker code is output to the disc 10. In this process, like the fourth embodiment, if the stripe of this process is the head of the image, this code is not output, and in other cases, the code is output. Then, the "COMMENT" marker code is output to the disc 10 as its identifier in order to insert a user-specific code. Since the number of bytes of the user code that follows the marker code is entered in the subsequent processing, no processing is performed here.

Next, in step S1114, control is returned to the beginning of the stripe. In addition, the switching flag 12
4 is changed to a code indicating the MR encoder side. Then, in step S1115, the image data of stripe 2 that could not be encoded by the arithmetic encoder is re-encoded by the MR code.
When the MR encoder has completed the encoding process for one stripe, the number of bytes output by the MR encoder is changed to the code length field 12 in the register memory 4.
Store in 0.

When the MR encoder finishes the encoding process, the end flag 122 in the register memory 4 is turned ON.
Here, the code data output from the MR encoder is once passed to the code changeover switch 114, and at this time,
The cord changeover switch 114 has a changeover signal 115.
Is on the MR encoder side, the MR code is output to the code memory 6. Then, in parallel with this MR code processing, reduction processing is performed as in the fourth embodiment. CPU
8 confirms that MR encoding has been completed by the above processing.

When the encoding process is completed, the process proceeds to step S1116, and the MR code output by the MR encoder is output to the disk 10. At this time, before outputting the code data, the number of bytes stored in the code length field 120 in the register memory 4 is changed to “COM
Output after the "MENT" marker code. And
The control of the CPU 8 moves to step S1110.

As described above, when the FF counter in the arithmetic encoder cannot encode, the image data is encoded by the MR and MMR encoding which is a different encoding from the arithmetic code, and the reduction processing is performed. As a result, image data that could not be encoded by the JBIG method can be encoded. Although the present embodiment has been described by using the MR coding, the MH and MMR are used.
Other encoding methods such as the above may be used. Also, as the processing on the decoder side, decoding is performed by the encoder used in the normal JBIG, and if there is a "COMMENT" marker code in the middle, the decoding processing of the stripe there, and the fourth In the encoder according to the embodiment, the data following the marker code may be replaced with the image data on the resolution side. Then, in the present embodiment, the MR code may be input to the MR decoder to restore the high resolution image data.
At this time, the reduction processing is performed on the encoding side even when the other encoding processing is being performed, so hierarchical encoding may be used. [Sixth Embodiment] In the fourth and fifth embodiments, the input image data is divided into stripes, and the encoding process is performed for each stripe.
Consider the case where the input image is not divided into stripes. In this case, one stripe described in the fourth and fifth embodiments is
If one stripe is considered for the input image, the coding can be easily performed even when the stripe division is not performed.

That is, the Y size of the input image is directly entered in the Y size field 119 in the register memory 4 of FIG. Further, when the FF counter overflows and another encoding process is performed, the control is returned to the head of the stripe in the fourth and fifth embodiments, but here, the control is returned to the head of the image. Separate encoding is performed.

Further, when the coding is not performed using the hierarchy, the sequential only mode, that is, the lowest-layer coding of the hierarchy coding is directly performed on the input image. The operation at this time is similar to that of the above-described embodiment. Also, the processing on the decoder side
It is similar to the above processing. In addition, since the bitstream created by the above method conforms to the bitstream format defined by JBIG, the decoder side does not have an encoder / decoder different from the arithmetic encoder. In a bowl,
When the bitstream created here is input, only the stripes that could not be encoded due to the FF counter overflowing cannot be decoded, so the subsequent stripes can be decoded normally.

As an encoding method different from the arithmetic code, a plurality of encoding means are provided without being limited to one encoding.
Of these, the coded data of the coding with the highest compression rate may be selected. In this case, the identifier of which encoding is selected is inserted between the "COMMENT" marker code and the code data. The present invention may be applied to a system including a plurality of devices or an apparatus including one device.

[0080]

As described above, according to the present invention,
When the counter inside the arithmetic encoder overflows, by using the template function of the reference pixel, it is possible to re-encode the image data that could not be encoded without increasing the hardware scale of the arithmetic encoder. .

Further, when the counter inside the arithmetic encoder overflows, the image data which could not be encoded by the arithmetic encoding can be re-encoded by encoding by an encoding method other than the arithmetic encoding.

[Brief description of drawings]

FIG. 1 is a schematic block diagram of the overall configuration of an image encoding device according to a first embodiment of the present invention.

FIG. 2 is a diagram showing an internal configuration of a register memory in the first embodiment.

FIG. 3 is a diagram showing an example of a template for AT pixel conversion in JBIG.

FIG. 4 is a diagram showing a pixel group for AT pixel conversion in JBIG.

FIG. 5 is a flowchart showing a procedure for encoding image data in the first embodiment.

6 is a detailed flowchart of the code output process shown in FIG.

FIG. 7 is a diagram showing a relationship between an input image and stripes according to the first embodiment.

FIG. 8 is a diagram showing a configuration example of a bitstream when the processing in the first embodiment is performed.

FIG. 9 is a diagram showing an internal configuration of a register memory according to a second embodiment.

FIG. 10 is a flowchart showing an encoding process according to the second embodiment.

11 is a flowchart showing an ATlag calculation process shown in FIG.

FIG. 12 is a diagram showing a relationship between input image data and stripes according to the third embodiment.

FIG. 13 is a diagram for explaining AT pixels in the lowest-layer according to the third embodiment.

FIG. 14 is a diagram for explaining AT pixels in the lowest-layer according to the third embodiment.

FIG. 15 is a block diagram showing an overall configuration of an image encoding device according to a fourth embodiment.

FIG. 16 is a block diagram showing an internal configuration of an encoder portion of an encoder / decoder in a fourth embodiment.

FIG. 17 is a diagram showing an example of an internal configuration of a register memory 4 in a fourth embodiment.

FIG. 18 is a diagram showing a relationship between a frame memory, image data, and stripes when input image data is loaded in FM1.

FIG. 19 is a flowchart showing a process for encoding image data in the fourth embodiment.

[Fig. 20] Fig. 20 is a diagram illustrating a configuration example of a bit stream when the processing in the fourth embodiment is performed.

FIG. 21 is a flowchart showing a coding process of image data in the fifth embodiment.

[Explanation of symbols]

 1 Encoding / decoding device 2 FM1 3 FM2 4 Register memory 5 Encoding / decoding unit 5'Encoding / decoding device 6 Code buffer memory 7 System bus 8 CPU 9 Memory 10 Disk 111 Reducer 113 Arithmetic encoder 114 Code switching switch

Claims (11)

[Claims] 1. An image encoding apparatus for hierarchically encoding binary image data using an arithmetic encoder, said means for detecting overflow of a carry propagation counter value in said arithmetic encoder, and said overflow. When is detected, means for changing the template of the reference pixel used as a prediction model of encoding, and re-encoding means for re-encoding the image data that could not be encoded due to the overflow using the template. An image encoding device comprising: 2. The re-encoding means, when the binary image data has a stripe structure, returns to the head of the stripe that could not be encoded and re-encodes. Image encoding device. 3. The re-encoding means, when the binary image data does not have a stripe structure, returns to the beginning of the binary image data and re-encodes.
The image encoding device according to 1. 4. The image coding apparatus according to claim 1, wherein the re-coding unit clears the prediction table of the arithmetic coder and starts re-coding from an initial state. 5. The image coding apparatus according to claim 1, wherein the template of the reference pixel is changed in one dimension or two dimensions. 6. The image coding apparatus according to claim 1, wherein the hierarchical coding is a multi-layer or a single layer. 7. An image encoding apparatus for hierarchically encoding binary image data using an arithmetic encoder, a means for detecting overflow of a carry propagation counter value in the arithmetic encoder, and the overflow. When detected, means for selecting encoding other than arithmetic encoding by the arithmetic encoder, and re-encoding for re-encoding image data that could not be encoded due to the overflow in the selected encoding An image encoding device comprising: an encoding unit, and the encoded data by the re-encoding unit is inserted into a bit stream output by the arithmetic encoder to form one bit stream. 8. The re-encoding means, when the binary image data has a stripe structure, returns to the head of the stripe that could not be encoded and re-encodes. Image encoding device. 9. The re-encoding means, when the binary image data does not have a stripe structure, returns to the beginning of the binary image data and re-encodes.
The image encoding device according to 1. 10. The image encoding apparatus according to claim 7, wherein the re-encoding means clears the prediction table of the arithmetic encoder and starts re-encoding from an initial state. 11. The hierarchical coding is multi-layer or single-layer.
The image encoding device according to 1.