JPH0396381A - Recorder - Google Patents

Abstract

PURPOSE:To obtain a recorder capable of using a memory capacity for memory reception more effectively and avoiding an interruption in a memory receiving action by a method wherein received information is once stored in a memory means when a remaining amount of recording paper reaches a fixed value or less, and high resolution information in code image information previously stored is erased when an allowable memory amount is reduced to a fixed value or less. CONSTITUTION:A control circuit 10 checks the presence or absence of recording paper by referring to the output of a recording paper detection circuit 5. With the detection of the recording paper exhaustion, the control circuit 10 issues an instruction of recording received data in a memory 6 and, simultaneously, indicates the message of the present state. Furthermore, the control circuit 10 examines the use status of the memory 6. If the memory 6 has no empty area, the control circuit 10 erases the highest-resolution information in the previously stored data to form an empty area.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a recording device, and particularly to a recording device that receives information using hierarchical images and records it in a predetermined method. [Prior Art] Conventionally, there has been known an apparatus that records information received from a host computer or a communicating party via a predetermined communication interface means using a predetermined method such as thermal recording or inkjet recording. In such devices, for example, like those provided in facsimile machines, recording paper such as roll paper is loaded in the recording section, and the recording paper does not need to be loaded for each communication. There are many. In such devices, if the recording paper runs out, normal recording operations cannot be performed, so the following method is usually used to handle the problem. That is, a recording paper detection circuit that detects the presence or absence of recording paper at a predetermined position on the recording paper conveyance path using a photointerrupter, etc., and a memory that stores received information are provided.
When the paper detection circuit detects that the paper is out of paper, it does not interrupt the reception operation, but instead interrupts the recording operation and stores the received information in memory. Here, in order to store as much received information as possible, the received information stored in the memory is encoded as is by the MR method, MH method, or hierarchical method without decoding the received information. ．． [Problem to be solved by the invention] However, in the above conventional example, as received information, MR
Encoded or MH encoded data or hierarchically encoded data is stored in the memory as is, and complete decoding is always ensured, and by storing such data, the remaining memory becomes empty. If this occurs, the communication operation ends with an error at this point, and subsequent information cannot be received. SUMMARY OF THE INVENTION An object of the present invention is to provide a recording device that can more effectively utilize memory capacity for memory reception and avoid interruption of reception operations.

[Means for Solving the Problems] The present invention provides a receiving means for receiving hierarchically encoded images, a detecting means for detecting the remaining amount of recording paper, a storage means for storing received information, and the detecting means. When the remaining amount of recording paper becomes less than a certain value, the received information is stored in the storage means, and when the storage capacity of this storage f-stage becomes less than a certain value, high-resolution information of the already stored coded image information is stored. It is characterized by having a control means for erasing information.

[Function] In the present invention, when the remaining memory capacity reaches a certain value, high-resolution stages of the received hierarchical images are deleted and the received data is stored in the free memory space, thereby avoiding communication interruption. be able to.

[Embodiment] FIG. 1 is a block diagram showing a facsimile machine that employs a recording device according to the present invention. Network control unit (NCU)
1 uses the telephone network for data communication, etc., so it connects to the terminal of the line and controls the connection of the telephone exchange network, switches to the data communication path, and maintains the loop. ．． Note that the signal line 1a is a telephone line. The recording paper detection circuit 5 is a detection circuit that detects the presence or absence of recording paper. This recording paper detection circuit 5 outputs a signal of signal level "1" to the control circuit 7 when there is recording paper, and outputs a signal of signal level rQJ when there is no recording paper. The memory 6 is for storing information after the recording paper is used up. That is, when the read/write signal from the control circuit 7 is "O", the memory 6 is in a write state, and the data input from the demodulator 2 to the control circuit 7 is transferred to the designated address. Further, when the read/write signal is "L", the memory 6 is in a read state, and the already stored data is output from the address specified by the control circuit 7. The demodulator 2 inputs the signal sent from the other party's facsimile machine via the hybrid circuit 13, and receives the signal from the CCIT.
T Recommendation V27t e r. V29 or x. Demodulation is performed using the method specified in 25.

The data demodulated by the demodulator 2 is output to the decoding circuit 3 and the control circuit 10.

The decoding circuit 3 receives the output signal (hierarchical encoded data) from the demodulator 2 and decodes the low resolution signal (first stage image). This decrypted data is then
It is output to the P signal detection circuit 4 and the control circuit 10. Furthermore, the decoding circuit 3 inputs and decodes the output data of the memory 6. The EOP signal detection circuit 4 inputs the signal from the decoding circuit 3 and outputs a pulse to the control circuit IO when an EOP (procedure end) signal is detected. The recording unit 7 includes a thermal printer or an inkjet printer, and the decoding circuit 3
A signal is input from the control circuit 10 through the control circuit 10 to perform recording. This recording unit 7 performs recording according to instructions from the control circuit 10. Specifically, the recording unit 7 records data obtained by decoding data in the memory 6 or decoding data from the demodulator 2 based on instructions from the control circuit 10. Record data.

The display circuit 8 is for displaying whether there is received data in the memory 6 or not. That is, when the display instruction signal from the control circuit IO is "0", a message indicating that "received data is not stored in the memory" is displayed, and when it is rlJ, a message indicating that "received data is stored in the memory" is displayed. will be displayed. This display circuit 8 can be constructed from an LCD, a lamp circuit, or the like.

The button press detection circuit 9 is a circuit that detects the press of a recording start button on the operation panel, which is composed of a known switch input circuit or the like, and is pressed to start recording the received data stored in the memory 6. When this happens, a pulse is output to the control circuit 10. The control circuit 10 is composed of a microcomputer, a control memory, etc., and controls the operation of the entire apparatus according to a predetermined program. Furthermore, this control circuit 10 checks the output of the recording paper detection circuit 5 to determine whether there is recording paper. If it detects that the recording paper is out, it issues an instruction to record the received data in the memory 6, and at the same time displays a message to that effect. Furthermore, the control circuit 10 checks the usage status of the memory 6,
If there is no space in the memory 6, the highest resolution of the already stored data is deleted to create an empty area. Then, when the operator loads a new recording paper and presses the button to start recording, this operation is detected by the button press detection circuit 9, and the control circuit 10 that detects this detects the reception data in the memory 6 by the recording section 7. Record the data. FIG. 2 is a flowchart showing the control operation of the control circuit 10. When the facsimile device enters reception operation, the control circuit 1O determines whether or not there is recording paper after performing a known communication procedure (s B , if there is recording paper, the recording section 7 The control circuit 10 records the data on the recording paper (S2), and then determines whether or not it has detected an EOP signal instructing the end of the procedure (S3), and ends the process when the EOP signal is detected. When no RTC signal is detected, the process returns to S1.Also, when it is determined in S1 that there is no paper, recording in the recording unit 7 is stopped (5
4), Next, the memory 6 is set to write mode, and the received data is stored at a predetermined address in the memory 6.<(S5)
).

Next, when the EOP signal is detected, the display circuit 8 is made to display that "the received data is stored in the memory" (S9), and when the EOP is not detected, the remaining data in the memory 6 is determined from the address signal. Check the capacity (S7), and if there is remaining capacity in the memory 6, return to S5; if there is no remaining capacity in the memory 6, use the received data already stored in the memory 6 to retrieve the data of the highest resolution stage. After erasing from memory 6 (S8). Returning to S5, the data is stored in the memory 6.

FIG. 3 is a flowchart showing the process of recording data accumulated in the memory 6. First, when the button to start recording on the operation panel is pressed (S11). Configure the recording section 7 (S 1
2). That is, first, the recording section 7 is activated and set to a mode for recording data from the memory 6. Then, after putting the memory 6 in a read state and setting its address (S 1 3), data is output from the memory 6 to the recording section 7 and recording is performed (S 1 4). When the memory 6 outputs all stored data (S 1 5), the display circuit 8 displays "No received data is stored" (S 1 6). Finish the operation. FIG. 4 is a block diagram showing an example of the configuration of the encoding circuit 11. This encoding circuit 11 includes frame memories 112 and 114.
, 116, reduction circuits 113, 115, and encoder 117
, 118, 119.

First, the image data that you want to encode hierarchically is Frame Memo! Stored in J 1 1 2. Frame memo 1)
The original image data stored in 1 1 2 is sent to the reduction circuit 113
The image is reduced to a 1/2 size image vertically and horizontally and stored in the frame memory 114. The reduction method at this time may be, for example, a method of subsampling to 1/n (here, n is 2) both vertically and horizontally, or filtering using a low-pass filter, high-pass filter, or recursive filter, etc. Methods such as subsampling after thresholding the obtained values may also be used, but the method is not limited to these. Similarly, the 1/2 size image stored in the frame memory 114 is reduced to 172 sizes vertically and horizontally in the reduction circuit 115 and stored in the frame memory 116. Therefore, the frame memory 116 stores an image that is 1/4 the vertical and horizontal size of the image stored in the frame memory 112. The encoder 117 performs entrobi encoding of the image data stored in the frame memory 116 using, for example, an arithmetic coding method, and outputs first-stage encoded data 401.

Furthermore, the encoder 118 entropy encodes the image stored in the frame memory 114 while referring to the image stored in the frame memory 116, and outputs second-stage encoded data 402.

Similarly, the encoder 119 entropy encodes the image stored in the frame memory 112 while referring to the image stored in the frame memory 114, and outputs third-stage encoded data 403.

The image data encoded hierarchically in this manner is stored in the memory 6 in order from the lowest resolution to the highest resolution. Note that entropy encoding is used as an example of the encoding method here, but other encodings may be used. FIG. 5 is a block diagram showing an example of the structure of the decoding circuit 3. This decoding circuit 3 includes decoders 20, 21, and 22 and frame memories 23, 24, and 25. This decoding circuit 3 first selects the l-th encoded data that is hierarchically encoded and stored in the database.
The encoded data 501 of the first stage (low resolution) is input to the decoder 20, where it is decoded and the result is stored in the frame memory 23, and the encoded data 501 of the first stage is decoded.
It is output as 04. When producing a reduced image for editing, the decoding process is finished at this stage and the image data 504 is stored in the memory 6. The first stage image data 504 is also used when performing an image search. When editing the original image, perform the following processing. first,
Of the encoded data (hierarchically encoded signals) read from the memory 6 , second-stage encoded data 502 is input to the decoder 21 . In this decoder 21, the encoded data 502 is decoded while referring to the image data stored in the frame memory 23 during the previous first stage decoding, and the result is stored in the frame memory 24,
It is output as second stage decoded image data 505.

Further, among the encoded data (hierarchically encoded signals) read out from the memory 6, third-stage encoded data 503 is input to the decoder 22. In the decoder 22, the encoded data 503 is decoded while referring to the image data stored in the frame memory 24, and the result is stored in the frame memory 25 and output as third-stage image data 506. At this time frame memory 2
The image data stored in 5 represents the original image before being encoded. In addition, in the above example,
The received hierarchical images are stored in the all-stage memory 6, but if the memory of the device is small, it may be possible to store only the low-resolution stages instead of storing the high-resolution stages from the beginning. Further, the stage number of the floor waste image stored in the memory 6 may be displayed on the display circuit 8. Furthermore, when loading a recording paper and recording data in the memory 6, the stage number (resolution) of the data recorded on the recording paper may be recorded. Further, in the above embodiment, a facsimile machine was explained as an example, but for example, a wire dot printer or an inkjet printer used by connecting to a computer can also be used.
It can also be applied to various recording devices. [Effects of the Invention] According to the present invention, even when the remaining memory capacity becomes small,
This has the effect of avoiding communication interruptions. Therefore, for example, there is an effect that the transmitting side operator does not need to perform time-consuming operations such as retransmission.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the structure of a facsimile machine that employs a recording device according to an embodiment of the present invention. FIG. 2 is a flowchart showing the control operation of the control circuit in the facsimile machine. FIG. 3 is a flowchart showing the process of recording data accumulated in the memory in the same facsimile machine. FIG. 4 is a block diagram showing an example of the structure of the encoding circuit in the facsimile machine. Figure 5 is a block diagram showing an example of the configuration of the decoding circuit in the facsimile machine. DESCRIPTION OF SYMBOLS 1... NCU, 2... Demodulator, 3... Decoding circuit, 4... EOP signal detection circuit 5... Recording paper detection circuit, 6... Memory, 7... Recording part , 8... Display circuit, 9... Button press detection circuit, 10... Control circuit, 11... Encoding circuit, 12... Modulator, 13... Hybrid circuit.

Claims (1)

[Scope of Claims] Receiving means for receiving hierarchically encoded images; Detection means for detecting the remaining amount of recording paper; Storage means for storing received information; control means for storing the received information in the storage means when the storage capacity of the storage means becomes less than a certain value, and for erasing high-resolution information among the encoded image information already stored when the storage capacity of the storage means becomes less than a certain value; A storage device comprising: and;