JPH0685841A - Communication controller - Google Patents

Abstract

PURPOSE:To implement communication between process sections without production of a dead lock event even when plural process sections implement synchronization communication while implementing parallel processing. CONSTITUTION:Upon the receipt of a packet from process sections 12, 13, 14, 15, a packet reception means 40 checks the operating state of each area in a buffer memory 50 by looking into a check table 51 and a packet is reserved in an idle area. On the other hand, the packet stored in the buffer memory 50 is retrieved by using a packet reception means 40 to check the check table 51 and the stored packet is given to the process sections 12, 13, 14, 15 being transmission destinations. Thus, the transmission/reception among the process sections 12, 13, 14, 15 are implemented without causing a dead lock event.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a communication control device for controlling communication of packets passed between processes.

[0002]

2. Description of the Related Art FIG. 13 is a block diagram of a computer network. The host computer 1 has a first controller 10
Are connected, and the second controller 20 and the third controller 30 are connected to the first controller 10. In this case, each controller 10, 20, 30 is provided with each communication link r1-r4, and these communication links r1-r4.
They are connected to each other via r4.

In each controller 10, 20, 30 a plurality of processes connected in a point-to-point type are executed in parallel, and packets are passed between these processes for synchronous communication.

A communication control process 11 is provided in the controller 10, and each process 12 to 15 is connected to the communication control process 11 via each channel. Similarly, in the controllers 20 and 30, the communication control processes 21 and 31 are similarly connected to each process 2 via each channel.
2 to 25 and 32 to 35 are connected.

In such a configuration, the communication control process 1
1, 21, and 31 pass the packets according to the communication control flow chart shown in FIG. This communication control will be described for the first controller 10.

First, the communication control process 11 executes step #
1 receives packets from each communication link r1-r4 or each process 12-15 in its own controller 10. As shown in FIG. 15, in this packet, the transmission destination controller number, the transmission destination process number, the transmission source controller number, the transmission source process number, and the data are written at the beginning.

Next, the communication control process 11 proceeds to step # 2.
From the contents of the packet to another controller 20, 3
It is determined whether the packet is sent from 0. According to this determination, if the packet is from another controller 20, 30, the communication control process 11 moves to step # 3 and stores the communication links r1 to r4 that received the packet.

If the result of determination in step # 2 is that the packet is not from another controller 20 or 30, the communication control process 11 moves to step # 4 and determines whether the packet is from its own process 12-15. To do. As a result of this determination, if the packet is from its own process 12-15, the communication control process 11 moves to step # 5 and passes the packet to the process 12-15 according to the destination process number written in the packet.

Next, the communication control process 11 proceeds to step # 6.
At this point, packets other than those addressed to the controller 10
This packet is passed to each other controller through each communication link other than the communication link that received the packet. In such communication control, as shown in FIG. 16, the process 12 (a) sends the packet “1” to the process 13 (b) sends the packet “2” to the process 13 (c) sends the packet “3” to the process 13 ( d) Receive the packet packet “4” or “5” from the process 13 or 14 (e) Perform the processing in the order of receiving the packet packet “5” or “4” from the process 14 or 13, and the process 13 (a) Receive the packet "1" from the process 12 (b) Execute the processing in the order of transmitting the packet "4" to the process 12, and the process 14 receives the packet "2" from the process (a) ( b) The case where the processing is executed in the order of transmitting the packet “5” to the process 12 will be described.

In this case, the process 12 sends the packet "1".
If the process 13 returns the packet "4" after transmitting "2" and "2", the process 12 normally transfers the packet.

However, the process 12 uses the packet "2".
If the process 13 returns the packet “4” before sending the packet, the communication control process 11 tries to pass the packet “4” from the process 13 to the process “1”.

However, at this time, the process "1" waits until the process "1" receives the packet "4" until after the process "1" has transmitted the packet "2". On the other hand, the communication control process 11 cannot receive the packet "2" and deliver it to the process "3" unless the packet "4" is delivered to the process "1", so that the communication control process 11 enters a waiting state.

[0013] When the other parties wait for the communication to be received in this way, a phenomenon called so-called deadlock occurs in which the communication does not proceed forever. This deadlock occurs when multiple processes perform synchronous communication while performing parallel processing. However, the number of processes increases,
When passing packets between controllers, a communication control program must be created so that deadlock does not occur, but it takes a lot of time and effort to create this communication control program, and even if it is created with caution. It is difficult to eliminate deadlock completely.

[0014]

As described above, when a plurality of processes perform synchronous communication while performing parallel processing, a deadlock phenomenon occurs and it becomes difficult to transfer packets between the processes.

Therefore, an object of the present invention is to provide a communication control device capable of communicating between processes without causing a deadlock phenomenon even if a plurality of processes perform synchronous communication while performing parallel processing.

[0016]

According to the present invention, there is provided a communication control device, wherein at least each process for performing a predetermined process is connected via each communication channel, and communication control is performed for a packet passed between these processes,

A buffer memory for temporarily storing packets, a check table showing the usage status of each area in the buffer memory, and a packet for receiving a packet received from a process in a free area of the buffer memory checked by the check table. The communication control device is provided with a receiving means and a packet passing means for checking a packet stored in a buffer memory with a check table and passing the packet to a process of a transmission destination.

Further, the present invention provides a communication control device, wherein at least each process for performing a predetermined process is connected via each communication channel, and communication control is performed for a packet transferred between these processes,

Packet discriminating means for discriminating whether the packet received from the process is for data transmission or data request, a buffer memory of a plurality of areas for temporarily storing the data transmission packet, and the data transmission packet received from the process And a packet passing means for reading the packet requested by the data request packet received from the process from the buffer memory and passing the packet to the destination process. It is a communication control device that aims to achieve the purpose.

[0020]

With such means, when the packet is received from the process, the packet receiving means checks the usage state of each area in the buffer memory by looking at the check table, and the packet is saved in the empty area. To be done. On the other hand, the packet stored in the buffer memory is searched by checking the check table by the packet passing means, and the stored packet is passed to the process of the transmission destination. As a result, packets are passed between the processes without causing a deadlock phenomenon.

Further, by providing the above means, when the packet received from the process is received, the packet determining means determines whether the packet is for data transmission or data request. As a result of this packet discrimination, if the packet is a data transmission packet, the packet receiving means saves the packet in an empty area of the buffer memory, and if it is a data request packet, the packet passing means indicates the data request packet. Reads the packet from the buffer memory and passes this packet to the destination process.

[0022]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A first embodiment of the present invention will be described below with reference to the drawings. The same parts as those in FIG. 12 are designated by the same reference numerals, and detailed description thereof will be omitted.

FIG. 1 is a block diagram of a computer network to which a communication control device is applied. Each communication control process 40, 4
1 and 42 respectively include the buffer memory 50 shown in FIG.
Also, a usage check table 51 shown in FIG. 3 is provided.

The buffer memory 50 has a plurality of packet buffer areas "1" to "n", and packets are stored in any of these packet buffer areas "1" to "n".

The usage check table 51 is for checking the usage status of each packet buffer area "1" to "n" of the buffer memory 50, and corresponds to each packet buffer area "1" to "n". Each check area c1
To cn and communication link areas s1 to sn for checking the reception communication links r1 to r4 of the packets stored in the respective packet buffer areas “1” to “n”.

In this case, in each of the check areas c1 to cn, "1" is written when the packet is stored in each of the packet buffer areas "1" to "n", and "0" is written in the empty area. Is written. Also, the communication link area s
“0” is written in 1 to sn if it is a packet from each process of the communication links r1 to r4 or its own controller.

Further, each communication control process 40, 41, 42
Has a function of concurrently performing the packet receiving process according to the packet receiving flowchart shown in FIG. 4 and the packet passing process according to the packet receiving flowchart shown in FIG.

By executing the packet receiving process, each communication control process 40, 41, 42 has a function of storing the packet received from each process in the free area of the buffer memory 50 checked by the use check table 51. Becomes

Further, by executing the packet passing process, each communication control process 40, 41, 42 searches the use check table 51 for the packet stored in the buffer memory 50, and sends the stored packet to the destination. It has each function of a packet passing means to be passed to the process. Next, the operation of the computer network configured as described above will be described with reference to the packet reception flow chart shown in FIG. 4 and the packet delivery flow chart shown in FIG. (1) Packet reception processing

The communication control process 40 sets the address i of each packet buffer area "1" to "n" of the buffer memory 50 to "1" in step # 10, and sets the address i in the next steps # 11 to # 13. While moving up, it is searched whether or not each of the packet buffer areas "1" to "n" is free.

When a free packet buffer area is found by this search, the communication control process 40 moves to step # 14 to receive a packet through each communication link r1 to r4, or receive from each process 12 to 15 through each communication channel. Wait for a packet

When a packet is fetched from the process 12 in this state, the communication control process 40 receives the packet from the process 12 in step # 15, and the packet is retrieved from the empty packet buffer area, for example, the area "1". Write in.

Next, the communication control process 40 proceeds to step # 16.
At 1, a "1" indicating packet storage is written in the check area c1 of the usage check table 51 corresponding to the packet buffer area "1", and a "0" is written in the communication link area s1. After this, again the communication control process 40
Returns to step # 10. (2) Packet passing process

The communication control process 40 sets the address i of each packet buffer area "1" to "n" of the buffer memory 50 to "1" in step # 20, and sets the address i in the next steps # 21 to # 23. While moving forward, it is searched whether or not a packet is stored in each of the packet buffer areas "1" to "n".

If, for example, the packet storage in the packet buffer area "1" is confirmed by this search, the communication control process 40 moves to step # 24, and the packet stored in the area "2" is stored in its own controller 40. Determine if it is destined for the process.

As a result of this judgment, the controller 40 of its own
Communication process 40, the communication control process 40 sends the destination process, for example, process 13 in step # 25.
Pass the packet to. If it is not addressed to the process of its own controller 40, the communication control process 40 proceeds to step #
Moving to 26, the communication link r3 received from the usage check table 51 is confirmed, and a packet is sent out from each communication link r1, r2, r4 other than this communication link r3. Next, the communication control process 40 writes "0" in the check area c2 of the usage check table 51 in step # 27, and returns to step # 20 again. (3) Delivery of Packets in Communication Control Process 40 As shown in FIG. 6, the communication control process 40 receives the above-mentioned packets and executes the packet delivery processing to deliver the following packets. (a) Receive the packet “1” from the process 12 and store it in the free area of the buffer memory 50. (b) Pass the packet “1” to the process 13. (c) Receive the packet “2” from the process 13 and save it in the free area of the buffer memory 50.

(D) An attempt is made to pass this packet "2" to the process 12, but the process 12 sends each process 14, 15
No packets are received until after passing each packet "3" and "4" to. Therefore, the delivery of the packet "2" is in a waiting state.

(E) Packet "3" from process 13,
Subsequently, the packet “4” is received and stored in each free area of the buffer memory 50. At this time, the buffer memory 50
Packets "2", "3", and "4" are stored in the. (f) Pass the stored packet “2” to the process 12. (g) Pass the stored packet “3” to the process 14. (h) The stored packet “4” is passed to the process 15. (i) Receive packet “5” from process 14 and pass it to process 12.

As described above, according to the first embodiment, since each packet is temporarily stored in the buffer memory 50 provided in the communication control process 40 and the packet is delivered, each process performs parallel processing. However, when performing synchronous communication, the number of processes increases, and the deadlock phenomenon does not occur even if packets are passed between the controllers. Therefore, the trouble of creating the communication control program while considering the communication order between the processes so as not to cause deadlock is eliminated, and the cost of creating the program can be reduced.

Next, a second embodiment of the present invention will be described. In this embodiment, only the functions of the communication control processes 40, 41, 42 in the computer network shown in FIG. 1 differ, so the communication control process 40 will be described here. The communication control process 40 is shown in FIGS.
It has the following functions by executing processing according to the packet delivery flow chart shown in FIG. It has a packet discriminating function for discriminating whether the packet received from the processes 12 to 15 or the other controllers 20 and 30 is for data request or data transmission.

In this case, the data request packet is shown in FIG.
As shown in, the packet type (“0” in the request packet) is formed at the beginning, and then the source computer number, the source process number, the source computer number of the request packet, and the source process number of the requested packet are formed in this order. There is. Further, as shown in FIG. 10, the packet for data transmission has a packet type (“1” in the transmission packet) at the beginning, then a destination computer number, a source process number, a source computer number, a source process number, and data. Are formed in this order. It should be noted that the data request packets and the data transmission packets are added with a data type as shown in FIGS. 11 and 12, and the number of the data type is determined in advance according to the data type (for example, an emergency signal). "-1"), and the required condition may be designated by the number. Next, a packet receiving function of saving a packet for data transmission received from the processes 12 to 15 or the other controllers 20 and 30 in an empty area of the buffer memory 50,

A packet passing function for reading out a packet designated by the data request packet received from the processes 12 to 15 or the other controllers 20 and 30 from the buffer memory 50 and passing this packet to the destination process.
It has a function of obtaining the number m of packets currently stored in the buffer memory 50 and a function of creating an n-dimensional index array indicating the arrival order of each packet. Next, the operation of the apparatus configured as described above will be described. (1) Passing packets

Upon receiving the packet in step # 30, the communication control process 40 determines in step # 31 whether the received packet is for data request or for data transmission, based on the packet type. If the result of this determination is that it is for data transmission, the communication control process 40 sets the address i of each packet buffer area "1" to "n" of the buffer memory 50 to "1" in step # 32, and the next step In steps # 33 to # 35, the address i is moved up and it is searched whether or not each of the packet buffer areas "1" to "n" is free. In this case, the communication control process 40 proceeds to step # 33.
Search for the index in
If X (m) is up to "third", the packet for data transmission is stored in the packet buffer area "4" searched fourth in step # 37, and the number of packets m is counted up in the next step # 38. In the next step # 39, the index IDX (m) is stored in association with the address i.

On the other hand, as a result of the judgment in step # 31,
If the packet is for data request, communication control process 4
If 0, the process proceeds to step # 40, and the address i of each packet buffer area "1" to "n" of the buffer memory 50 is set to "1". Next, the communication control process 40 executes steps # 41 to #.
In 43, the address i is advanced, that is, the packets stored in the oldest order of the index IDX (i) are searched, and the data request packet is requested from the destination computer number and the destination process number written in the packet. It is determined that the packet is If there is no packet requested by the data request packet, the process returns to step # 30 again.

If the next request packet is found, the communication control process 40 moves to step # 44, reads the packet from the buffer memory 50, and passes it to the process of the transmission source controller written in the data request packet. .

Next, the communication control process 40 proceeds to step # 45.
In the next step # 46, the number of packets m is decremented by 1 and the address i is set to j in the next step # 46.
At # 49, the index portion of the packet read out earlier is deleted, and each index IDX (j) is sequentially advanced. Then, the process returns to step # 30 again. (2) Delivery of Packets in Communication Control Process 40 Upon receipt of each data transmission packet from each of the processes 13 to 15, the communication control process 40 sequentially stores these data transmission packets in the buffer memory 50.

In this state, when the process 12 sends a request packet for a packet whose source is the process 13, the communication control process 40 receives the request packet and sends the requested data transmission packet of the source process 13. It is read from the buffer memory 50 and returned to the process 12.

Next, when the process 12 sends a request packet for the transmission source process 14, the communication control process 40 reads the data transmission packet of the transmission source process 14 from the buffer memory 50 and returns it to the process 12 in the same manner as above. .

Next, when the process 12 sends a request packet for the transmission source process 15, the communication control process 40 reads the data transmission packet of the transmission source process 15 from the buffer memory 50 and returns it to the process 12 as described above. .

As described above, according to the second embodiment, not only the same effect as that of the first embodiment can be obtained, but even if each of the processes 13 to 15 sends a packet to the process 12, the process 12 can be processed. Then, each packet can be received in the order of each process 13 to 15. Therefore, the process 12 may incorporate a program for receiving packets in the order of the processes 13 to 15, and the creation of this program becomes easy.

Generally, when a plurality of processes are executed in parallel and packet communication is performed between the processes as needed, the process is called event-driven and
Although it is not possible to determine what kind of packet is received at what time, in such an embodiment, the packet can be surely delivered to the process of the transmission destination regardless of what kind of packet is sent at any time.

The present invention is not limited to the above embodiments, and may be modified within the scope of the invention. For example, the presence / absence of packet storage in the usage check table 51 is not limited to “1” and “0”, other codes may be used, and the packet length may be the maximum packet length or less.

If the received packet is other than its own control, the communication control process 40 does not broadcast it to each of the communication links r1 to r4, but the communication links r1 to r4.
If the controller to which r4 is connected is known, the controller may be determined and the packet may be passed.

In the data request packet, the source computer number of the request packet shown in FIG.
If "1" is set, a packet from any computer number is designated, and similarly, if the transmission source process number of the requested packet is set to "-1", for example,
All processes of the designated computer may be designated.

[0055]

As described above in detail, according to the present invention, there is provided a communication control device capable of communicating between processes without causing a deadlock phenomenon even if a plurality of processes perform synchronous communication while performing parallel processing. it can.

[Brief description of drawings]

FIG. 1 is a configuration diagram showing a first embodiment in which a communication control device according to the present invention is applied to a computer network.

FIG. 2 is a schematic diagram of a buffer memory in the same device.

FIG. 3 is a schematic diagram of a usage check table in the device.

FIG. 4 is a packet reception flowchart of the device.

FIG. 5 is a packet flow chart of the device.

FIG. 6 is a diagram of packet transfer in a communication control process in the same device.

FIG. 7 is a packet delivery flow chart in the second embodiment of the device of the present invention.

FIG. 8 is a packet delivery flow chart in the apparatus.

FIG. 9 is a format diagram of a data request packet used in the device.

FIG. 10 is a format diagram of a data transmission packet used in the apparatus.

FIG. 11 is a format diagram of a data request packet used in the apparatus.

FIG. 12 is a format diagram of a data transmission packet used in the device.

FIG. 13 is a configuration diagram of a computer network.

FIG. 14 is a packet delivery flowchart in the network.

FIG. 15 is a packet format diagram.

FIG. 16 is a diagram of packet transfer in a communication control process in the same network.

[Explanation of symbols]

10, 20, 30 ... Controller, 40, 41, 42 ...
Communication control process, 12, 13, 14, 15 ... Process, 22, 23, 24, 25 ... Process, 32, 33,
34, 35 ... Process, 50 ... Buffer memory, 51 ...
Usage check table.

Claims (2)

[Claims] 1. A communication control device in which at least each process for performing a predetermined process is connected via each communication channel, and communication control is performed for a packet passed between these processes, a buffer memory for temporarily storing the packet, and A check table showing a usage state of each area in the buffer memory, packet receiving means for storing the packet received from the process in an empty area of the buffer memory checked by the check table, and the buffer memory A packet passing means for checking the existing packet in the check table and delivering the packet to the process of the destination, the communication control device. 2. A communication control device, wherein at least each process for performing a predetermined process is connected via each communication channel, and communication control is performed for a packet passed between these processes, wherein a packet received from said process is for data transmission or Packet discriminating means for discriminating whether it is for data request, buffer memory of a plurality of areas for temporarily storing the data transmitting packet, packet for storing the data transmitting packet received from the process in an empty area of the buffer memory Receiving means, and reading from the buffer memory the packet requested by the data request packet received from the process,
And a packet passing means for returning the packet to the process that has transmitted the data request packet, and a communication control device.