JPH0685661A - Ecl output circuit - Google Patents
Ecl output circuitInfo
- Publication number
- JPH0685661A JPH0685661A JP4238027A JP23802792A JPH0685661A JP H0685661 A JPH0685661 A JP H0685661A JP 4238027 A JP4238027 A JP 4238027A JP 23802792 A JP23802792 A JP 23802792A JP H0685661 A JPH0685661 A JP H0685661A
- Authority
- JP
- Japan
- Prior art keywords
- transistor
- transistors
- output
- temperature
- current
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Logic Circuits (AREA)
- Amplifiers (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は高速ディジタル回路に用
いられるECL(エミッタ カップルド ロジック)出
力回路に係わる。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an ECL (emitter coupled logic) output circuit used in a high speed digital circuit.
【0002】[0002]
【従来の技術】従来技術においては、トランジスタ差動
増幅器とエミッタフォロアトランジスタから構成される
ECL出力回路の出力電圧の温度特性は、出力エミッタ
フォロアのべ−ス−エミッタ間電圧の温度変動分の温度
係数を持つ。高速ディジタル回路においては、出力電圧
の温度変動は、振幅位相変換による位相余裕の減少をも
たらし、最大動作周波数等の性能劣化の原因となる。べ
−ス−エミッタ間電圧の温度変動を補償する方法として
は、図2に示すトランジスタ差動増幅器負荷抵抗間に温
度補償用ダイオ−ドと抵抗を接続して、差動トランジス
タ負荷抵抗間に電流を流し、温度補償用ダイオ−ドの順
電圧の温度係数を利用して出力温度変動を低減する方法
がしられている。しかし差動トランジスタ負荷抵抗間に
流れる電流は、出力振幅を減らす方向に流れるため、同
一出力振幅を得るためにはトランジスタ差動増幅器に流
れる電流を大きくせねばならず、消費電力が大きくなる
という欠点があった。2. Description of the Related Art In the prior art, the temperature characteristic of the output voltage of an ECL output circuit composed of a transistor differential amplifier and an emitter follower transistor is determined by the temperature variation of the base-emitter voltage of the output emitter follower. Has a coefficient. In a high-speed digital circuit, the temperature fluctuation of the output voltage causes a decrease in the phase margin due to the amplitude-phase conversion, which causes performance deterioration such as the maximum operating frequency. As a method for compensating the temperature variation of the base-emitter voltage, a temperature compensation diode and a resistor are connected between the transistor differential amplifier load resistors shown in FIG. Is used to reduce the output temperature fluctuation by utilizing the temperature coefficient of the forward voltage of the temperature compensating diode. However, since the current flowing between the differential transistor load resistors flows in the direction of decreasing the output amplitude, the current flowing through the transistor differential amplifier must be increased in order to obtain the same output amplitude, which results in a large power consumption. was there.
【0003】[0003]
【発明が解決しようとする課題】本発明の目的は、消費
電力の増加量の小さいECL出力回路の出力電圧温度変
動低減回路を実現することにある。SUMMARY OF THE INVENTION It is an object of the present invention to realize an output voltage temperature fluctuation reducing circuit for an ECL output circuit which consumes less power.
【0004】[0004]
【課題を解決するための手段】上記目的は、トランジス
タ差動増幅器の負荷抵抗に、外部からエミッタフォロア
トランジスタのベ−ス−エミッタ電圧の温度変動を補償
する電圧を発生させるだけの電流を流すことにより実現
される。この電流は差動トランジスタの負荷抵抗に対し
て同相方向に流れる為、出力振幅を減らさない。また、
電流の大きさも差動トランジスタ負荷抵抗に流れる負荷
電流全体(数mA)に対して小さく、消費電力の増加量
も前記従来技術に比べて小さい。SUMMARY OF THE INVENTION The above-mentioned object is to allow a current sufficient to generate a voltage for compensating the temperature variation of the base-emitter voltage of an emitter follower transistor from the outside to the load resistance of the transistor differential amplifier. It is realized by. Since this current flows in the same phase direction with respect to the load resistance of the differential transistor, the output amplitude is not reduced. Also,
The magnitude of the current is small with respect to the entire load current (several mA) flowing through the load resistance of the differential transistor, and the amount of increase in power consumption is smaller than that of the conventional technique.
【0005】[0005]
【作用】温度補償用トランジスタのベ−スに一定電流を
流したダイオ−ドを接続して、前記温度補償用トランジ
スタと、該ダイオ−ドの順電圧の差によって生じる電流
を、トランジスタ差動増幅器の負荷抵抗に流す。トラン
ジスタべ−ス−エミッタ間電圧の温度係数はトランジス
タのエミッタ電流にて決定され、同一構造のトランジス
タの場合そのエミッタ電流密度が大きい程、温度係数絶
対値が小さい。ダイオ−ドの順電圧についても同様であ
る。従ってトランジスタ及びダイオ−ドの素子サイズを
変えて電流密度を変えれば特定の温度係数差を設定する
ことが可能となる。エミッタサイズを変えるかわりに、
同一サイズのトランジスタ及びダイオ−ドを複数個並列
に接続しても同様である。この温度係数差を温度補償用
トランジスタのエミッタに接続した抵抗を使って電流に
変換し、さらにトランジスタ差動増幅器の負荷抵抗で、
電圧に変換すれば、前記エミッタフォロアトランジスタ
出力電圧の温度変動を低減させることができる。The diode for supplying a constant current is connected to the base of the temperature compensating transistor, and the current generated by the difference between the temperature compensating transistor and the forward voltage of the diode is supplied to the transistor differential amplifier. To load resistance. The temperature coefficient of the transistor base-emitter voltage is determined by the emitter current of the transistor. In the case of transistors having the same structure, the larger the emitter current density, the smaller the absolute value of the temperature coefficient. The same applies to the forward voltage of the diode. Therefore, if the element size of the transistor and the diode is changed to change the current density, a specific temperature coefficient difference can be set. Instead of changing the emitter size,
The same applies when a plurality of transistors and diodes of the same size are connected in parallel. This temperature coefficient difference is converted into a current by using the resistor connected to the emitter of the temperature compensation transistor, and further by the load resistance of the transistor differential amplifier,
If converted into a voltage, it is possible to reduce the temperature fluctuation of the output voltage of the emitter follower transistor.
【0006】[0006]
【実施例】以下、図1を使用して本発明の1実施例につ
いて説明する。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below with reference to FIG.
【0007】トランジスタ差動増幅器1出力はエミッタ
フォロアトランジスタ2、3でバッファされて終端抵抗
4、5に出力電圧を発生する。該トランジスタ差動増幅
器の負荷抵抗6、7(抵抗値R1)には同相の電流I1
を流す温度補償用トランジスタ8、9を接続する。該温
度補償用トランジスタ8、9のエミッタにそれぞれ抵抗
10、11(抵抗値R2)、ベ−スにダイオ−ド12お
よび該ダイオ−ドにバイアス電流I2を供給する電流源
13を接続する。The output of the transistor differential amplifier 1 is buffered by the emitter follower transistors 2 and 3 to generate an output voltage at the terminating resistors 4 and 5. In-phase current I1 is applied to load resistors 6 and 7 (resistance value R1) of the transistor differential amplifier.
The temperature compensating transistors 8 and 9 are connected. Resistors 10 and 11 (resistance value R2) are connected to the emitters of the temperature compensating transistors 8 and 9, respectively, and a diode 12 is connected to the base and a current source 13 for supplying a bias current I2 to the diode is connected.
【0008】出力電圧Voの温度計数は、トランジスタ
差動増幅器1の負荷電流Ioの温度変動及びエミッタフ
ォロア2、3のベ−ス電流を無視できるとしてAs for the temperature coefficient of the output voltage Vo, the temperature fluctuation of the load current Io of the transistor differential amplifier 1 and the base currents of the emitter followers 2 and 3 can be ignored.
【0009】[0009]
【数1】 dVo/dT=−R1×(dI1/dT)−(dVbe2/dT) トランジスタ8、9のベ−ス電流を無視すると## EQU00001 ## dVo / dT = -R1.times. (DI1 / dT)-(dVbe2 / dT) If the base currents of the transistors 8 and 9 are ignored.
【0010】[0010]
【数2】 dI1/dT=〔(dVf12/dT)−(dVbe8/dT)〕/R2 従って## EQU00002 ## dI1 / dT = [(dVf12 / dT)-(dVbe8 / dT)] / R2
【0011】[0011]
【数3】 dVo/dT =−(R1/R2)×〔(dVf12/dT)−(dVbe8/dT)〕 −(dVbe2/dT) ここで、Vbe2、Vbe8、Vf12はそれぞれトラ
ンジスタ2、8のベ−ス−エミッタ間電圧、ダイオ−ド
12の順電圧を示す。一方、I1とI2の関係は、トラ
ンジスタ8とダイオ−ド12とのエミッタサイズの比率
を1:nとすると、VT=k×T/q=26mV(k:
ボルツマン定数、T=300K:絶対温度、q:電子素
量)とおいて## EQU00003 ## dVo / dT =-(R1 / R2) .times. ((DVf12 / dT)-(dVbe8 / dT)]-(dVbe2 / dT) where Vbe2, Vbe8, and Vf12 are the bases of the transistors 2 and 8, respectively. -The voltage between the source and the emitter and the forward voltage of the diode 12 are shown. On the other hand, the relationship between I1 and I2 is VT = k × T / q = 26 mV (k: if the ratio of the emitter sizes of the transistor 8 and the diode 12 is 1: n).
Boltzmann constant, T = 300K: absolute temperature, q: electron content)
【0012】[0012]
【数4】I1=ln(n×I2/I1)×VT/R2 で与えられる。4 is given by I1 = ln (n × I2 / I1) × VT / R2.
【0013】通常トランジスタベ−ス−エミッタ間電圧
及びダイオ−ドの順電圧の温度係数は負(凡そ−1〜−
2mV)でその絶対値はトランジスタおよびダイオ−ド
に流れる電流が大きい程小さい。従って数4からn×I
2/I1>1とすれば、式数3右辺第1項と、第2項が
打消しあう値を選ぶことができる。Normally, the temperature coefficient of the transistor base-emitter voltage and the diode forward voltage is negative (approximately -1 to-
2 mV), the absolute value is smaller as the current flowing through the transistor and the diode is larger. Therefore, from Equation 4, n × I
If 2 / I1> 1, it is possible to select a value at which the first term and the second term on the right side of Equation 3 cancel each other.
【0014】一例として、R1=200Ω、R2=30
Ω、I1=0.09mA、I2=0.67mA、n=1
6とするとAs an example, R1 = 200Ω, R2 = 30
Ω, I1 = 0.09 mA, I2 = 0.67 mA, n = 1
6
【0015】[0015]
【数5】 dVo/dT =−(200/30)×〔(−1.4mV/℃)−(−1.6mV/℃)〕 −(−1.35mV/℃) =0.016mV/℃ となり、出力電圧温度変動を1/80程度に小さくする
ことができる。この時、ECL回路出力振幅Vopを
0.8V程度とすると、トランジスタ差動増幅器負荷電
流Ioは## EQU00005 ## dVo / dT =-(200/30) .times. ((-1.4 mV / .degree. C.)-(-1.6 mV / .degree. C.)]-(-1.35 mV / .degree. C.) = 0.016 mV / .degree. The output voltage temperature fluctuation can be reduced to about 1/80. At this time, if the ECL circuit output amplitude Vop is set to about 0.8V, the transistor differential amplifier load current Io becomes
【0016】[0016]
【数6】 Io=Vop/R1=0.8V/200Ω=4mA≫I1,I2 で消費電力の増加量も小さい。(6) Io = Vop / R1 = 0.8V / 200Ω = 4mA >> I1 and I2, and the increase in power consumption is small.
【0017】[0017]
【発明の効果】本発明により、温度変動に対して出力電
圧を安定化したECL出力回路を実現することができ
る。消費電力の増加量も小さい。また本回路によれば差
動トランジスタ負荷抵抗間の相互接続を行う必要が無い
ため差動トランジスタ間の相互干渉を防止することが出
来、高速動作するECL出力回路の出力波形歪を減少さ
せる効果がある。According to the present invention, it is possible to realize an ECL output circuit whose output voltage is stabilized against temperature fluctuations. The increase in power consumption is also small. Further, according to this circuit, since it is not necessary to connect the load resistances of the differential transistors, mutual interference between the differential transistors can be prevented, and the effect of reducing the output waveform distortion of the ECL output circuit operating at high speed can be obtained. is there.
【図1】本発明の1実施例を示す図である。FIG. 1 is a diagram showing an embodiment of the present invention.
【図2】従来技術による回路例を示す図である。FIG. 2 is a diagram showing an example of a circuit according to a conventional technique.
1…トランジスタ差動増幅器、2、3…エミッタフォロ
アトランジスタ、4、5…終端抵抗、6、7…負荷抵
抗、8、9…温度補償用トランジスタ、10、11…抵抗、
12…ダイオ−ド、13…電流源。DESCRIPTION OF SYMBOLS 1 ... Transistor differential amplifier, 2, 3 ... Emitter follower transistors, 4, 5 ... Termination resistors, 6, 7 ... Load resistors, 8, 9 ... Temperature compensation transistors, 10, 11 ... Resistors,
12 ... Diode, 13 ... Current source.
Claims (1)
アトランジスタと、該トランジスタ差動増幅器負荷抵抗
にたいして電流を流す温度補償用トランジスタと、該温
度補償用トランジスタのエミッタに接続された抵抗と、
該温度補償用トランジスタのベ−スに接続されたダイオ
−ドと、該ダイオ−ドにバイアス電流を供給する電流源
によって構成され、該温度補償用トランジスタのコレク
タ電流によって生じる前記トランジスタ差動増幅器負荷
抵抗の電圧降下の温度変動を、前記エミッタフォロアト
ランジスタによる電圧降下の温度変動と逆方向とし、且
つ、その絶対値を一致又は近付けることを特徴とするE
CL出力回路。1. A transistor differential amplifier, an emitter follower transistor, a temperature compensating transistor for supplying a current to the transistor differential amplifier load resistor, and a resistor connected to the emitter of the temperature compensating transistor.
The transistor differential amplifier load composed of a diode connected to the base of the temperature compensating transistor and a current source for supplying a bias current to the diode, the transistor differential amplifier load being generated by the collector current of the temperature compensating transistor. The temperature variation of the voltage drop of the resistor is opposite to the temperature variation of the voltage drop due to the emitter follower transistor, and the absolute values thereof are the same or close to each other.
CL output circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4238027A JPH0685661A (en) | 1992-09-07 | 1992-09-07 | Ecl output circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4238027A JPH0685661A (en) | 1992-09-07 | 1992-09-07 | Ecl output circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0685661A true JPH0685661A (en) | 1994-03-25 |
Family
ID=17024082
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP4238027A Pending JPH0685661A (en) | 1992-09-07 | 1992-09-07 | Ecl output circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0685661A (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20000000937A (en) * | 1998-06-05 | 2000-01-15 | 윤종용 | Emitter coupled logic amplifier circuit using active load |
WO2000051238A1 (en) * | 1999-02-22 | 2000-08-31 | Semiconductor Components Industries, L.L.C. | Logic gate having temperature compensation and method |
EP1110319A1 (en) * | 1998-08-27 | 2001-06-27 | Maxim Integrated Products, Inc. | Dc output level compensation circuit |
KR100468684B1 (en) * | 1997-08-28 | 2005-03-16 | 삼성전자주식회사 | Low power output circuit |
-
1992
- 1992-09-07 JP JP4238027A patent/JPH0685661A/en active Pending
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100468684B1 (en) * | 1997-08-28 | 2005-03-16 | 삼성전자주식회사 | Low power output circuit |
KR20000000937A (en) * | 1998-06-05 | 2000-01-15 | 윤종용 | Emitter coupled logic amplifier circuit using active load |
EP1110319A1 (en) * | 1998-08-27 | 2001-06-27 | Maxim Integrated Products, Inc. | Dc output level compensation circuit |
EP1110319A4 (en) * | 1998-08-27 | 2001-10-17 | Maxim Integrated Products | Dc output level compensation circuit |
WO2000051238A1 (en) * | 1999-02-22 | 2000-08-31 | Semiconductor Components Industries, L.L.C. | Logic gate having temperature compensation and method |
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