JPH0685562B2 - Digital copier - Google Patents

Description

Description: FIELD OF THE INVENTION The present invention scans a document image, converts it into image data, and processes the image data one after another as target image data.
The present invention relates to a digital copying apparatus that records image data that has undergone image processing.

[Prior Art] Generally, in a digital copying apparatus, an analog electric signal obtained at the output of an image sensor by reading a document image in a minute region, that is, by using a CCD (charge coupled device) image sensor or the like. Is subjected to A / D (analog / digital) conversion, various processing is performed on the obtained digital signal, and the signal is given to a recording device to obtain a copy image.

By the way, since it is difficult to change the density level for each recording pixel in the recording apparatus used for this type of apparatus, it is general to perform binary recording / non-recording. However, since the original may include a halftone image such as a photograph, it is necessary to reproduce the halftone image. Dither method, density pattern method, sub-matrix method, etc. have been conventionally proposed as a method for expressing a halftone image by using a recording device for binary recording, and by using these methods, a halftone image is reproduced. it can.

However, when performing halftone processing, a relatively preferable copy image is obtained when the original image density changes gently like a photograph, but when the original image density changes binary like a character. In this case, the contour of the copy image is blurred and it becomes difficult to read the characters, or the stain on the background of the original appears on the copy image, and the copy quality significantly deteriorates.

For original images such as characters, do not perform halftone processing,
A simple binary operation yields the desired copy. Therefore, if a switch for specifying the presence / absence of halftone processing is provided, a preferable copy mode can be selected by the operator's judgment according to the type of the original.

However, for example, like a pamphlet, there are many cases where a half-tone image such as a photograph and a binary image such as a character are mixed in one document. In such a case, if the binary mode is selected, the quality of the photograph is degraded, and if the halftone mode is selected, the quality of the character is degraded.

By the way, in this kind of digital copying apparatus,
There are two disadvantages. That is, when an image is read in small pixel units using a line sensor or the like, if the density change on the document has a periodicity, interference between the period (pitch) and the arrangement pitch (sampling period) of the image reading sensor causes Moire may occur on a recorded image. For example, when halftone printing is performed on a document, since the density change on the image has a periodicity, moire occurs due to interference between the density change cycle and the sampling cycle of the reading sensor.

For example, if the resolution of the image reading sensor is 16 pixels / mm, halftone dot printing with a density close to that resolution, that is, the range of 133 lines (about 10.5 pixels / mm) to 200 lines (about 16 pixels / mm) When the density is, the read signal is likely to have moire. Of course, moire also occurs at other densities, but especially at the above densities, the moire occurs remarkably, and the fluctuation range of the signal due to it is large.

The halftone printing itself is a kind of pseudo halftone expression, and the density change in pixel units is a binary value of 1/0 (recording / non-recording). In the halftone dot printing, the average density when the entire pixel set is viewed is changed in multiple steps by changing the pitch of the halftone dots or the size of the halftone dots, thereby expressing the halftone density. Therefore, if the problem of moire is not taken into consideration, when copying a document image for halftone printing, it is possible to reproduce a halftone image on a recorded image and perform preferable copying by processing the signal in a binary manner. it can. However, in reality, since the moire occurs as described above with respect to the original image to which halftone dots are applied at a specific density, the copy quality remarkably deteriorates.

However, in the conventional automatic image area discrimination, since the halftone dot image has a large density change, it is discriminated not as a photographic image but as a character image. Therefore, there is the above-mentioned problem that moire occurs in the halftone image.

An object of the present invention is to automatically determine whether a character image or a photographic image is a halftone dot image for each area on a document, and obtain a preferable copy even for a document in which each image is mixed. With the goal.

[Configuration of the Invention] In order to achieve the above object, in the present invention, a document image is scanned and converted into image data, the image data is sequentially processed as target image data, and the image-processed image data is recorded. In the digital copying apparatus, the image data of interest and a first reference level are compared,
First determining means for determining the first image when the image data of interest is on the black level side of the first reference level; the image data of interest, and a predetermined range around the image data of interest Image data and a second reference level on the black level side of the first reference level are compared, and the image data of interest and the image data in a predetermined range around the image data of interest are compared with the second reference level. Second determination means for determining the image data of interest as a second image when the image data is on the black level side of the reference level, and the image data of interest determined as the first image by the first determination means and the image data of interest. By comparing the image data of a predetermined range around the image data of interest and the halftone dot pattern of the predetermined range,
When the two coincide with each other, a third determination unit that determines the image data of interest as a third image, a halftone recording unit that performs recording by area gradation expression, and a recording that has a higher resolution than the halftone recording unit And a character recording means for selecting the character recording means for the first image,
By selecting a halftone-processed signal including selection means for selecting the halftone recording means for the second image and the third image, halftone density is reproduced in the recorded image, and a simple 2 If you select the binarized signal, the density of the recorded image is 2
If the signal becomes a value and has a predetermined level, each pixel of the recorded image becomes a recorded pixel or a non-recorded pixel regardless of the original image.

Therefore, for example, in the first operation mode, when the area determination unit selects the halftone processed signal when determining the halftone area and selects the simple binarized signal when determining the binary area. By specifying this operation mode, even if a halftone density image such as a photograph and a binary density image such as a character are mixed in one document, the type of the image being processed (intermediate Since the content of the signal processing is automatically switched according to (tone / binary), a desirable copy can be obtained for both the halftone density image and the binary density image.

Further, for example, in the second operation mode, when the area determination unit selects a signal of a predetermined level when determining in the halftone area and when selecting a signal subjected to simple binarization processing when determining in the binary area, By specifying this operation mode, the halftone area on the original is erased and does not appear on the copy. That is, when the original includes a halftone area such as a photograph and a binary area such as a character, the photograph is erased on the copy in this mode.

Further, according to the present invention, since the area judging means is provided with two judging means for processing the signals binarized at mutually different threshold levels, presence or absence of halftone information for various kinds of original images. Is reliable and highly reliable.

In a preferred embodiment of the present invention, the first threshold level is a fixed reference level of the binarization processing means and the second threshold level is lower in density than the first threshold level. The second determining unit determines the pixel in the halftone region when the pixels indicating the black corresponding level of the original image appear in a predetermined number or more continuously in the main scanning direction and the sub scanning direction of the image reading unit.

According to this, all pattern areas having a size equal to or larger than the predetermined size are regarded as halftone images. Therefore, for example, if the characters on the original are painted with a felt-tip pen or the like, the entire painted area is regarded as the halftone area, so in the operation mode to erase the halftone image, any character on the original can be erased cleanly. it can. Also, if there is a character written in a thick line with relatively high density, only the outline part of the line is regarded as the binary image area, and the area inside it is regarded as the halftone image area. In the operation mode in which the area is erased, only the outline remains and the inside thereof is not recorded, so that an outline character pattern is obtained.
If the density of the portion regarded as the binary image area is low, the binary recording signal indicating recording / non-recording, which is obtained by reading the image in that area, is not recorded. Has no outline.

Further, in a preferred embodiment of the present invention, the first determining means processes the original reading signal to determine whether or not a halftone dot is included, and when the halftone dot is detected, the image thereof is detected. Is determined as a halftone image. According to this, since the halftone image is subjected to the halftone processing, the occurrence of moire is suppressed and the copy quality is improved.

Other objects and features of the present invention will become apparent from the following description of embodiments with reference to the drawings.

Embodiments Embodiments of the present invention will be described below with reference to the drawings.

FIG. 2 shows one type of digital copying machine embodying the present invention. This copying machine is roughly divided into a scanner 1 on the upper side of the apparatus and a printer 2 on the lower side of the apparatus.

Reference numeral 26 is a contact glass on which the original is placed. The scanner 1 scans and reads an image of a document placed on the contact glass 26. The sub-scanning is mechanical, and the carriage provided in the scanner moves right and left in FIG. 2 by driving the electric motor MT. The reflected light from the original is
An image is formed on the fixed image reading sensor 10 via various mirrors and lenses. The image reading sensor 10 is a CCD line sensor, and in FIG. 2, a large number of reading cells are arranged in a direction perpendicular to the paper surface. In this example, when the copy magnification is 1.0, the resolution is 16 pixels per 1 mm of the original image. The main scan is the CCD inside the image reading sensor 10.
It is performed electrically by the shift register. The main scanning direction is the direction in which the read cells are arranged, that is, the direction perpendicular to the paper surface in FIG.

A signal obtained by reading the original image with the scanner 1 is subjected to various processes as described later, and then sent to the printer 2. The printer 2 performs binary recording according to the signal.

The printer 2 includes a laser writing unit 25 and a photosensitive drum.
3, a charging charger 24, a developing device 12, a transfer charger 14, a separation charger 15, a fixing device 23 and the like are provided. The printer 2 has no particular difference from a general laser printer known in the related art, so only the operation will be briefly described.

The photosensitive drum 3 rotates clockwise in FIG. Then, the surface thereof is uniformly charged to a high potential by the bias of the charging charger 24. The charged surface is irradiated with laser light modulated by a binary signal corresponding to an image to be recorded. The laser beam repeatedly scans the photosensitive drum 3 in the main scanning direction by mechanical scanning. The potential of the charged surface of the photoconductor drum 3 changes when it is irradiated with laser light. Therefore, a change in the laser beam, that is, a potential distribution according to the image to be recorded is generated on the surface of the photosensitive drum 3. This potential distribution is the electrostatic latent image. When the portion on which the electrostatic latent image is formed passes through the developing device 12, toner adheres according to the potential and the electrostatic latent image is developed into a toner image, that is, a visible image. This visible image is superposed on the transfer paper fed from the paper feed cassette 4 or 5 to the photosensitive drum 3, and is transferred to the transfer paper by the bias of the transfer charger 14. The transfer paper on which the image is transferred passes through the fixing device 23 and is discharged to the paper discharge tray 22.

FIG. 1 shows the appearance of the operation panel of this digital copying machine. Referring to FIG. 1, this operation panel has a copy magnification key K5, a density key K6, an interrupt key K7, a ten key KT, a clear / stop key KC, a print start key KS, and a display similar to those of a general copying machine. Equipped with a DSP etc. And
In this example, in particular, a copy mode designation unit is provided.
The copy mode designating section is provided with four mode keys K1, K2, K3 and K4 and display lamps (light emitting diode indicators) L1, L2, L3 and L4 for displaying the current operation mode.

The mode key K1 is a key for specifying the character mode. If you choose the text mode, the image is processed completely binary. That is, in reading an original image, a portion having a density lower than a certain threshold density is regarded as a white (non-recording) pixel, and the other portion is regarded as a recording pixel. Each read pixel and recorded pixel have a one-to-one correspondence. Therefore, a high quality copy image can be obtained for an image having high resolution and no halftone density such as characters.

The mode key K2 is a key for selecting the photo mode. When the photographic mode is selected, the image is processed as including halftone information, and the density level information of the original image is also reflected on the copy image. However, in this example, since the printer 2 can perform only binary recording (recording / non-recording) in each recording pixel unit, a special halftone process is performed to convert a multi-level signal into a binary signal. As this kind of halftone processing,
Although the dither method, the density pattern method, the sub-matrix method and the like are known, in this example, halftone processing by the sub-matrix method is adopted.

In the photographic mode, a preferable copy image can be obtained for a multi-tone image such as a photograph, but the halftone processing reduces the resolution and is not suitable for reproducing a binary image such as characters. .

The mode key K3 is a key for selecting the automatic separation mode. In the automatic separation mode, it is automatically determined whether or not the original image includes halftone information based on the image signal read by the scanner 1, and the signal processing is binarized based on the determination result. To automatically perform halftone processing. When this mode is selected, for example, when a photograph containing halftone information and a character that does not contain halftone information are mixed in one document, the process is switched during reading, and halftone information is applied to the photograph. Performs processing, and performs binary processing on characters. Therefore, the photograph is reproduced on the copy in a form including halftone information, and the characters are recorded with high resolution.

The mode key K4 is a key for selecting the magic erase mode. In the magic erase mode, when the original image has a thick line or the like, a copy image in which the inside of the line is erased while leaving only the peripheral portion of the line is obtained. Further, if there is a pattern filled with a thin felt-tip pen or the like, a copy image in which the pattern is erased can be obtained. Detailed operation will be described later.

FIG. 3 shows the configuration of the electric circuit of the digital copying machine shown in FIG. Referring to FIG. 3, the scanner 1 includes an image reading sensor 10, a scan control unit 20, an amplifier 30, an A / D (analog / digital) converter 40, a halftone processing unit 50, a binarization processing unit 60, An area determination unit 70, an operation control unit 80, an output control unit 90, a motor driver MD, etc. are provided.

The scanning control unit 20 exchanges signals with the printer 2, performs main scanning control, sub-scanning control, and generates various timing signals. Various timing signals are generated so as to be synchronized with scanning timing. Key reading control and display control other than the copy mode designation on the operation panel shown in FIG. 1 are performed on the printer 2 side. Various status signals, print start signals, copy magnification signals, etc. are sent from the printer 2 to the scan controller 20. The scan controller 20 sends a scan synchronization signal, a status signal, etc. to the printer 2. By driving the motor MT, the scanner mechanically scans and performs sub-scanning.

The image reading sensor 10 is similar to a general CCD line sensor,
It is equipped with a large number of read cells, CCD shift registers, etc.
When the scanning control unit 20 outputs the sub-scanning synchronization signal, the signals accumulated in many reading cells of the image reading sensor 10 are transferred to each bit of the CCD shift register at once. After that, the signal of the CCD shift register is shifted in synchronization with the main scanning pulse signal, and the image signal held in the register appears as a serial signal for each pixel at its output terminal (a in FIG. 3). : Hereinafter, signals generated from image signals are shown in parentheses).

The amplifier 30 performs amplification of the image signal (a), noise removal, and the like. The A / D converter 40 converts an analog image signal into a 6-bit digital signal. Although not shown in the drawing, the digital signal obtained by the A / D converter 40 is subjected to various types of conventionally known image processing such as shading correction, background removal, and black and white conversion. Bit or 64
It is output as a gradation digital image signal (b).

This digital image signal (b) is output to the halftone processing units 50 and 2.
It is applied to the digitization processing unit 60.

The halftone processing unit 50 is a 6-bit digital image signal (b).
Is a circuit for converting into a binary signal (d) containing halftone information by the sub-matrix method. A circuit for performing halftone processing by the sub-matrix method is well known, and since no special circuit is used in this embodiment, a specific configuration and operation will be omitted. In addition to the sub-matrix method,
You may perform halftone processing by area gradation expression, such as a dither method and a density pattern method.

In the binarization processing unit 60, the input 6-bit digital image signal (b) is subjected to MTF correction, the correction result is compared with a predetermined fixed threshold level TH1, and the binary value corresponding to the magnitude of these values is used. The signal (e) is output. Therefore, the processing performed here is a simple binarization processing, and the signal (e) does not include the halftone density information of the original image.

Further, the binarization processing unit 60 outputs the 6-bit digital image signal (C1) and the 1-bit binary image signal (C2) to the area determination unit 70. The image signal (C1) is an MTF-corrected signal and is not significantly different from the image signal (b) applied to the binarization processing unit 60. The signal (C2) is the same as the binary image signal (e) output from the binarization processing unit 60, except that the signal timing is different.

As will be described later, the area determination unit 70 is a circuit that determines whether or not the original image includes halftone information, and outputs a binary signal (f) corresponding to the determination result to the output control unit 90.

The operation control unit 80 gives the output control unit 90 a mode signal (g: more specifically, g1, g2, g3, and g4) according to the operation of the mode keys K1 to K4. Further, the energization of the display lamps L1 to L4 is controlled according to the mode signal.

The output control unit 90 has a mode signal (g) given from the operation control unit 80 and a binary signal (f) given from the area determination unit 70.
In accordance with, the binary image signal (d) output by the halftone processing unit 50, the binary image signal (e) output by the binarization processing unit 60, or a signal (white level) of a predetermined level is selectively selected. Output to. This signal (h) is given to the printer 2 as a recording signal. The printer 2 modulates the laser light according to this binary signal and records.

FIG. 4 shows the configuration of the area determination unit 70 shown in FIG. Referring to FIG. 4, the area determination unit 70 includes a first determination unit 71, a second determination unit 72, and an OR gate 73. The 6-bit image signal (C1) is applied to the first determination unit 71, and the second determination unit 72
A 1-bit binary image signal (C2) is applied to. The logical sum (f) of the signal (1) output by the first determination unit 71 and the signal (r) output by the second determination unit 72 is output to the output of the region determination unit 70.

The first determination unit 71 includes a binarization circuit 110, a Y delay circuit 120, an X delay circuit 130, and a logical product circuit 140.

In this specification, the symbol x or X is used to indicate the main scanning direction of the scanner, and y is used to indicate the sub scanning direction.
Alternatively, the symbol Y is used. Also, the binary image signal "1"
Corresponds to the black pixel level, and “0” corresponds to the white pixel level.

Details of the configuration of the first determination unit 71 are shown in FIG. 5, and examples of signal waveforms and timings of the respective units are shown in FIGS. 6a and 6b.

Details of the first determination unit will be described with reference to FIG. The binarization circuit 110 includes a digital comparator 111, a pull-up circuit 112 and a switch circuit 113. Digital comparator 111
Compares the value of the digital signal applied to the 6-bit input terminal A with the value of the digital signal applied to the other 6-bit input terminal B, and outputs the comparison result.

That is, if A ≧ B, the signal (j) becomes “1” (corresponding to the high level H: the same below), and if not, the signal (j) becomes “0” (corresponding to the low level L: the same below). Become.

Each switch of the switch circuit 113 is set so that the value of the input terminal B of the comparator 111 becomes a predetermined threshold value TH2.
This threshold TH2 can be changed, but normally it is 6b.
As shown in the figure, the density is set to a fairly low level. Threshold TH used by the binarization processing unit 60
In this example, 1 is set to the central level (32) of the density gradation.

In other words, the binarization circuit 110 determines the black level even for a pixel whose density is considerably lower than the normal black pixel determination level.

The Y delay circuit 120 outputs the signal (j) output from the binarization circuit 110.
Is a circuit for delaying the signal timing by a predetermined pixel in the y direction, that is, the sub-scanning direction, and outputs seven signals jn and k. In FIG. 5, the signal jn represents a signal obtained by delaying the signal j by n pixels in the y direction. The signal k is the same as the signal j3 with respect to the delay amount. By delaying the signal on a pixel-by-pixel basis in the y direction, the signals of a plurality of pixels adjacent to each other in the y direction can be taken out as parallel signals. That is, this circuit can be regarded as a serial-parallel conversion circuit.

FIG. 6a shows the operation timing of the Y delay circuit 120. Sixth
The operation will be described with reference to FIG. The input signal (j) is
It is latched in the latch 121 by the clock pulse t2 output at the timing of each pixel in the x direction. That is, latch 1
The signal (j) applied to the input terminal D1 of 21 is its output terminal
Appears in Q1 and holds that state. Clock pulse t3
Thus, the states of the output terminals Q1 to Q6 of the latch 121 are determined by the RAM (read / write memory) 123 at the timing of each pixel in the x direction.
Are stored in each bit of.

The memory address to be stored is specified by the address signal t1. The content of the address signal t1 is updated for each pixel in the x direction, and the same content (value) is set for the pixels at the same position in the x direction. That is, the signal t1 is
It corresponds to the pixel position in the x scanning direction. In this example,
Since the number of pixels in the x direction is 4096, the signal t1 is a 12-bit parallel signal.

The stored contents of the RAM 123 are read out for each pixel in the x scanning direction by the clock pulse t3. The data to be read is the data previously stored at the position in the x direction at that time.
Here, focusing on the connection between the data lines D1 to D6 of the RAM 123 and the latch 121, bits 1, 2, 3 of the data line of the RAM 123,
4, 5 and 6 are bit 2 of the input terminal of the latch 121,
It is connected to 3,4,5,6 and 7 in a state of shifting by 1 bit.

Therefore, the signal (j) input at a certain timing is latched in the bit 1 of the latch 121 and stored in the bit 1 of the RAM 123 before the data of the next pixel is set in the latch 121. Then, at a timing delayed by one pixel in the y direction,
It is read from bit 1 of RAM 123 and applied to the input terminal D2 of bit 2 of the latch 121. This signal is latched at the timing of latching the pixel signal, which appears at the x position of the latch 121 by one pixel in the y direction, in the bit 1 of the latch 121.
Latched to bit 2 of 21.

After that, by repeating this operation, the signal becomes latch 12
Bits 3, 4, 5, 6 and 7 of 1 are sequentially transferred each time the timing advances by one pixel in the y direction. That is, when the signal is latched in the bit 7 of the latch 121, the bits 6, 5, 4, 3, 2, and 1 of the latch 121 are 1, 2, 3 in the y direction than the signal of the bit 7, respectively. There are signals delayed by 4, 5, and 6 pixels. As a result, the output terminals Q1 to Q7 of the latch 121 are
Are adjacent to each other in the y direction at a predetermined x position.
The signals of the two pixels are obtained at the same timing.

The latch 122 is for adjusting the timing of sending a signal to a circuit connected to the output of the Y delay circuit 120. Therefore, the signals j0 to j6 are almost the same as the signal output by the latch 121.

In addition, in FIG. 6a, symbols j1, j2, ... B1, B2, B3 ...
Note that the signals indicated by A1, A2, A3, ... Represent the change of each signal in the x direction for each pixel, and are different from the signal output by the latch 122.

The signal k output from the Y delay circuit 120 is applied to the X delay circuit 130. The X delay circuit 130, as shown in FIG.
It consists of two shift registers. The signal (k) is
It is applied to the serial data input terminal of the shift register. Parallel data output terminals Q1 ~
Signals (k1, k2, k3, k4, k5, k6 and k7) are output from Q7. The shift register (130) shifts the data by one bit each time the clock pulse t4 output every time the scanning position in the x direction changes in pixel units. For example, the signal k applied to this shift register at a certain timing appears at bit 1 of the output terminal at the next pixel timing (x direction) (k1), and bits 2, 3, 4, 5 are changed every time the pixel timing changes. , 6 and 7 are sequentially transferred.

That is, for example, when the signal of the pixel located at N in the pixel coordinate in the x direction appears as the signal (k7), each signal (k
6, k5, k4, k3, k2, k1) have the same pixel positions in the y direction as (k7) and in the x direction respectively N + 1, N + 2, N + 3, N.
+4, N + 5 and N + 6. That is, the signal (k1 to k7)
Are signals of seven pixels located at pixel positions adjacent to each other in the x direction, which are obtained at the same timing.
Therefore, the X delay circuit 130 can also be regarded as a serial-parallel conversion circuit for serial pixel signals.

Signals output from the Y delay circuit 120 (j0 to j6 and k1 to k
7) is applied to the AND circuit 140. And gate 141
Outputs 1 when the signals (j0 to j6) are all 1, and outputs 0 otherwise. Therefore, the signal (j10) output from the AND gate 141 has the same position in the x direction,
Seven pixels adjacent to each other in the y direction have a value of 1 when they are all at the black level (relative to TH2). This signal is a shift register
The signal is delayed by a predetermined pixel (i pixel) in the x direction by 143 and is applied to the AND gate 144 as a signal (j11).

AND gate 142 is set to 1 when the signals (k1 to k7) are all 1
Is output, and 0 is output otherwise. Therefore, the signal (k10) output from the AND gate 142 becomes 1 when the position in the y direction is the same and seven pixels adjacent in the x direction are all at the black level (relative to TH2). AND gate 1
44 outputs a logical product of the signal (J11) and the signal (k10), that is, the signal (1).

That is, with respect to the pixel of interest at that time, the first determination unit 71 has halftone information (l) when all 7 pixels in the x direction and 7 pixels around the pixel of interest are at the black level (relative to TH2). Is determined in 1). By providing the shift register 143,
The reason why the signal (j11) is shifted in the x direction with respect to the signal (j10) is to adjust the timing of 7 pixels in the x direction and 7 pixels in the y direction.

That is, since the signals (j0 to j6) are at the same position as the signal (k) in the x direction, in order to obtain the signal (j11) at the x position corresponding to the signal (k4) corresponding to the central pixel in the x direction. Then, only i pixels (4 pixels in this example) in the x direction have a signal (j1
0) is shifting. That is, when considering a minute pattern, since many of them are generally circular, it is preferable to arrange the target pixel at the center pixel of the pixel group forming the “+” pattern.

Please refer to FIG. 6b. In this figure, only the x direction is shown for easy understanding. Since the digital image signal (C1) is 6 bits, it contains 64 levels of density gradation information. In this example, each part (C11, C12) of the signal (C1) shown in the figure represents a signal obtained by reading a halftone image like a photograph, and (C13) reads a background (that is, white) image. Shows the signal obtained, (C14) shows the signal obtained by reading a character written in a relatively thick line (that is, binary density pixels), (C15) shows a character written in a relatively thin line Shows the signal obtained by reading, and (C16, C17) shows the signal obtained by reading the stain on the document.

In the binarizing circuit 110, the low density level TH2 is set to the threshold level to binarize the signal, so that the image signal (j) obtained has a very low image density. Even in this case, the portion where the image exists corresponds to all black pixels. On the other hand, in the signal (e) output from the binarization processing unit 60 in which the intermediate level 32 is set as the threshold value, in the halftone image, a portion with low density corresponds to a white pixel and Only the dark areas correspond to black pixels.

The signal (k10) becomes 1 only when the black of the image signal appears continuously in 7 pixels in the x direction, that is, when the pattern has a size larger than a predetermined value.
The signal (k10) becomes 1 for (2, C14), but becomes 0 for the other parts (C13, C15, C16, C17). Normally, a signal (d) that has been subjected to halftone processing according to this signal (k10)
And the binarized signal (e) is selected.
The signal A, B and C of the signal (h) shown in FIG. 6b corresponds to the halftone processed signal (d), and the other parts D, E and F are binarized (e). Corresponding to. Where C, D
Although E and E are portions of the same character, D and E (6 pixels in the x direction) corresponding to the contour portion do not reach the 7 pixels which is the determination condition of the halftone information, and thus are binarized. It Since each part (C16, C17) of the image signal (C1) is binarized with respect to the threshold level TH1, the stain on the document is not output as a copy image.

The second determination unit 72 will be described with reference to FIG. This second
The determination unit 72 is simply a circuit that determines the presence or absence of a halftone dot pattern. The signal C2 processed by this circuit is the signal C1.
Is a simple binarization of the fixed threshold level TH1.
It can be considered that it is the same as the signal (e) output by 60.

The second determination unit 72 includes an XY delay circuit 150, a mesh detection circuit 160,
It comprises a first area detection circuit 170, a second area detection circuit 180 and a third area detection circuit 190. The XY delay circuit 150 processes the signal (C2) and outputs the signal (mij), the mesh detection circuit 160 processes the signal (mij) and outputs the signal (n), and the first area detection circuit 170 outputs the signal. (N) is processed to output the signal (p), the second area detection circuit 180 processes the signal (p) and outputs the signal (q), and the third area detection circuit 190 outputs the signal (q). Process and output signal (r).

FIG. 7a shows the configuration of the XY delay circuit 150. Referring to FIG. 7a, this circuit comprises a Y delay circuit 151 and an X delay circuit. The structure of the Y delay circuit 151 is the same as that of the Y delay circuit 120 shown in FIG. However, since the signal corresponding to the signal (k) is unnecessary, only the seven outputs of the latch 122 are used as the output terminals. That is, the Y delay circuit 12
The signals (m11 to m17) output from 0 correspond to seven pixels that have the same x direction and are adjacent to each other in the y direction.

The delay circuit consists of six 7-bit latches 152,153,154,155,
It consists of 156 and 157. The latch 152 latches the signals (m11 to m17) output from the Y delay circuit, and latches 153, 154, 15
5,156 and 157 are latches 152,153,154,155 and 1 respectively.
Signals output by 56 (m21 to m27), (m31 to m37), (m41
~ M47), (m51 to m57) and (m61 to m67) are latched in synchronization with the clock pulse t4. Therefore, each signal (m21, m3
1, m41, m51, m61 and m71) are the signals (m11) x
The signal is delayed by 1, 2, 3, 4, 5 and 6 pixels in the direction.

That is, the XY delay circuit 150 outputs all the signals mij of each pixel of a 7 × 7 pixel matrix which is adjacent to each other and is formed of 7 pixels in the x direction and 7 pixels in the y direction at the same timing.

FIG. 7b shows a specific configuration of the mesh detection circuit 160. Referring to FIG. 7b, this mesh detection circuit 160
Is the first mesh detection circuit MS1 and the second mesh detection circuit MS
2, 3rd mesh detection circuit MS3, 4th mesh detection circuit MS4
And a data selector 168. The signal mij output by the XY delay circuit 150 is applied to each of the mesh detection circuits MS1 to MS4.

The fourth mesh detection circuit MS4, as shown in FIG.
61, 162, 163, 164, 165, 166 and 167. In addition,
In the figure, mij indicated by a symbol with an overline indicates a signal obtained by inverting the logic of the signal indicated by a symbol without the overline. Therefore, although not shown, the XY delay circuit 150
A large number of inverters are inserted between the output terminals of the above and the input terminals of the mesh detection circuit 160. For convenience,
In this specification, underlines are used instead of overlines.

Signals m44, m24 , m33 , m are connected to the nine input terminals of the gate 161.
35 , m42 , m46 , m53 , m55 and m64 are applied, and gate 162
Signals m44 , m24, m33, m35, m42, m46, m5 are input to the nine input terminals of
3, m55 and m64 are applied to the 17 input terminal of the gate 163, signal m44, m13, m14, m15, m22, m26, m31, m37, m
41 , m47 , m51 , m57 , m62 , m66 , m73 , m74 and m75 are applied, and the signals m44 , m13, m are applied to 17 input terminals of the gate 166.
14, m15, m22, m26, m31, m37, m41, m47, m51, m57, m62, m66, m7
3, m74 and m75 are applied.

Before describing the operation of the mesh detection circuit 160, consider halftone printing. Fig. 8 shows three types of density (reflectance of 10%, 30% and 50) printed with halftone dots at the same halftone pitch.
A part of the image of (%) is enlarged and shown so that halftone dots can be easily identified. The hatched portion is the printed (black) portion, and the other portions are the background (white). Although not shown, when the densities are 70% and 90%, the states are such that the densities are 10% and 30%, respectively, and black / white are reversed.

It can be seen from FIG. 8 that when the density is 50%, there is a portion where adjacent dots are in contact with each other and a portion where they are separated from each other. Further, in reality, the inclination between the arrangement direction of halftone dots and the scanning direction x, y of the scanner is not constant due to the relationship between the inclination of the scanner and the original when reading the original. In addition, the diameter of the recording dot also changes.

The presence of such halftone dots needs to be determined by the second determination unit 72.

Referring to FIG. 8, in any case, it can be seen that in the halftone-printed original image, there are black dots (dots) on a white background or white dots (dots) on a black background. Therefore, the mesh detection circuit 160 detects, for each target pixel, whether or not it corresponds to these dots.

In the fourth mesh detection circuit MS4, 7 × 7 shown in FIG.
The central pixel of the pixel matrix, that is, the target pixel M44 (signal m44
The pixel corresponding to the target pixel M44 is a black dot (there is a black pixel in the white pixel group) and a white dot (the black pixel group). (There is a white pixel inside). That is, the gate 161 outputs 0 if the target pixel M44 is 1 (black pixel) and all the pixels indicated by the symbol ◯ are 0 (white pixel), that is, a signal indicating that there is a black dot is output. If all the pixels indicated by the symbol ◯ are 0, that is, a signal indicating that there is a white dot is output. If the target pixel M44 is 1 and all the pixels indicated by the symbol Δ are 0, 0, that is, a signal indicating that there is a black dot. The gate 166 outputs 0 if the target pixel M44 is 0 and all the pixels indicated by the symbol Δ are 1, that is, a signal indicating that there is a white dot.

When any one of the gates 161, 162, 163 and 166 outputs a signal indicating that there is a black dot or a white dot, 1 is the signal indicating that there is a dot, otherwise it is 0, that is, a signal indicating that there is no dot is the fourth mesh detection circuit. It is output as n4 from MS4.

Here, with respect to the target pixel M44, the two types of array patterns of the pixel group at the position of the symbol ◯ and the pixel group at the position of the symbol Δ are referred to because there is a change in the halftone dot pitch and the dot diameter. This is also for the purpose of increasing the detection accuracy.

The first mesh detection circuit MS1, the second mesh detection circuit MS2, and the third mesh detection circuit MS3 are the fourth mesh detection circuit M.
It has the same configuration as S4. However, the signals mij and mij respectively applied to the input terminals are different from MS4.
That is, the mesh detection circuits MS1 to MS4 have different pixel positions used for the dot presence / absence determination. This change in condition is set in advance for each copy magnification, in particular considering the change in dot diameter due to the change in copy magnification.

Referring to FIG. 7b, the selection terminal S of the data selector 168.
A signal line for the copy magnification is connected to. Therefore,
When the copy magnification changes, one of the signals n1, n2, n3 and n4 output by each mesh detection circuit MS1 to MS4 is selectively output from the data selector 168 as the signal n. That is, in this embodiment, the dot detection condition is automatically changed using the copy magnification as a parameter.

Fig. 10a shows an example of the positional relationship between dots and pixels when a halftone image is read. Each pixel signal in Fig. 10a is set to a threshold value TH1.
The array of signals binarized by is shown in FIG. 10b. In these drawings, the pixel pitch is 1/16 (mm / pixel) and the halftone dot pitch is 1/5 (mm / pixel). Also, the tenth
The values of the x and y coordinates in FIG. a and FIG. 10b correspond to each other.

In this example, looking at the pixel at coordinates (15,4), the pixel of interest is 1, and the nine pixels indicated by the symbol ◯ in FIG. 9 are all 0. It is judged to be present.

Basically, as described above, in the output of the mesh detection circuit 160,
Although the signal n indicating the presence or absence of the halftone dot is obtained, the positional relationship between the pixel and the halftone dot changes variously, and therefore the processing described later is further performed.

FIG. 7c shows a specific configuration of the first area detection circuit 170. The first area detection circuit 170 is simply called the first area detection circuit 170.
X direction w pixels (eg 8 pixels) and y as shown in FIG.
Assuming a predetermined pixel matrix composed of w pixels in the direction (this is referred to as a first area), it is determined whether or not one or more dots are present in this first area. The signal p becomes 1 when the dot exists and 0 when the dot does not exist.

Referring to FIG. 7c, this circuit 170 includes a read-only memory ROM1, counters CN1, CN2, flip-flops FF1, FF2,
It comprises a read / write memory RAM1, gates G1, G2, G3, G4, G5, G6, and inverters IV1 and IV2.

The timing of operation of the circuit of Figure 7c is shown in Figure 12a. The counter CN1 counts the clock pulse t4 and counts up for each pixel in the x direction. When the count value becomes 15, the carry terminal CY becomes high level H. Since a signal obtained by inverting this signal is applied to the preset terminal LD, the data at the input terminals D1 to D4 is set in the counter when the next clock pulse appears. In FIG. 12a, the preset data is 8.

Therefore, the counter CN1 operates as an N-ary counter that counts up each time the clock pulse t4 appears.
The value of N depends on the value applied to the data input terminals D1 to D4.
It can be set arbitrarily within the range of 1-16. In the signal line Qx,
For every Nth clock pulse t4, a signal that goes to the low level L appears for one cycle.

On the other hand, the signal n output for each pixel in the x direction is applied to the flip-flop FF1 via the OR gate G1 and latched in FF1 in synchronization with t4. Signal line Qx is high level H
Then, the signal latched by the flip-flop FF1 is applied from its output terminal Q to one input terminal of the OR gate G1 via the AND gate G2.

Therefore, when the signal n becomes 1, the flip-flop
The output terminal Q of FF1 maintains the 1 (H) state until the signal line Qx becomes the low level L. That is, counter CN1
Is set in the octal counter, the signal n for the first pixel appears as the signal O1 in the Q of FF1 as shown in FIG. 12a, and then the logic of the signal O1 and the next signal n. The sum appears as the signal O2 at Q of FF1, and when the signal line Qx becomes low level by the same repetition, x
The result of calculating the logical sum of all signals n of eight pixels continuous in the direction, that is, signal O7 is obtained at Q of FF1.

When the next clock pulse t4 arrives while the signal O7 is appearing, the signal is latched by the flip-flop FF2, and the latched signal is output as the signal p. The signal output by FF2 is stored in the read / write memory RAM1 in synchronization with the clock pulse t5. The signal t6 designating the address of the memory RAM1 is the x for every N pixels in the x direction.
The value is updated according to the direction position. The signal t6 has nothing to do with the pixel position in the y direction. Therefore, one line of data in the x direction is stored in the memory RAM1.

Also, at the timing of clock pulse t41, the memory RAM
The data stored in the previous line (the position where the relative coordinate in the x direction is -1) is read out to 1 and applied to one input terminal of the OR gate G4 via the AND gate G5.

On the other hand, the counter CN2 operates as an N-ary counter that counts up each time the clock pulse t7 appears. The clock pulse t7 is a sub-scanning synchronization pulse output each time the pixel position in the y direction changes. Other actions are counter
Same as for CN1.

Therefore, the signal line Qy is normally at the high level H and goes to the low level L once every N pixels in the y direction.
While the signal line Qy is high level, the flip-flop FF2
If the high level H is applied to the data terminal D of
Since the FF1 and the memory RAM1 hold the logical sum of this and the input signal, the signal p becomes the high level H.

That is, when the signal line Qy becomes the low level L, FF1 is applied to the area (N line) for N pixels continuous in the y direction.
The result of calculating the logical sum of all the signals (for example, O7) output by is output as the signal p. That is, a predetermined pixel matrix having an N × N (for example, 8 × 8) array,
That is, for each of the first areas, if at least one pixel has a signal n of 1, the signal p becomes 1,
At other times, p becomes 0. This signal p indicates the presence / absence of dots in the first area detection circuit, that is, the presence / absence of dots.

On the other hand, the data terminals D1 to D4 of the counter CN1 are connected to the data terminals D5 to D8 of the read-only memory ROM1 and the counter CN1
Data terminals D1 to D4 of 2 are data terminals D1 to D4 of memory ROM1.
It is connected to the. A copy magnification signal is applied to the address terminal of the memory ROM1. The read-only memory ROM1 stores in advance information about the size of the first area associated with each copy magnification.

For example, in this example, when the copy magnification is 1.0, the size of the first area is set to 8 × 8 pixels, so 8 is output to the 4-bit output terminals D1 to D4 of the first group of ROM1 and the second group is output. 8 is also output to the 4-bit output terminals D5 to D8.
In this case, the counters CN1 and CN2 are set to 8 during presetting and count as 8,9,10,11,12,13,14,15,8,9,10 ... Operate. When the copy magnifications are different, the count ranges of the counters CN1 and CN2 are changed, which changes the size of the first area (the number of pixels).

FIG. 7d shows the configurations of the second area detection circuit 180 and the third area detection circuit 190. First, the second area detection circuit 180 will be described.

Roughly speaking, in the second area detection circuit 180, as shown in FIG. 11, two first areas continuous with each other in the x direction and two first areas continuous with each other in the y direction are provided. Become. Assuming a second area composed of four first areas, it is determined whether or not there are three or more first areas in which dots have been detected (signal p is 1) in this second area. If there are three or more dot-detected first areas, it indicates that the signal q is set to 1 for a predetermined first area in the second area, and a halftone dot is detected.

The reason why such second area detection processing is performed is to prevent the following erroneous detection. That is, if there is a dot loss due to the document side due to a printing error or the like or a dot detection error due to the copying machine side due to a reading error or the like, at the stage of the signal p, the halftone dot area is actually shaded. It may be judged without a point. In the case of not a halftone image, at the stage of the signal p, for example, a part of a character or dirt on the background may be detected as one dot, and it may be erroneously determined as a halftone area.

The operation timing of the second area detection circuit 180 is shown in FIG. 12b. This will be described with reference to FIGS. 7d and 12b. Reference numeral 181 is a data selector, 182 and 183 are latches, and 184 is a read / write memory. The data selector 181, the latch 182, and the read / write memory 184 change the signal p output for each first area to the first
This is a circuit for delaying in the y direction by the pixel corresponding to the area, and the signals of the two first areas adjacent to each other in the y direction are obtained at the same timing at the output terminals Q1 and Q2 of the latch 182.

The latch 183 is a circuit that delays the signal output from the latch 182 by the pixel corresponding to the first area in the x direction. The latch 182 outputs the signals to the output terminals Q1 and Q2 of the latch 183 to Q1 and Q2 thereof. Signals for one first area,
A signal delayed in the x direction appears. Therefore, the latch 182
Output terminals Q1 and Q2 of the latch and output terminals Q1 and Q2 of the latch 183
In addition, the signals p for each of the four first areas included in the second area are obtained at the same timing.

That is, the signals p of the first areas E1, E2, E3 and E4 in FIG. 11 are obtained in 183-Q1, 182-Q1, 183-Q2 and 182-Q2, respectively. These four signals are the gates G11, G12, G13,
It is processed in G14 and G15 to generate a signal q. When three or more of the four signals are 1, the signal q becomes 1. For example, in FIG. 11, three or more p's among E1, E2, E3 and E4
Is 1, the signal q output to the first area E4
Becomes 1. In Fig. 12b, p0, p1, p3, p4, ...
.. indicates the signal p output for each first area, q0, q
1, ... Indicate the signal q output for each first area,
p0-1, p1-1, p2-1, ... are p0, p1, p2, ...
.. is delayed in the y direction by the number of pixels in one first area. For example, q1 is p1-1, p1, p2-1 and p1.
Determined by 4 signals of 2.

Next, the third area detection circuit 190 will be described. Roughly speaking, in the third area detection circuit 190, as shown in FIG. 11, four first areas connected in the x direction are assumed as third areas, and at least one of the third areas is a network. If there is a dot, the third area is determined as a halftone dot area, and the signal r is set to 1.

The reason why the third area detection process is performed is to prevent moire. That is, due to the scanning method and the structure, the risk of moire is predominantly higher in the main scanning direction than in the sub scanning direction. In the sub scanning direction, there is no moire or it is inconspicuous. In the main scanning direction, generally, when the reading resolution is 16 pixels / mm, moire with a pitch of about 1 to 3 mm occurs depending on the halftone dot pitch and the relative angle between the original and the scanning. If the amplitude of the read signal becomes small due to the moire, the accuracy of dot detection is reduced, and an error may occur in dot detection. Therefore, this third area detection process is unnecessary if there is no risk of moire.

In this embodiment, the number of pixels in the x direction in the third area is 32.
Since the reading resolution is 16 pixels / mm, the pitch of the third region is 2 mm.

Referring to FIG. 7d, the third area detection circuit 190 comprises a shift register 191 and an OR gate 192. The shift register 191 shifts the signal q for each number of pixels in the x direction in the first area in synchronization with the clock pulse t41.

When the signal q becomes 1 at least once among the four first areas continuous in the x direction, the signal r becomes 1 for all the first areas forming the third area including the first area. Set. That is, in FIG. 11, when the signal q becomes 1 in the first area E1 of the third areas, the signal r is also transmitted to the other first areas E2, E5, and E6 forming the third area. Becomes 1.

Next, the operation control unit 80 and the output control unit 90 shown in FIG. 3 will be described. FIG. 13 shows the configurations of the operation control unit 80 and the output control unit 90.

The operation control unit 80 includes mode keys K1, K2, K3, K4, and a signal processing circuit.
81, pull-up circuit (resistor) 82, display driver 83, display lamps L1, L2, L3 and L4. Signal processing circuit 81
Read the status of the mode keys K1 to K4, and
Output 2, g3 and g4. That is, when the mode key K1 is turned on, the respective mode signals g1, g2, g3 and g4 become 1, 0, 0 and 0 respectively, and when the mode key K2 is turned on, the respective mode signals
g1, g2, g3 and g4 become 0,1,0 and 0 respectively, and when the mode key K3 is turned on, each mode signal g1, g2, g3 and g4 becomes 0,0,1 and 0 respectively, When the key K4 is turned on, the mode signals g1, g2, g3 and g4 become 0, 0, 0 and 1, respectively. If none of the mode keys are pressed,
Each mode signal maintains its previous state. In the initial state, the mode signals g1, g2, g3 and g4 are 1, 0, 0 and 0, respectively.

The display driver 83 activates the display lamps L1, L2, L3 and L4 according to the state of the mode signal. That is, the mode signals g1, g
When 2, g3 and g4 are 1,0,0 and 0, respectively, the display lamp L1 is activated, and when 0,1,0 and 0, the display lamp L2 is
When 0, 0, 1 and 0, the display lamp L3 is activated, and when 0, 0, 0 and 1, the display lamp L4 is activated.

The mode signals g1, g2, g3 and g4 output by the operation control unit 80 are
It is applied to the output control unit 90.

Next, the output control unit 90 shown in FIG. 13 will be described. The output control unit 90 includes data selectors 91 and 92, OR gates 93 and 94.
It consists of

The data selectors 91 and 92 have an input terminal C0 when the selection control terminals A and B are 0,0, an input terminal C1 when they are 1,0, an input terminal C2 when they are 0,1, and 1 respectively. , 1 selects the input terminal C3 and outputs the signal applied to the selected input terminal to the output terminal Y. Input terminals C0, C1, C2 of data selector 91
Signals e, e, d and a fixed level L (0) are applied to C3 and C3, respectively. Input terminal of data selector 92
The signals e and d are applied to C1 and C2, respectively,
The signal selected by the data selector 91 is applied to the input terminals C0 and C3 of the data selector 92.

Therefore, the contents of the signal h output by the output control unit 90 are as shown in Table 1 below.

However, operation modes 1, 2, 3 and 4 are character mode (g1, g2, g3, g4 = 1,0,0,0) and photo mode (g1, g2, g3, g), respectively.
4 = 0,1,0,0), automatic separation mode (g1, g2, g3, g4 = 0,0,1,
0) and magic erase mode (g1, g2, g3, g4 = 0,0,0,
1).

In other words, if the character mode is specified by pressing the mode key K1, a signal (e) obtained by simply binarizing the image data with the fixed threshold TH1 regardless of whether the original image is halftone or not.
Is sent to the printer as image data, and the mode key K2
If is pressed to specify the photo mode, a binary signal (d) obtained by performing halftone processing on the image data by the sub-matrix method is sent to the printer as image data regardless of whether the original image is halftone.

When the automatic separation mode is designated by pressing the mode key K3, the image signal is selected according to the result of determination as to whether or not the original image includes halftone information, that is, the signal (f). The halftone processed signal (d) is selected and output to the printer, and for the binary image, the simple binarized signal (e) is selected and output to the printer. It should be noted that the halftone-printed image, even if it is a character or the like, is determined to have halftone information as described above and is halftone processed.

When the magic erase mode is designated by pressing the mode key K4, the signal is selected according to the result of determination as to whether or not the original image includes halftone information, that is, the signal (f). The white pixel level signal is selected and output to the printer, and if there is no halftone information, the simple binarized signal (e) is selected and output to the printer.

Here, the operation of the magic erase mode will be described in an easy-to-understand manner.

In the magic erase mode, in the area determined to have halftone information, all the pixels are replaced with a signal (low level L) corresponding to a white pixel and output to the printer. That is, all the images in the halftone area are erased. In the area determined to have no halftone information, a signal subjected to simple binarization processing is output to the printer.

In the actual copy operation, the following is realized in this magic erase mode. Where the
As shown in Figure 14a, the character string "A
Suppose there is an image that contains BC "," pqr "," XYZ "and the letter" R "written in thick lines as an original. For example, if you want to erase the portion of the letter" pqr ", You only have to fill the area with a relatively light density felt-tip pen, etc. The character string "pqr" is a binary image, but when you fill it, the space between the lines is colored and the entire area is It is regarded as one relatively large halftone area, which is judged by the first judging section 71 existing in the area judging section 70. That is, in this judging section 71, as described above, the size of a predetermined value or more ( If the density of the entire 7 × 7 pixel matrix) is equal to or higher than the threshold value TH2, that part is regarded as a halftone area.

In the area regarded as the halftone area, white pixels are recorded (non-recorded) regardless of the content of the original image (“pqr” character here) and its density. The mark filled with it is erased. In this case, the other "ABC" and "XYZ" characters are processed as a binary image and appear on the copy image (see Figure 14b).

On the other hand, with respect to the letter "R" written with a thick line, in the magic erase mode, the portion other than the contour portion is erased without special painting or the like. That is, since an area having a size equal to or larger than a predetermined size is determined to be a halftone area, a portion written with a thick line is regarded as a halftone area and erased as described above. However, regarding the outline portion of the thick line, that is, the portion having a width of up to 7 pixels in the x direction or the y direction from each pixel located at the outermost side of the line in the pixel group corresponding to the thick line, Judged as a binary area. The result of binarization processing with the threshold value TH1 is output as an image signal to the portion determined to be the binary region. This causes only the outline of the line to appear black on the copy (see Figure 14b). That is, in the magic erase mode, all the characters written with thick lines are converted into so-called blank characters (or patterns).

Even when the area is filled with a thin felt-tip pen or the like as described above, the contour portion of the area is processed as a binary area. However, when the density is lower than the threshold level TH1, the binarized result is a white pixel. That is, the outline can be erased by using a writing instrument having a low density for filling.

Further, for example, if there are characters or the like written from the beginning using a felt-tip pen or the like, they are all erased.

Here, the features of the blank copy obtained by this embodiment will be described. The white copy obtained by this embodiment is not limited to characters, but includes symbols, lines, figures, pictures, etc.
Any pattern can be processed as long as it has a thickness of a predetermined value or more. Further, in this embodiment, the outline portion left by the blank is recorded by the binarized image signal and the width thereof is constant, so that a sharp image is obtained without blurring.

Although a method for obtaining a blank copy of this kind has been proposed in the past, in that case, an optically or electrically, logically or individually, a blurred image and a sharp image are obtained, respectively. Since the result is obtained by the exclusive OR of the above, inconveniences such as blurring, rounded corners, thick image, and crushing of fine parts are unavoidable in the outline pattern.

In addition, the image signal is set to 2 by the two threshold levels of high and low.
A method of obtaining two kinds of binarized signals and obtaining a result by exclusive OR of them has also been proposed, but even in that case, there are inconveniences such as uneven line thicknesses and thick images. There is.

Furthermore, in the above two conventional methods, since the exclusive OR is used, a thin line or a character composed thereof,
Whitening processing is also performed on all figures and the like, and in the whitened image, the line becomes thicker than the original. That is, the conventional whitening process is close to the edging process.

On the other hand, in the above-described embodiment, the whitening process is performed only on the image having the thickness equal to or larger than the predetermined value, and thus the thin line portion which does not require the whitening process is recorded as the original. Further, since the outline portion of the original image remains as a blank copy, the size of the pattern does not change. Further, there is no phenomenon that the image is blurred or the corners of the pattern are rounded. Note that the line thickness of the pattern obtained by whitening can be arbitrarily changed by changing the configuration (the number of pixels) of the pixels processed by the first determination unit 71 in this embodiment.

A modified example of the mesh detection circuit and the first area detection circuit is shown in FIG. 15a, and the operation timing of the first area detection circuit 170B is shown in FIG. 15b. A description will be given with reference to each drawing. The mesh detection circuit 160B has the same configuration as the fourth mesh detection circuit MS4 shown in FIG. 7b.

In the first area detection circuit 170B, the circuit that generates the signal Qx is changed to the gate 171, and the circuit that generates the signal Qy is changed to the gate 172.
Has been changed to. The three input terminals of gate 171 have x
Lower 3 bits Qx0, Qx of the signal indicating the position of the pixel unit in the direction
1 and Qx2 are applied, and the lower 3 bits of the signal indicating the position of the pixel unit in the y direction are applied to the three input terminals of the gate 172.
Qy0, Qy1 and Qy2 are applied. Therefore, the signal Qx has a low level L at a rate of 1 pixel in 8 pixels continuous in the x direction, and has a high level H in other periods. Similarly, the signal
Qy has a low level L at a rate of 1 pixel out of every 8 pixels continuous in the y direction, and has a high level H during other periods.

Therefore, in this example, the detection condition of the mesh detection circuit is fixed, and the size of the first area is fixed to 8 × 8 pixels.

In the above embodiment, the operation mode is the mode key.
It is not changed unless the designation is changed by K1 to K4.For example, using the numeric keypad, etc., the mode can be arbitrarily programmed for each position to scan the document, and the control device scans the document while scanning it. The mode may be changed automatically for each position.

[Effect] As described above, according to the present invention, a character image is automatically discriminated as a first image, a photographic image is a second image, and a halftone image is a third image for each area on a document. Since the first, second and third judging means and the selecting means for selecting the character recording means for the character image and the halftone processing means for the photographic image and the halftone image are provided. It is possible to obtain a preferable copy even for a document in which each image is mixed.

[Brief description of drawings]

FIG. 1 is a plan view showing an operation panel of one type of copying machine embodying the present invention. FIG. 2 is a front view showing a mechanical portion of a copying machine including the operation panel of FIG. FIG. 3 is a block diagram showing an electric circuit of the copying machine shown in FIG. FIG. 4 is a block diagram showing the area determination unit in FIG. FIG. 5 is an electric circuit diagram showing the first determination unit 71 of FIG. 6a and 6b are timing charts showing the operation of the circuit of FIG. 7a, 7b, 7c, and 7d are electrical circuit diagrams showing the configuration of the second determination unit 72 shown in FIG. FIG. 8 is an enlarged plan view showing an image halftone-printed with three kinds of densities. FIG. 9 is a plan view showing an array of pixels used by the mesh detection circuit 160 to determine the presence / absence of dots. FIG. 10a is a plan view showing a part of a halftone dot printed image, FIG.
FIG. 0b is a plan view showing a binary signal obtained by reading the image of FIG. 10a. FIG. 11 shows the first area and the second area assumed by the first judging section 72.
It is a top view which shows the structure of an area and a 3rd area. 12a and 12b respectively show a first area detection circuit 17
6 is a timing chart showing the operation of 0 and the second area detection circuit 180. FIG. 13 is an electric circuit diagram showing the configurations of the operation control unit 80 and the output control unit 90. FIG. 14a is a plan view showing an example of an original image, and FIG. 14b is a plan view.
It is a top view which shows the copy image obtained from the original of FIG. FIG. 15a is a block diagram showing a modification of the mesh detection circuit and the first area detection circuit, and FIG. 15b is a timing chart showing the operation of the first area detection circuit of FIG. 15a. 1: Scanner, 2: Printer (recording means) 3: Photosensitive drum 10: Image reading sensor (image reading means) 40: A / D converter 50: Halftone processing section (halftone processing means) 60: Binarization Processing unit (binarization processing unit) 70: Region determination unit (region determination unit) 71: First determination unit, 72: Second determination unit 80: Operation control unit, 90: Output control unit (control unit) 110: Two Thresholding circuit, 120: Y delay circuit 130: X delay circuit, 140: AND circuit 150: XY delay circuit 160: Mesh detection circuit 170: First area detection circuit 180: Second area detection circuit 190: Third area detection Circuit K1, K2, K3, K4: Mode key (operation mode designating means)

Claims (1)

[Claims] 1. An original image is scanned and converted into image data,
In a digital copying apparatus that processes the image data one after another as target image data and records the image-processed image data, compares the target image data with a first reference level,
First determining means for determining the first image when the image data of interest is on the black level side of the first reference level; the image data of interest, and a predetermined range around the image data of interest Image data and a second reference level on the black level side of the first reference level are compared, and the image data of interest and the image data in a predetermined range around the image data of interest are compared with the second reference level. Second determination means for determining the image data of interest as a second image when the image data is on the black level side of the reference level, and the image data of interest determined as the first image by the first determination means and the image data of interest. By comparing the image data of a predetermined range around the image data of interest and the halftone dot pattern of the predetermined range,
When the two coincide with each other, a third determination unit that determines the image data of interest as a third image, a halftone recording unit that performs recording by area gradation expression, and a recording that has a higher resolution than the halftone recording unit And a character recording means for selecting the character recording means for the first image,
A digital copying apparatus comprising: a selection unit that selects the halftone recording unit for the second image and the third image.