JPH0685264A - Polycrystalline silicon thin film and transistor employing the thin film - Google Patents

Abstract

PURPOSE:To form a polycrystalline silicon thin film in which continuity of crystals can be maintained and an amorphous region is not formed on a glass substrate. CONSTITUTION:A cerium oxide film layer 2 is formed on a glass substrate 1 and a polycrystalline silicon thin film 3 is built up on it. The crystal growth of cerium oxide is easy and the lattice constant of the cerium oxide crystal is close to the lattice constant of silicon. Therefore, the polycrystalline silicon film 3 can be formed on the cerium oxide film layer 2 by hetero-epitaxial growth. As the polycrystalline silicon film 3 has good crystal continuity, if the polycrystalline silicon film 3 is applied to a transistor, the film thickness of the active region of the transistor can be reduced and the improvement of electrical characteristics such as reduction of a leakage current can be realized.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a polycrystalline silicon thin film and a transistor using the thin film.

[0002]

2. Description of the Related Art Polycrystalline silicon thin films have a thickness of several hundred Å to several tens μm
In the state where a large number of crystalline silicon of the above are gathered, the electron mobility is 1 to 2 orders of magnitude higher than that of amorphous silicon, and it is difficult to use crystalline silicon such as alumina and graphite. It is possible to form materials other than those described above on a substrate, and practical use of thin film transistors formed on a glass substrate is desired.

[0003]

By the way, when a polycrystalline silicon thin film is formed directly on a glass substrate, an uncrystallized amorphous region is formed at the interface between the substrate and polycrystalline silicon, and the crystal connectivity is lost. It was difficult to increase the grain size of polycrystalline silicon.

When an amorphous region is formed at the interface,
When the polycrystalline silicon is thinned, the proportion of the amorphous region increases, and good characteristics as polycrystalline silicon are not maintained, making it difficult to form a thin film. It is possible to eliminate the occurrence of such amorphous regions by increasing the process temperature and forming polycrystalline silicon by high-temperature treatment, but in that case heat-resistant glass must be used, and ordinary glass substrates should be used. Cannot be used.

The present invention is intended to solve the above problems, and provides a polycrystalline silicon thin film formed on a glass substrate in which crystal connectivity is maintained and an amorphous region does not occur, and a transistor using the thin film. The purpose is to

[0006]

According to the present invention, a cerium oxide film layer and a polycrystalline silicon thin film are sequentially laminated on a glass substrate, and a cerium oxide film on a glass substrate. A polycrystalline silicon thin film transistor in which a source electrode and a drain electrode are formed on a polycrystalline silicon thin film formed with a layer interposed, and a gate electrode is formed on the polycrystalline silicon thin film via a gate insulating film is characterized.

[0007]

In the present invention, a cerium oxide film layer is formed on a glass substrate, and a polycrystalline silicon thin film is grown on the cerium oxide film layer. Cerium oxide easily grows in crystals and has a crystal lattice constant of silicon. Is close to the lattice constant of
Silicon can be heteroepitaxially grown on the cerium oxide film layer to form a polycrystalline silicon film.
Since this polycrystalline silicon film has good crystal continuity, the active region can be thinned when applied to a transistor, and electrical characteristics such as reduction of leakage current can be improved.

[0008]

1 is a diagram showing the structure of a polycrystalline silicon thin film of the present invention. In the polycrystalline silicon thin film of the present invention, a cerium oxide (CeO ₂ ) film layer 2 is deposited on a glass substrate 1 which facilitates crystal growth and has a crystal lattice constant close to that of silicon. It is made to grow epitaxially. The CeO ₂ film layer 2 is formed in a volume of 20 Å to 1 μm, preferably 50 to 1000 Å by a vacuum deposition method or a sputtering method.

FIG. 2 shows an example of a vacuum vapor deposition method, in which a CeO ₂ raw material 24 is placed in a container 23 in a vacuum chamber 20 and heated by a heater 22, so that the CeO ₂ is heated on the glass substrate 1 by the heater 21. Are deposited. CeO ₂ is an ionic compound having a lattice constant close to that of silicon, and is extremely easily crystallized, so that a polycrystalline film can be easily formed. In this case, by selecting the deposition condition, for example, the temperature of the substrate or the like, substantially (111) or (00
1) A single orientation can be achieved in the direction.

For forming the polycrystalline silicon layer on the glass substrate on which the CeO ₂ crystalline film is formed, for example, a solid phase growth method can be used. FIG. 3 illustrates a plasma CVD method used in combination with the solid phase growth method. In the figure, 11 is a vacuum chamber, 12 is an electrode, 13 is an electrode and a heater, 15 is a high frequency power supply, 16 is a silane gas, and 17 is a pump.

The silane (SiH ₄ ) gas 16 is introduced into the vacuum chamber 11 evacuated by the pump 17, and the high frequency power source 1
5 causes a plasma discharge between the electrodes 12 and 13,
An amorphous silicon layer is laminated on the substrate 1 heated by the heater 13 by decomposing silane gas to a thickness of about 500 to 20000Å. This plasma CVD is performed at 200 to 300 ° C. When the glass substrate on which the amorphous silicon layer is thus formed is left in a furnace at about 580 ° C. for about 10 hours, the amorphous silicon is crystallized into a polycrystalline silicon layer, and a polycrystalline silicon film having high crystallinity can be obtained. As described above, since the lattice constant of CeO ₂ is close to the lattice constant of silicon, lattice defects and the like do not occur in the formed polycrystalline silicon film.

The polycrystalline silicon film can be formed not only by the solid phase growth method but also by the MBE method in a low temperature process and can be formed on an ordinary glass substrate.
In addition, when the underlying CeO ₂ film is preferentially oriented in a certain direction, the epitaxially grown polycrystalline silicon also has the same orientation, so that the electrical characteristics can be improved, and particularly the (001) orientation is adopted. In this case, a large ON current / OFF current ratio (ratio of ON current and OFF current when the gate voltage is changed) when applied to a transistor can be obtained, and CeO ₂ exhibits high insulation of 10 ¹⁵ Ω · cm or more. Therefore, it does not hinder the application of this polycrystalline silicon film to electronic devices.

FIG. 4 is a diagram showing the structure of a transistor using the polycrystalline silicon thin film of the present invention. A source electrode 5 and a drain electrode 6 are formed on the polycrystalline silicon film formed as described above, and a gate insulation such as a SiO ₂ film or a SiNx film is formed on the polycrystalline silicon film by a sputtering method, a plasma CVD method, or the like. Membrane 4 1000-2
The transistor is formed by forming the gate electrode on the insulating film with a thickness of 000Å. Si
The O ₂ film or the SiNx film is formed by the sputtering method at about 150 ° C. and by the plasma CVD method at 3 ° C.
It can be formed at about 00 to 350 ° C. In the transistor configured as described above, the polycrystalline silicon thin film 3 maintains crystal continuity due to the presence of the cerium oxide film layer 2 and can be sufficiently thinned because an amorphous region does not occur. (Leakage current) can be sufficiently reduced, and the electrical characteristics can be improved by increasing the ON current / OFF current ratio.

[0014]

As described above, according to the present invention, a polycrystalline silicon film having good crystal continuity can be obtained by interposing a cerium oxide layer having a crystal lattice constant close to that of silicon. As a result, when applied to a thin film transistor, the polycrystalline silicon film can be sufficiently thinned and the electrical characteristics can be dramatically improved by the thin film effect of the active region.

[Brief description of drawings]

FIG. 1 is a diagram showing a structure of a polycrystalline silicon thin film of the present invention.

FIG. 2 is a diagram illustrating a vacuum vapor deposition method.

FIG. 3 is a diagram illustrating a plasma CVD method.

FIG. 4 is a diagram illustrating a transistor of the present invention.

[Explanation of symbols]

1 ... Glass substrate, 2 ... Cerium oxide film layer, 3 ... Polycrystalline silicon film.

Claims (2)

[Claims] 1. A polycrystalline silicon thin film comprising a cerium oxide film layer and a polycrystalline silicon thin film sequentially laminated on a glass substrate. 2. A source electrode and a drain electrode are formed on a polycrystalline silicon thin film formed on a glass substrate with a cerium oxide film layer interposed, and a gate electrode is formed on the polycrystalline silicon thin film via a gate insulating film. Polycrystalline silicon thin film transistor.