JPH0683493B2 - DC loop control system - Google Patents

DC loop control system

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Publication number
JPH0683493B2
JPH0683493B2 JP12901987A JP12901987A JPH0683493B2 JP H0683493 B2 JPH0683493 B2 JP H0683493B2 JP 12901987 A JP12901987 A JP 12901987A JP 12901987 A JP12901987 A JP 12901987A JP H0683493 B2 JPH0683493 B2 JP H0683493B2
Authority
JP
Japan
Prior art keywords
circuit
loop
relay
capacitor
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP12901987A
Other languages
Japanese (ja)
Other versions
JPS63292893A (en
Inventor
俊之 佐藤
謙二 酒井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP12901987A priority Critical patent/JPH0683493B2/en
Publication of JPS63292893A publication Critical patent/JPS63292893A/en
Publication of JPH0683493B2 publication Critical patent/JPH0683493B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Description

【発明の詳細な説明】 〔概要〕 両端間に抵抗とコンデンサが直列に接続された時定数を
持つ電子化チョーク回路を用いるトランクの、直流ルー
プ回路を断続してダイヤル信号を送出する場合及び送出
後の直流ループ回路を流れる電流の波形歪をなくする為
に、該直流ループ回路のリレーの接点の断続にてのダイ
ヤル信号送出前にオンオフ回路にて該電子化チョーク回
路の該抵抗とコンデンサとの接続をオフとして時定数を
0とし、時定数による歪の発生をなくし、ダイヤル信号
送出後にオンとし元々電荷の蓄積されているコンデンサ
を接続しコンデンサ充電による歪をなくしたものであ
る。
DETAILED DESCRIPTION OF THE INVENTION [Outline] In the case of sending a dial signal by intermittently connecting a DC loop circuit of a trunk using an electronic choke circuit having a time constant in which a resistor and a capacitor are connected in series between both ends. In order to eliminate the waveform distortion of the current flowing through the subsequent DC loop circuit, the resistance and the capacitor of the computerized choke circuit are connected by the on / off circuit before the dial signal is sent by the intermittent contact of the relay of the DC loop circuit. The connection is turned off to set the time constant to 0 to eliminate the occurrence of distortion due to the time constant, and after turning on the dial signal, it is turned on to connect the capacitor in which the electric charge is originally stored to eliminate the distortion due to the charging of the capacitor.

〔産業上の利用分野〕[Industrial application field]

本発明は、両端間に抵抗とコンデンサが直列に接続され
た時定数を持つ電子化チョーク回路を用いる、ディジタ
ル交換機のアナログトランクの直流ループ回路の直流ル
ープ制御方式の改良に関する。
The present invention relates to an improvement in a DC loop control system of a DC loop circuit of an analog trunk of a digital exchange, which uses an electronic choke circuit having a time constant in which a resistor and a capacitor are connected in series between both ends.

上記直流ループ制御方式では、直流ループ回路を断続し
て対局トランクにダイヤル信号を送出する場合及び送出
後の直流ループ回路を流れる電流の波形歪を殆どなくし
誤動作がなくなることが望ましい。
In the above DC loop control method, it is desirable to eliminate the waveform distortion of the current flowing through the DC loop circuit when the dial signal is sent to the opposite trunk by intermittently connecting the DC loop circuit and to eliminate the malfunction.

〔従来の技術〕[Conventional technology]

以下従来例を図を用いて説明する。 A conventional example will be described below with reference to the drawings.

第3図は従来例の出トランクの場合の直流ループ回路を
主体とした回路図、第4図は直流ループ回路の電流の波
形のタイムチャートである。
FIG. 3 is a circuit diagram mainly showing a DC loop circuit in the case of an outgoing trunk of a conventional example, and FIG. 4 is a time chart of a current waveform of the DC loop circuit.

電子化チョーク回路1につき説明すると、抵抗2,7,8は
トランジスタ6に直流バイアスを供給するもので、コン
デンサ3はトランジスタ6のベース,エミッタ間に交流
的なバイアスが印加されないようにする為の交流バイパ
ス用のものである。
The electronic choke circuit 1 will be described. The resistors 2, 7 and 8 supply a DC bias to the transistor 6, and the capacitor 3 prevents an AC bias from being applied between the base and emitter of the transistor 6. It is for AC bypass.

トランジスタ6のコレクタ側を高電位となるようにし
て、両端間に交流信号の重畳した直流電源を接続する
と、トランジスタ6はコンデンサ3の為に、ベース,エ
ミッタ間が直流的にバイアスされ電圧が変動しないの
で、直流電流は、トランジスタ6,抵抗8の経路で流れ、
交流電流はこの経路を通過出来なく即ちチョーク回路と
なつている。
When the collector side of the transistor 6 is set to a high potential and a DC power supply with an AC signal superimposed is connected between both ends, the transistor 6 is a capacitor 3 so that the base and the emitter are DC biased and the voltage fluctuates. Therefore, the direct current flows through the path of transistor 6 and resistor 8,
The alternating current cannot pass through this path, that is, it is a choke circuit.

尚交流電流は大きな抵抗値の抵抗2,コンデンサ3の経路
で流れ、交流インピーダンスは大きな抵抗値の抵抗2に
略等しい。
The alternating current flows through the path of the resistor 2 having a large resistance value and the capacitor 3, and the alternating current impedance is substantially equal to the resistance 2 having a large resistance value.

次に、上記電子化チョーク回路1を用いた出トランクの
発信動作について説明する。
Next, the outgoing call operation of the outgoing trunk using the electronic choke circuit 1 will be described.

発信の為に、OGリレー(図示していない)を動作させる
と、対向交換機のトランク30のアース−線路19−Aリレ
ーの接点4−電子化チョーク回路1−OGリレーの接点9
−線路20−対向交換機のトランク30の−48Vなる直流ル
ープを形成して対向交換機を起動し、更にダイヤルパル
スを送る為にAリレー(図示していない)を動作させて
接点4を断続させ、該直流ループを流れる電流を断続さ
せて対向交換機にダイヤルパルスを送出する。
When an OG relay (not shown) is activated for transmission, the trunk 30 of the opposite exchange has a ground-line 19-A relay contact 4-electronic choke circuit 1-OG relay contact 9
-Line 20-Starting the opposite exchange by forming a DC loop of -48V in the trunk 30 of the opposite exchange, further activating the A relay (not shown) to send the dial pulse, and disconnecting the contact 4. The dial pulse is sent to the opposite exchange by interrupting the current flowing through the DC loop.

しかし、電子化チョーク回路1には抵抗2とコンデンサ
3よりなる時定数が存在する為、接点4が閉じた時、実
際に直流ループに電流が流れるのは遅れ、第4図(A)
に示す如く接点4を断続した時、(B)に示す如く歪の
ある波形となる。これでは、ダイヤルパルスを検出する
のに誤動作を起こす恐れがあるので、小さい値の抵抗17
と直列にCTリレー(図示していない)の接点18よりなる
回路を設け、ダイヤルパルス列送出時のみCTリレーを動
作させ接点18をオンとし、対向交換機のトランク30のア
ース−線路19−Aリレーの接点4−抵抗17−CTリレーの
接点18−線路20−対向交換機のトランク30の−48Vなる
直流ループを閉成し、電子化チョーク回路1の時定数が
ダイヤルパルスの送出に影響しないようにしている。こ
の結果直流ループの電流の波形は第4図(C)に示す如
くなる。
However, since the electronic choke circuit 1 has a time constant consisting of the resistor 2 and the capacitor 3, when the contact 4 is closed, the actual flow of the current in the DC loop is delayed, and FIG.
When the contact 4 is interrupted as shown in FIG. 3, a distorted waveform is obtained as shown in FIG. This may cause a malfunction in detecting the dial pulse.
A circuit consisting of a contact 18 of a CT relay (not shown) is provided in series, and the CT relay is operated only when sending a dial pulse train to turn on the contact 18, and the earth of the trunk 30 of the opposite exchange-the line 19-A relay Contact 4-Resistance 17-CT relay contact 18-Line 20-Trunk 30 trunk of the opposite exchange-Close the DC loop of -48V so that the time constant of the electronic choke circuit 1 does not affect the transmission of dial pulse. There is. As a result, the waveform of the current in the DC loop becomes as shown in FIG.

〔発明が解決しようとする問題点〕[Problems to be solved by the invention]

しかしながら、ダイヤルパルス列送出後、CTリレーを復
旧し接点18をオフとすると、直流電流は再び上記時定数
だけ遅れてコンデンサ3に流れ込む為、第4図(C)に
示す如く直流ループ断の状況に類似した状態となり、着
信側トラクでこれをダイヤルパルスと誤認する恐れがあ
る問題点がある。
However, if the CT relay is restored and the contact 18 is turned off after sending the dial pulse train, the DC current flows into the capacitor 3 again with the above time constant, so that the DC loop breaks as shown in FIG. 4 (C). The situation becomes similar, and there is a problem that the TRAQ on the receiving side may mistake this as a dial pulse.

〔問題点を解決するための手段〕[Means for solving problems]

第1図は本発明の原理回路図である。 FIG. 1 is a circuit diagram of the principle of the present invention.

図において、1は第1図に示す如く、一方の端子と他方
の端子間に、トランジスタ6と抵抗8が直列に接続さ
れ、又該トランジスタ6とコレクタ,ベース間には抵抗
2が接続され、又該トランジスタ6のベースと該他方の
端子間には、抵抗7とコンデンサ3との並列回路が接続
された電子化チョーク回路1の、該一方の端子がAリレ
ーの接点4に、該他方の端子がOGリレーの接点9に接続
された、ディジタル交換機のアナログトランクの直流ル
ープ回路において、 該トランジスタ6のベースと該コンデンサ3間に、該ト
ランジスタ6のベースと該コンデンサ3間の接続をオン
オフするオンオフ回路5を備える。そして該トランジス
タ6のベースと該コンデンサ3間の接続を、該オンオフ
回路5にて、該Aリレーの接点4の断続にてのダイヤル
パルス列送出前にオフとし、ダイヤルパルス列送出後に
オンとするようにする。
In the figure, as shown in FIG. 1, 1 is a transistor 6 and a resistor 8 connected in series between one terminal and the other terminal, and a resistor 2 is connected between the transistor 6 and a collector / base. Further, between the base of the transistor 6 and the other terminal, a parallel circuit of a resistor 7 and a capacitor 3 is connected, one terminal of which is the contact 4 of the A relay and the other of which is the other terminal. In a DC loop circuit of an analog trunk of a digital exchange, a terminal of which is connected to a contact 9 of an OG relay, a connection between the base of the transistor 6 and the capacitor 3 and a connection between the base of the transistor 6 and the capacitor 3 are turned on / off. An on / off circuit 5 is provided. Then, the connection between the base of the transistor 6 and the capacitor 3 is turned off by the on / off circuit 5 before sending the dial pulse train when the contact 4 of the A relay is intermittent, and turned on after sending the dial pulse train. To do.

以上の各構成要素により、ディジタル交換機におけるア
ナログトランクの直流ループ回路を第1図のように構成
する。
A DC loop circuit of an analog trunk in a digital exchange is constructed by the above components as shown in FIG.

〔作用〕[Action]

本発明では、直流ループ回路をAポジションリレーの接
点4にて断続してのダイヤルパルス列送出直前に、電子
化チョーク回路1の時定数を持つ抵抗2とコンデンサ3
との接続をオンオフ回路5にてオフとして時定数を0と
する。その結果ダイヤルパルスの時定数による歪はなく
なり、又ダイヤルパルス列送出後には、オンオフ回路5
にてダイヤルパルス列送出直前に電荷の蓄積されたコン
デンサ3を再び接続するのでコンデンサ充電による歪も
なくなる。
In the present invention, the resistor 2 and the capacitor 3 having the time constant of the electronic choke circuit 1 are provided immediately before the dial pulse train is transmitted by intermittently connecting the DC loop circuit to the contact 4 of the A position relay.
The connection with and is turned off by the on / off circuit 5, and the time constant is set to zero. As a result, the distortion due to the time constant of the dial pulse disappears, and after the dial pulse train is transmitted, the on / off circuit 5
Since the capacitor 3 in which the electric charge is accumulated is connected again immediately before sending the dial pulse train, the distortion due to the charging of the capacitor is also eliminated.

従って、ダイヤルパルスを送出する場合及び送出後の直
流ループ回路を流れる電流の波形歪は殆どなくなり、誤
動作することのない直流制御方式を実現することが出来
る。
Therefore, there is almost no waveform distortion of the current flowing through the DC loop circuit when transmitting the dial pulse and after the transmission of the dial pulse, and it is possible to realize a DC control system that does not malfunction.

〔実施例〕 以下本発明の1実施例に付き図に従って説明する。[Embodiment] An embodiment of the present invention will be described below with reference to the accompanying drawings.

第2図は本発明の実施例の両方向トランクの場合の直流
ループ回路を主体とした回路図である。
FIG. 2 is a circuit diagram mainly showing a DC loop circuit in the case of the bidirectional trunk according to the embodiment of the present invention.

図中13,14は着信時音声信号が自局電源側に流入するの
を防止するチョーク回路で、チョークコイル又は電子化
チョーク回路にて構成される。15,16は電流制限用抵
抗、10は対局の電源が逆特性になった時にも電子化チョ
ーク回路1の電流方向を一定とする為の整流回路、12は
直流ループに流れる電流を制限し、電子化チョーク回路
1,直流ループ電流検出回路11,整流回路10を保護する為
の電流制限回路、11は直流ループに流れる電流を検出す
る直流ループ電流検出回路である。
In the figure, 13 and 14 are choke circuits for preventing voice signals from flowing into the power supply side of the local station when an incoming call is made, and are composed of choke coils or electronic choke circuits. 15, 16 are current limiting resistors, 10 is a rectifying circuit for keeping the current direction of the electronic choke circuit 1 constant even when the power source of the game has reverse characteristics, and 12 limits the current flowing in the DC loop. Electronic choke circuit
1, a DC loop current detection circuit 11, a current limiting circuit for protecting the rectifier circuit 10, 11 is a DC loop current detection circuit for detecting the current flowing in the DC loop.

発信の為に、OGリレー(図示していない)を動作させ接
点9を点線側とすると、対向交換機のトランク30のアー
ス−線路19−Aリレーの接点4−直流ループ電流検出回
路11−整流回路10−電子化チョーク回路1−整流回路10
−電流制限回路12−OGリレーの接点9−線路20−対向交
換機のトランク30の−48Vなる直流ループを形成して対
向交換機を起動する。
When the OG relay (not shown) is operated to make a call, and the contact 9 is set to the dotted line side, the trunk 30 of the opposite exchange, the ground line 19-the contact point of the A relay 4-the DC loop current detection circuit 11-the rectification circuit 10-Electronic choke circuit 1-Rectifier circuit 10
-Current limiting circuit 12-Contacts of OG relay 9-Line 20-Trunk 30 of opposite exchange A DC loop of -48V is formed to start the opposite exchange.

ここで、ダイヤルパルス列を送出する直前にオンオフ回
路5をオフとし、Aリレー(図示していない)を動作さ
せて接点4を断続させ、直流ループ電流を断続すること
により対局にダイヤルパルスを送出する。この時電子化
チョーク回路1の時定数は0であるので、ダイヤルパル
スの波形歪は現れない。
Immediately before sending the dial pulse train, the on / off circuit 5 is turned off, the A relay (not shown) is operated to open / close the contact 4, and the direct current loop current is opened / closed to send the dial pulse to the opposite station. . At this time, since the time constant of the electronic choke circuit 1 is 0, the waveform distortion of the dial pulse does not appear.

ダイヤルパルス列送出後、オンオフ回路5をオンとする
ことにより、電子化チョーク回路1は再び本来のチョー
クの働きをするが、この時コンデンサ3はダイヤルパル
ス列送出直前に蓄積している電荷を持つている為に、従
来のように充電電流が流れることはなく、直流ループ回
路に流れる電流は第4図(D)に示す如く歪のないもの
となり、誤動作を起こすことはなくなる。
After the dial pulse train is transmitted, the on / off circuit 5 is turned on, whereby the electronic choke circuit 1 functions as the original choke again, but at this time, the capacitor 3 has the electric charge accumulated immediately before the dial pulse train is transmitted. Therefore, unlike the conventional case, the charging current does not flow, and the current flowing in the DC loop circuit becomes free of distortion as shown in FIG. 4 (D), and malfunction does not occur.

尚着信時には、対向交換機のトランク30が直流ループを
形成し、自局のアース−抵抗15−チョーク回路13−直流
ループ電流検出回路11−Aリレーの接点4−線路19−対
局の直流ループ−線路20−CGリレーの接点9−チョーク
回路14−抵抗16−自局の−48Vなる経路で電流が流れ、
直流ループ電流検出回路11にて電流を検出することによ
り自局のトランクが呼ばれたことが判り起動される。
When receiving an incoming call, the trunk 30 of the opposite exchange forms a DC loop, and the earth of the station-the resistor 15-the choke circuit 13-the DC loop current detection circuit 11-the contact point 4 of the A relay 4-the line 19-the DC loop of the opposite station-the line 20-CG relay contact 9-Choke circuit 14-Resistor 16-Current flows through -48V route of own station,
By detecting the current in the DC loop current detection circuit 11, it is found that the trunk of the own station has been called and it is activated.

尚電子化チョーク回路は図示したものでなくとも、両端
間に抵抗とコンデンサが直列に接続された時定数を持つ
ものであれば本発明の対称となることは明らかである。
It should be noted that the electronic choke circuit is not shown, but it is clear that the present invention is symmetrical to the present invention as long as it has a time constant in which a resistor and a capacitor are connected in series between both ends.

〔発明の効果〕〔The invention's effect〕

以上詳細に説明せる如く本発明によれば、直流ループ回
路を断続してダイヤル信号を送出する場合の波形歪及び
送出後の直流ループ断の状態に類似した状態となること
はなくなるので、誤動作することはなくなる効果があ
る。
As described in detail above, according to the present invention, the waveform distortion in the case of transmitting the dial signal by intermittently connecting the DC loop circuit and the state similar to the state of the disconnection of the DC loop after the transmission are eliminated, so that the malfunction occurs. It has the effect of disappearing.

【図面の簡単な説明】[Brief description of drawings]

第1図は本発明の原理回路図、 第2図は本発明の実施例の両方向トランクの場合の直流
ループ回路を主体とした回路図、 第3図は従来例の出トランクの場合の直流ループ回路を
主体とした回路図、 第4図は直流ループ回路の電流の波形のタイムチャート
である。 図において、 1は電子化チョーク回路、 2,7,8,15〜17は抵抗、 3はコンデンサ、 4はAリレーの接点、 5はオンオフ回路、 6はトランジスタ、 9はOGリレーの接点、 10は整流回路、 11は直流ループ電流検出回路、 12は電流制限回路、 13,14はチョーク回路、 18はCTリレーの接点、 19,20は線路、 30は対向交換機のトランクを示す。
FIG. 1 is a circuit diagram showing the principle of the present invention, FIG. 2 is a circuit diagram mainly showing a DC loop circuit in the case of a bidirectional trunk according to an embodiment of the present invention, and FIG. 3 is a DC loop in the case of a conventional outgoing trunk. FIG. 4 is a circuit diagram mainly composed of a circuit, and FIG. 4 is a time chart of current waveforms of a DC loop circuit. In the figure, 1 is an electronic choke circuit, 2, 7, 8, 15 to 17 are resistors, 3 is a capacitor, 4 is an A relay contact, 5 is an on / off circuit, 6 is a transistor, 9 is an OG relay contact, 10 Is a rectifier circuit, 11 is a DC loop current detection circuit, 12 is a current limiting circuit, 13 and 14 are choke circuits, 18 is a CT relay contact, 19 and 20 are lines, and 30 is a trunk of an opposite exchange.

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】一方の端子と他方の端子間に、トランジス
タ(6)と第1の抵抗(8)が直列に接続され、又該ト
ランジスタ(6)のコレクタ,ベース間には第2の抵抗
(2)が接続され、又該トランジスタ(6)のベースと
該他方の端子間には、第3の抵抗(7)とコンデンサ
(3)との並列回路が接続された電子化チョーク回路
(1)の、該一方の端子がAリレーの接点(4)に、該
他方の端子がOGリレーの接点(9)に接続された、ディ
ジタル交換機のアナログトランクの直流ループ回路にお
いて、 該トランジスタ(6)のベースと該コンデンサ(3)間
に、該トランジスタ(6)のベースと該コンデンサ
(3)間の接続をオンオフするオンオフ回路(5)を備
え、 該トランジスタ(6)のベースと該コンデンサ(3)間
の接続を、該オンオフ回路(5)にて、該Aリレーの接
点(4)の断続にてのダイヤルパルス列送出前にオフと
し、ダイヤルパルス列送出後にオンとするようにしたこ
とを特徴とする直流ループ制御方式。
1. A transistor (6) and a first resistor (8) are connected in series between one terminal and the other terminal, and a second resistor is provided between the collector and base of the transistor (6). (2) is connected, and between the base of the transistor (6) and the other terminal, a parallel circuit of a third resistor (7) and a capacitor (3) is connected. ), The transistor (6) in the analog trunk DC loop circuit of the digital exchange, the one terminal of which is connected to the contact (4) of the A relay and the other terminal of which is connected to the contact (9) of the OG relay. An on / off circuit (5) for turning on / off the connection between the base of the transistor (6) and the capacitor (3) is provided between the base of the transistor (6) and the capacitor (3). ) Connection A DC loop control system characterized in that an on / off circuit (5) is turned off before sending a dial pulse train when the contact (4) of the A relay is intermittent and turned on after sending the dial pulse train.
JP12901987A 1987-05-26 1987-05-26 DC loop control system Expired - Lifetime JPH0683493B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12901987A JPH0683493B2 (en) 1987-05-26 1987-05-26 DC loop control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12901987A JPH0683493B2 (en) 1987-05-26 1987-05-26 DC loop control system

Publications (2)

Publication Number Publication Date
JPS63292893A JPS63292893A (en) 1988-11-30
JPH0683493B2 true JPH0683493B2 (en) 1994-10-19

Family

ID=14999145

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12901987A Expired - Lifetime JPH0683493B2 (en) 1987-05-26 1987-05-26 DC loop control system

Country Status (1)

Country Link
JP (1) JPH0683493B2 (en)

Also Published As

Publication number Publication date
JPS63292893A (en) 1988-11-30

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