JPS6048693A - Central office line trunk circuit - Google Patents
Central office line trunk circuitInfo
- Publication number
- JPS6048693A JPS6048693A JP15741483A JP15741483A JPS6048693A JP S6048693 A JPS6048693 A JP S6048693A JP 15741483 A JP15741483 A JP 15741483A JP 15741483 A JP15741483 A JP 15741483A JP S6048693 A JPS6048693 A JP S6048693A
- Authority
- JP
- Japan
- Prior art keywords
- relay
- circuit
- voltage
- time
- turned
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q3/00—Selecting arrangements
- H04Q3/42—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
Abstract
Description
【発明の詳細な説明】
〔発明の技術分封〕
本発明はfH内交快桜などに使用される局たn+・う、
・り回路に関するものである。[Detailed Description of the Invention] [Technical Envelope of the Invention] The present invention is for the station n+, u,
・It is related to the circuit.
周知のように、(行内交換1辰などに使用てれる局線ト
ランク回路は、局と交換磯との世1で−B” J”情号
の授受を行うと共に、発信および后情に灼する尾・答を
行うために局電流に対して直流ルーfをブ(る成する機
能を有している。As is well known, (the central office line trunk circuit used in in-bank exchanges, etc.) exchanges -B"J" information between the central office and the exchange, as well as transmitting and receiving information. It has the function of creating a direct current loop f for the local current in order to perform a tail and answer.
第1図は、従来から使用忌れている局線トランク回路の
一例を示す図である。同図において、J・6線トランク
回路は局1と2本の1jlt+′6(チップ勝お・よび
リング線)で接続されている。局1の直αjj) 告価
回路は、図示するように直流電圧源E8(通’7+ハ4
8Vの直流源)と内部抵抗R8で衣わずこと〃・でき、
また線路の直流抵抗は札で表わすことができる。2は局
1からの着信信号(一般的には16Hz 、 ]、 O
OVrlll、の交流信号)を検出する層化検出回路、
3は着信信号に対する応答時址たは光(i1711i’
1に直流ループを形成するリレー、4は直流的(・C′
に1、低抵抗を示し、交fAE的には高抵抗を丞す(ロ
ー流分σ;1゜回路でり9、局1からの直流′1Lθ1
1はすべでこの回流分流回路を流れる。5は反流的には
低抵抗を小し、直流的には高抵抗を示す反流分流回路で
必9、直流′電流が1畳された局1からの音声(+E
J/、1tTJ’、その交流成分のみがこの交流分01
シ回路5を通り、父俣機内のスイッチフレーム6に伝達
すれる。FIG. 1 is a diagram illustrating an example of a central office line trunk circuit, which has traditionally been discouraged from use. In the figure, the J/6 line trunk circuit is connected to station 1 by two 1jlt+'6 (chip line and ring line). As shown in the figure, the DC voltage source E8 (direct αjj) of station 1 is connected to
8V DC source) and internal resistance R8, it can be done without any trouble.
Also, the direct current resistance of the line can be represented by a tag. 2 is the incoming signal from station 1 (generally 16Hz, ], O
a layered detection circuit for detecting an alternating current signal of OVrll;
3 is the response time or light (i1711i') to the incoming signal.
1 is a relay forming a DC loop, 4 is a DC loop (・C'
1, shows low resistance, and has high resistance in terms of AC fAE (low current component σ; 1° circuit) 9, DC '1Lθ1 from station 1
1 flows through this recirculation shunt circuit. 5 is a countercurrent shunt circuit that has low resistance for countercurrent and high resistance for direct current.
J/, 1tTJ', only its AC component is this AC component 01
It passes through the circuit 5 and is transmitted to the switch frame 6 in the Chichimata aircraft.
従って、このような構成において局1から着信(i号が
到来し、被呼者がこれに応答してオフフッタ操作を行う
と、リレー3が閉成して局1との間で直流ループが形成
されるど共に、交流分流回路5とスイッチフレーム6と
によ9局1との通話路が形成される。これによシ、局1
と内線電話機との間での通話が可能になる。Therefore, in such a configuration, when an incoming call (number i) arrives from station 1 and the called party performs an off-footer operation in response, relay 3 closes and a DC loop is formed with station 1. At the same time, a communication path between station 9 and station 1 is formed by AC shunt circuit 5 and switch frame 6.
You can now make calls between the phone and the extension phone.
一方、ダイヤルパルスの送出時においては、発呼者によ
るオフフックに連動してリレー3が閉成しで局1との間
で直流ループが形成きれる。この状態でダイヤル操作を
行うと、ダイヤル番号に対応した回数だけリレー3が断
続する。すなわち、例えば番号「2」のダイヤル操作を
行った揚台、第2図の波形図に示すように、リレー3は
T1〜T2およびT3〜T4の区間で2回断続する。こ
hにより、局1に対しダイヤルパルスが送出され〔背景
技術の問題点〕
ところで、血流分流回路4には局1からの直流電流を流
すトランジスタTR2を有しているが、このトランジス
タTR2のベースには1M電器C2が接続され、この蓄
電器C2によりトランジスタTR2のベース電位を一定
に保つことにより、局1からの直流電流に重畳した交流
信号によってベース′亀位が変動するのを抑制し、[・
ランジスタTR2のコレクターエミッタ間の交流抵抗を
大きくし、直θIL成分のみが流れるように構成されて
いる。しかし、この苗′成器C2はダイヤル・々シス送
出時にダイヤルパルス波形を変形δせてし1う欠点を有
している。すなわち、第2図に示す波形図において時刻
Tlでリレー3がオフすると、直流分流回路4には電圧
が印加されなくなる。このため、蓄電器(−72の充電
後の電圧vc2はトラン・ノスタTR2のベース→エミ
ッタ→抵抗R3の経路を通って第2図(b)に示すよう
な特性で放電する。この後、時刻T2でリレー3がオン
すると、直流分流回路4には再び電圧が印加され、蓄電
器C2は抵抗R2を通して充′亀される。On the other hand, when a dial pulse is sent, the relay 3 is closed in conjunction with the caller's off-hook, and a DC loop is completed with the station 1. When dialing is performed in this state, the relay 3 is turned on and off the number of times corresponding to the dialed number. That is, for example, as shown in the waveform diagram of FIG. 2 on the platform where the dial number "2" is operated, the relay 3 is turned on and off twice in the intervals T1-T2 and T3-T4. As a result, a dial pulse is sent to the station 1. [Problem in the background art] By the way, the blood flow shunting circuit 4 has a transistor TR2 through which the DC current from the station 1 flows. A 1M electric appliance C2 is connected to the base, and by keeping the base potential of the transistor TR2 constant with this capacitor C2, it is possible to suppress the base's position from changing due to the AC signal superimposed on the DC current from the station 1. [・
The AC resistance between the collector and emitter of transistor TR2 is increased so that only the direct θIL component flows. However, this seedling generator C2 has the disadvantage that the dial pulse waveform is distorted by δ when sending out the dial pulse. That is, when the relay 3 is turned off at time Tl in the waveform diagram shown in FIG. 2, no voltage is applied to the DC shunt circuit 4. Therefore, the voltage vc2 after charging the capacitor (-72) passes through the path of the base of the transformer nostar TR2 → emitter → resistor R3 and is discharged with the characteristics shown in FIG. 2(b). After this, at time T2 When the relay 3 is turned on, voltage is again applied to the DC shunt circuit 4, and the capacitor C2 is charged through the resistor R2.
ところが、トランジスタは一般的にそのベース・エミッ
タ間電圧が約0.7Vを越え万ければコレクタ電流が流
れ始めないという特性を有している。However, a transistor generally has a characteristic that collector current does not begin to flow unless the base-emitter voltage exceeds about 0.7V.
このため、蓄電器C2の充電電圧Vc2が0.7Vに達
するまでのΔTの間トランジスタTR2のコレクタ電流
は全く流れず、さらにその後も充電′電圧Vc2の上昇
は緩慢なためにコレクタ電佛は急に立上らない。この結
果、μj篭流■1は第2図(C)に示すように立上シが
緩慢な波形形状となってし寸い、しかも開電流ILli
線路抵抗札によっても立−辷り特・註が変化するため、
線路の長短に応じて豆上り特1王が変化し、ダイヤルパ
ルスのブレーク葬が変化してしまうという欠点が生じて
いた。Therefore, the collector current of transistor TR2 does not flow at all during ΔT until charging voltage Vc2 of capacitor C2 reaches 0.7V, and even after that, since the charging voltage Vc2 rises slowly, the collector current suddenly increases. I can't stand up. As a result, the μj cage current ■1 has a waveform shape with a slow rise as shown in Fig. 2 (C), and moreover, the open current ILli
Since the standing characteristics and notes change depending on the track resistance tag,
The shortcoming was that the value of the special first order of the beans changed depending on the length of the track, and the break value of the dial pulse changed.
本発明は上−記欠点を除去し、理想的なダイヤル・ゼル
ス波形を送出し、かつ線路抵抗によりダイヤル・ぞルス
のブレーク率が変化しない局線トランク回路を提供する
ことを目的とする。SUMMARY OF THE INVENTION An object of the present invention is to eliminate the above-mentioned drawbacks, to provide a central office line trunk circuit that transmits an ideal dial/zero waveform, and in which the break rate of the dial/zero does not change due to line resistance.
1′、発明の概要〕
そこで本発明では、ダイヤルパルスさ6生のために直流
ルー!形成用のリレーがオフした時に直流分流回路の蓄
電器を回路から切シ離すことにょシ上記した目的を達成
している。1', Summary of the Invention] Therefore, in the present invention, a direct current loop! The above purpose is achieved by disconnecting the capacitor of the DC shunt circuit from the circuit when the forming relay is turned off.
以下、本発明を添付図面を参照して詳細に説ワ」する。 Hereinafter, the present invention will be explained in detail with reference to the accompanying drawings.
第3図は本発明の一実施例を示す図であっで、直流ルー
プ形成用のリレー3と同期して動作するリレーに2が付
加烙れている点のみが第1図の回路と相違する。FIG. 3 is a diagram showing an embodiment of the present invention, and the only difference from the circuit shown in FIG. 1 is that 2 is added to a relay that operates in synchronization with relay 3 for forming a DC loop. .
従って、この第3図の構成においては第2図の時刻T、
でリレー3がオフして直流分流回路4に電圧が印加され
なくなっても蓄゛屯器c2はこれに「1列接続さicた
リレーに2がオフすることにょpトラン、クスタTR2
のべ〜スから切シ離される。このため、#電器C2の充
電後の71圧Vc2′は第2図(f)に示すように時刻
T1〜T2の間継続して時刻T1における電圧を保持す
る。そこで、時刻T2においてリレー3がオンし、直流
分流回路4に再び電圧が印加されると、トランジスタT
R2には直ちにコレクタ電流が流れる。Therefore, in the configuration shown in FIG. 3, at time T in FIG.
Even if relay 3 is turned off and voltage is no longer applied to DC shunt circuit 4, accumulator c2 will turn off relay 2 connected to IC in one row.
It is separated from the base. Therefore, the 71 voltage Vc2' after charging of #electrical appliance C2 continues from time T1 to time T2 and maintains the voltage at time T1, as shown in FIG. 2(f). Therefore, when the relay 3 is turned on at time T2 and voltage is applied to the DC shunt circuit 4 again, the transistor T
A collector current immediately flows through R2.
この結果、帰電流■Lは第2図(f)に示すようにリレ
ー3の断続に対して遅延のない急峻な立上9特性をもっ
た理想的な断続波形となり、しかも線路抵抗町によって
ダイヤルパルスのブレーク率が変化することもなくなる
。As a result, the return current ■L has an ideal intermittent waveform with a steep rising characteristic with no delay with respect to the intermittent connection of the relay 3, as shown in Figure 2 (f), and is dialed in depending on the line resistance. The pulse break rate also no longer changes.
以」二説明したように本発明は、ダイヤル・やルス発生
のために直流ループ形成用のリレーがオフした時に直流
分流回路の苗電器を回路から切υ離すようにしたもので
あるため、線路抵抗によりブレーク率が変化することも
なく、シかも極めて理想的な波形形状のダイヤルパルス
を送出するコトかできるという効果がある。As explained above, the present invention is designed to disconnect the DC shunt circuit from the circuit when the relay for forming the DC loop is turned off due to the generation of dial noise. This has the advantage that the break rate does not change due to resistance, and dial pulses with an extremely ideal waveform can be sent out.
第1図は従来の開扉トランク回路の一例を示すト1、第
2図は従来の局線トランク回路および本発明による局線
トランク回路の各部の伯月波形図、第3図は本発明によ
る局線トランク回路の一芙施例を示す図である。
1・・・局、2・・・着信検出回路、3・・・直流ルー
プ形成用のリレー、4・・・直流分びC4回路、5 ・
父v11分流回路、6・・・スイッチフレーム。FIG. 1 shows an example of a conventional open door trunk circuit, FIG. 2 is a waveform diagram of each part of a conventional central office line trunk circuit and a central office line trunk circuit according to the present invention, and FIG. 3 is a diagram according to the present invention. It is a figure showing one example of a central office line trunk circuit. 1... Station, 2... Incoming call detection circuit, 3... Relay for DC loop formation, 4... DC branch C4 circuit, 5.
Father v11 shunt circuit, 6... switch frame.
Claims (1)
る第lの回路および直流成分のみを通過させる第2の回
路を術えた局線トランク回路において、上記第2の回路
の直流経路を構成するトランジスタのベー、スに接h′
Lでれた蓄電器をダイヤル・ンルス発生時に該ダイヤル
パルスのプV −りJ414 間中−ヒ記l・ランジス
タのベースから゛切断するスイッチング手段を設けたこ
とを特徴とするに”i MA )ランク回路。In a central office line trunk circuit comprising a first circuit that passes only the alternating current component of the voice signal in the subscriber line and a second circuit that passes only the direct current component, the direct current path of the second circuit is configured. Connected to the base of the transistor h'
It is characterized in that it is provided with a switching means for disconnecting the capacitor from the dial pulse from the base of the transistor when the dial pulse occurs. circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15741483A JPS6048693A (en) | 1983-08-29 | 1983-08-29 | Central office line trunk circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15741483A JPS6048693A (en) | 1983-08-29 | 1983-08-29 | Central office line trunk circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6048693A true JPS6048693A (en) | 1985-03-16 |
JPH0515118B2 JPH0515118B2 (en) | 1993-02-26 |
Family
ID=15649115
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP15741483A Granted JPS6048693A (en) | 1983-08-29 | 1983-08-29 | Central office line trunk circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6048693A (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6210952A (en) * | 1985-07-08 | 1987-01-19 | Matsushita Electric Ind Co Ltd | Key telephone set |
JPS62176290A (en) * | 1986-01-29 | 1987-08-03 | Fujitsu Ltd | Electronic choke circuit with electric current limit function |
JPS62202697A (en) * | 1986-02-04 | 1987-09-07 | Fujitsu Ltd | Dial pulse transmission circuit |
JPS62216490A (en) * | 1985-11-20 | 1987-09-24 | マイテル・コ−ポレ−シヨン | Trunk line circuit for telephone circuit |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS54133013A (en) * | 1978-04-07 | 1979-10-16 | Nec Corp | Dial pulse delivery circuit |
-
1983
- 1983-08-29 JP JP15741483A patent/JPS6048693A/en active Granted
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS54133013A (en) * | 1978-04-07 | 1979-10-16 | Nec Corp | Dial pulse delivery circuit |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6210952A (en) * | 1985-07-08 | 1987-01-19 | Matsushita Electric Ind Co Ltd | Key telephone set |
JPS62216490A (en) * | 1985-11-20 | 1987-09-24 | マイテル・コ−ポレ−シヨン | Trunk line circuit for telephone circuit |
JPH0582185U (en) * | 1985-11-20 | 1993-11-05 | マイテル・コーポレーション | Relay line circuit for telephone lines |
JPS62176290A (en) * | 1986-01-29 | 1987-08-03 | Fujitsu Ltd | Electronic choke circuit with electric current limit function |
JPS62202697A (en) * | 1986-02-04 | 1987-09-07 | Fujitsu Ltd | Dial pulse transmission circuit |
JPH058916B2 (en) * | 1986-02-04 | 1993-02-03 | Fujitsu Ltd |
Also Published As
Publication number | Publication date |
---|---|
JPH0515118B2 (en) | 1993-02-26 |
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