JPH0683490A - Electronic device - Google Patents

Abstract

PURPOSE:To provide the electronic device with an initial setting input circuit which enables a system to securely be started up when a minute current electric power source is used by preventing an unnecessary DC current from flowing at the time of power-ON resetting. CONSTITUTION:The initial setting input circuit 3 which supplies initial setting data to an internal circuit 4 of the electronic device 1 consists of a COMS inverter circuit 31 whose input terminal connects with an initial setting terminal 2 which is selectively grounded or made open, a two-input CMOS.NAND gate 32 for setting the state of the inverter circuit 31, and a strobe signal generating circuit 33. The NAND gate 32 inputs the output data of the inverter circuit 31 and the strobe signal from the strobe signal generating circuit 33 and its output terminal is connected to the input terminal of the inverter circuit 31. Different outputs of the inverter circuit 31 are supplied to the internal circuit 4 according to connection states of the initial setting terminal 2.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic device having an initial setting input circuit for giving different functions to each product.

[0002]

2. Description of the Related Art In various electronic devices, different functions are often initialized for each product in accordance with specifications (use) such as domestic and overseas use. Figure 4
(a) shows a basic method of initial setting that is generally performed conventionally. This is because the electronic device 1 is provided with an initial setting terminal 2 and the terminal 2 is selectively connected to a power supply terminal (“H” level) or a ground terminal (“L” level) according to specifications. It is a thing. This terminal connection is made by soldering or wire bonding. In this method, since the connection of the initial setting terminal 2 is absolutely necessary, the product cost is increased due to this connection step.

FIG. 4 (b) shows an improved method of FIG. 4 (a), in which the initial setting terminal 2 is connected to the ground terminal as necessary, and the other terminals are kept open. is there. Inside the electronic device 1, a pull-up resistor Rp for connecting the initial setting terminal 2 to a power source is provided. Therefore, when the initial setting terminal 2 is open, the pull-up resistor R
The "H" level is supplied to the internal circuit via p. In this method, for example, by connecting the initial setting terminal 2 to the ground terminal only for special purposes, and by keeping the initial setting terminal 2 in the open state in the standard specification, compared to the case of FIG. 4 (a). The man-hours for initial setting can be reduced.

However, in the method of FIG. 4B, when the initial setting terminal 2 is connected to the ground terminal, the pull-up resistor Rp
There is a drawback that a current constantly flows through the. This is because, for example, when operating with a minute current of 10's of microamperes, as in a small measuring instrument using a solar cell as a power source,
Cannot be ignored.

FIG. 5 shows an example of the configuration of a dynamic type initial setting input circuit which solves the problem of FIG. 4 (b). this is,
The part corresponding to the pull-up resistor Rp in FIG. 4 (b) is constituted by an active circuit so that a steady direct current does not flow. As shown in the figure, the initial setting input circuit includes an inverter circuit 41 having an input terminal connected to the initial setting terminal 2 and an output terminal connected to an internal circuit, and an input terminal and a ground terminal of the inverter circuit 41. The n-channel MOS transistor 43 provided and one input terminal are connected to the output terminal of the inverter circuit 41, a strobe signal is supplied to the other input terminal, and the output terminal is a MOS
OR gate 42 connected to the gate of transistor 43
It consists of and.

The strobe signal applied to the OR gate 42 is, for example, as shown in FIG. 6, the ground potential ("L" level) in the reset state and the power supply potential ("H") at a predetermined cycle.
Timing pulse. The initial setting terminal 2 is selectively connected to the power supply terminal or opened as in the case of FIG.

When the initial setting terminal 2 is open,
After the power is turned on, when the strobe signal becomes "H" level,
This is the MOS transistor 43 via the OR gate 42.
And the MOS transistor 43 is turned on. As a result, the input terminal of the inverter circuit 41 becomes "L" level, and therefore its output terminal becomes "H" level. Since this "H" level output is given to the gate of the MOS transistor 43 through the OR gate 42,
This state is latched. Then, the "H" level output of the inverter circuit 41 is given to the internal circuit.

When the initial setting terminal 2 is connected to the power supply terminal, the output of the inverter circuit 41 becomes "L" level when the power is turned on, and this is supplied to the internal circuit. After that, when the strobe signal becomes "H" level, the MOS transistor 43 is turned on, but since the initial setting terminal 2 is forcibly connected to "H" level, the state of the inverter circuit 41 does not change. In addition, the MOS transistor 43
Since the current only flows during the ON period of, the average current is small. As described above, no steady current flows in the initial setting input circuit of FIG.

[0009]

However, even in the dynamic type initial setting input circuit of FIG. 5, the following problems still remain. When the initial setting terminal 2 is open, the MOS transistor 4 is activated during the power-on reset period shown in FIG.
Since 3 is off, the input terminal of the inverter circuit 41 is in a floating state and is likely to be set to an intermediate potential. Then, during this period, the inverter circuit 41
Even if is a CMOS inverter, the p-channel MOS transistor and the n-channel MOS transistor are turned on at the same time and a through current flows.

On the other hand, if the strobe signal starts at the "H" level in the power-on reset state, the input terminal potential of the inverter circuit 41 is immediately set to the "L" level when the power is turned on, as described above. It is possible to prevent a through current from flowing through the inverter circuit 41. However, in this case, when the initial setting terminal 2 is connected to the power supply terminal, since the MOS transistor 43 is on during the power-on reset period, the power supply current flows through this. In either case, when the power source is a small current such as a solar cell, a wasteful current flows at the time of power-on reset, and the system cannot start up.

According to the present invention, an electronic device having a dynamic type initial setting input circuit which does not allow useless direct current to flow at the time of power-on reset and enables reliable system startup even when a minute current power source is used. The purpose is to provide a device.

[0012]

SUMMARY OF THE INVENTION The present invention is an electronic device having an initialization input circuit for supplying initial data to an internal circuit when power is turned on, wherein the initialization input circuit is selectively grounded according to specifications. An initial setting terminal connected to the terminal or in an open state; a CMOS inverter circuit having an input terminal connected to the initial setting terminal and an output terminal connected to an internal circuit; and a first input terminal A CMOS 2-input NAND which is connected to the output terminal of the inverter circuit, the output terminal of which is connected to the input terminal of the inverter circuit to form a latch circuit together with the inverter circuit.
A gate and a strobe generating circuit for supplying a strobe signal whose reset state at power-on is “H” level and which becomes “L” level at a predetermined timing to the second input terminal of the NAND gate are provided. It has a feature.

[0013]

The initial setting input circuit according to the present invention is a dynamic type, and a steady direct current does not flow. The initial setting terminal is selectively opened or grounded, and different data is supplied to the internal circuit depending on the connection state. When the initial setting terminal is grounded, no path is formed in which a direct current flows in the power-on reset state. When the initial setting terminal is open, the input terminal potential of the inverter circuit is "H" level or "L" depending on the combination of the strobe signal whose power-on reset state is "H" level and the output signal of the inverter circuit. Fixed to one of the levels. As a result, it is possible to prevent a through current from flowing in the inverter circuit. Therefore, according to the present invention, unnecessary DC current does not flow when the power is turned on, and the system can be reliably started up in an electronic device using a microcurrent power source such as a solar cell.

[0014]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 shows a system configuration of an electronic device according to an embodiment of the present invention. As shown, this electronic device 1
It has an internal circuit 4 and an initial setting input circuit 3 for giving initial setting data to the internal circuit 4. These circuits operate using the solar cell 5 as a DC power source.

The initial setting input circuit 3 is a CMOS inverter circuit 31 having an input terminal connected to the initial setting terminal 2 which is connected to the ground terminal or is open, and a CMOS 2-input NA for setting the state of the inverter circuit 31.
It is composed of an ND gate 32, a strobe signal generating circuit 33, and the like. In the NAND gate 32, the data of the output terminal (N2) of the inverter circuit 31 is input to the first input terminal, and the strobe signal from the strobe signal generating circuit 33 is input to the second input terminal (N3). N
The output terminal of the AND gate 32 is connected to the input terminal (N1) of the inverter circuit 31. Inverter circuit 31
Is supplied to the internal circuit 4 as initial setting data.

In this embodiment, the strobe signal generating circuit 33 generates a strobe signal as shown in FIG.
That is, the strobe signal generation circuit 33 outputs the “H” level at the power-on reset (in the figure, the power supply potential VDD).
After that, a pulse that becomes the "L" level (ground potential VSS in the figure) is generated at a predetermined timing.

The operation of the initial setting input circuit in this embodiment will be described below with reference to FIGS. 3 (a) and 3 (b). Figure 3
(a) and (b) are potential waveforms of the respective terminals when the initial setting terminal 2 is connected to the ground terminal and when it is open. When the initial setting terminal 2 is grounded, the input terminal N1 of the inverter circuit 31 is forcibly grounded and is at the "L" level as shown in FIG. 3 (a). The terminal N2 becomes "H" level. This "H" level output is supplied to the internal circuit 4 as initial setting data. Power-on reset period, N
The two inputs of the AND gate 32 are both at "H" level,
No direct current flows through either the inverter circuit 31 or the NAND gate 32.

After that, the strobe signal becomes "L" level at a predetermined timing, and the output of the NAND gate 32, that is, the input terminal N1 of the inverter circuit 31 tends to become "H" level. However, since the input terminal N1 of the inverter circuit 31 is forcibly grounded, the potential does not rise and the input / output potential relation of the inverter circuit 31 does not change by the strobe signal.

When the initial setting terminal 2 is opened,
As shown in Fig. 3 (b), when power-on reset, NAN
The output (N1) of the D gate 32 becomes either "H" level (solid line) or "L" level (broken line). It is not decided which level it will be. First, when the output of the NAND gate 32 at power-on reset is "H" level, the output terminal N2 of the inverter circuit 31 is set to "L" level. After that, when the strobe signal becomes "L" level, the NAND gate 32 turns on the two load p-channel MOS transistors to further raise the "H" level potential of the input terminal N1 of the inverter circuit 31, and the inverter circuit 31 The output terminal N2 becomes a deeper "L" level. Even if the strobe signal returns to the "H" level, the other input terminal of the NAND gate 32, that is, the output terminal N2 of the inverter circuit 31 is at the "L" level, so that the output of the NAND gate 32 is not inverted and the inverter is not inverted. The state where the input of the circuit 31 is "H" level and the output is "L" level is held. Then, the "L" level output of the inverter circuit 31 is supplied to the internal circuit 4 as initial setting data.

Next, when the output of the NAND gate 32 at power-on reset is "L" level, the output of the inverter circuit 31 is set to "H" level, but if the strobe signal becomes "L" level. , The output of the NAND gate 32 becomes "H" level, and then this "H" level is held. Then, the “L” level output of the inverter circuit 31 is supplied to the internal circuit 4.

According to this embodiment, a DC current does not flow at the time of power-on reset as in the conventional dynamic type initial setting input circuit. That is, when the initial setting terminal 2 is grounded, the input / output of the inverter circuit 31 is immediately fixed to the "L" and "H" level states when the power is turned on, so that no DC current path is formed.
Even when the initial setting terminal 2 is opened, the output of the inverter circuit 31 is “H” at the time of power-on reset,
Although it is indefinite whether it will be one of the "L" levels, it does not enter the floating state and is fixed to the "L" level thereafter, so that no through current flows in the CMOS inverter circuit 31. Therefore, if the initialization input circuit of this embodiment is used, the system can be surely started up by turning on the power supply.

The present invention is not limited to the above embodiment. For example, in the embodiments, the solar cell is used as the DC power supply, but the present invention can be applied to various electronic systems of low power consumption using a normal small battery.

[0023]

As described above, according to the present invention, it is possible to prevent a wasteful DC current from flowing at the time of power-on reset and to reliably start up a system even when a minute current power source such as a solar cell is used. It is possible to provide an electronic device having a dynamic type initial setting input circuit that enables the above.

[Brief description of drawings]

FIG. 1 is a diagram showing an electronic device according to an embodiment of the present invention.

FIG. 2 is a strobe signal waveform of the embodiment.

FIG. 3 is an operation waveform diagram of the initial setting input circuit according to the embodiment.

FIG. 4 is an example of a conventional initial setting input circuit.

FIG. 5 is an example of a conventional initial setting input circuit.

6 is an operation waveform diagram of the circuit of FIG.

[Explanation of symbols]

1 ... Electronic device, 2 ... Initial setting terminal, 3 ... Initial setting input circuit, 4 ... Internal circuit, 5 ... Solar cell, 31 ... Inverter circuit, 32 ... 2-input NAND gate, 33 ... Strobe signal generating circuit.

Claims (1)

[Claims] 1. An electronic device having an initial setting input circuit for supplying initial data to an internal circuit when power is turned on, wherein the initial setting input circuit is selectively connected to a ground terminal or opened according to specifications. A CMOS inverter circuit in which an initial setting terminal is brought into a state, an input terminal is connected to the initial setting terminal, and an output terminal is connected to an internal circuit; and a first input terminal is connected to the output terminal of the inverter circuit. The output terminal is connected to the input terminal of the inverter circuit and constitutes a latch circuit together with the inverter circuit, and the second input terminal of the NAND gate has a reset state of "H" when the power is turned on. And a strobe generating circuit that supplies a strobe signal that is at "L" level at a predetermined timing. To the electronic device.