JPH0677929A - Delay lock loop for spread spectrum receiver - Google Patents

Abstract

PURPOSE:To reduce the number of ROM and wiring used for numerical arithmetic. CONSTITUTION:Correlation (an early signal correlation vector) between a pseudo random code advanced to a pseudo random code for demodulation just for a prescribed phase and a received spread spectrum signal, and correlation (a delay signal correlation vector) between a pseudo random code delayed for a prescribed phase and the spread spectrum signal are calculated. Then, correlation difference between the levels of both vectors is calculated by a control signal generator, and the phase of the pseudo random code for demodulation is controlled. This control signal generator of the delay lock loop is composed of a subtracter 6 for calculating real number difference between a real number component Acostheta of an early signal correlation vector and a real number component Bcostheta of a delay signal correlation vector, subtracter 5 for calculating imaginary number difference between imaginary components Asintheta and Bsintheta, and ROM 4 for numerical arithmetic to calculate the correlation difference from the real number difference and imaginary number difference.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a delay lock loop for synchronizing a demodulation pseudo-random code with a received spread spectrum signal in order to spread the spread spectrum of the received spread spectrum signal in a spread spectrum receiver, and particularly to an early signal correlation. The present invention relates to a control signal generator for obtaining a synchronous control signal by calculating a correlation difference between a vector size and a delay signal correlation vector size.

[0002]

Receiving synchronization is required for the correct reception of a modulated pseudo-random code, which is generated at the receiving pseudo-random code and at the receiving side (pseudo-random code at the transmitting side). It is done by correlating with a pseudo-random code for demodulation (of the same sequence). That is,
As will be described later in detail, when the reception synchronization is established, the correlation becomes a constant value, and when the reception synchronization is lost, the correlation deviates from this constant value.Therefore, the reception timing is controlled so that the correlation always takes a constant value. To be done.

Although there are various spread spectrum communication (modulation and demodulation) systems, the most basic direct sequence modulation and demodulation system will be described first. The principle of this direct sequence modulation is PSK
(Phase Shift Keying) It is derived from the principle of communication system.
Since the PSK communication system is composed of the PSK modulation system and its demodulation system, the PSK modulation system will be described first. When the carrier wave cos .omega _c t, it becomes like this carrier is PSK modulated _{d (t) cosω c t (} 1). Where d (t) is the digital modulation signal,
Takes a value of +1 or -1. _{-cosω c t = cos (ω c} t +
(1) can also be written as

[0004] _{cos (ω c t + φ)} (2) digital code to be transmitted is typically binary, and takes a value of 0 or 1, phi when the digital code is 0 phi
= 0, and when the digital code is 1, φ = π. This is a two-phase PS that is often used for modem communication.
This is called K modulation. Signal when received at the receiving side this _{cos (ω c t + φ +} η) (3) where, eta is what is referred to as the initial reception phase. Demodulation of this received wave is performed using a conventional PSK demodulator, but the principle is referred to the section of QPSK modulation described later.

The direct sequence modulation method used in the spread spectrum communication method is performed by further modulating the PSK modulated wave of the equation (1) with another digital modulation signal p (t) having a frequency higher than d (t). , d (t) p (t ) cosω c t (4) is obtained as a result of the transmission signal. Here, p (t) takes a value of +1 or -1.
Received signal r at the receiver (t) is expressed when the initial reception phase and η r (t) = d ( t) p (t) cos (ω c t + η) and (5). It is easy to demodulate the signal r (t) that has been subjected to the direct sequence modulation expressed by the equation (5). Equation (5) multiplied by a digital modulated signal p (t) to r (t) p (t) = d (t) p 2 (t) cos (ω c t + η) = d (t) cos (ω c t + η) (6) Because p (t) = ± 1, so p ² (t) =
Because it becomes 1. The equation (6) is the same as the PSK signal of the equation (1) except for the initial reception phase η, and the transmitted digital code can be obtained by demodulating using the PSK demodulator which has been conventionally used.

In order to satisfy p ² (t) = 1, it is necessary to use the same digital modulated signal p (t) used on the transmitting side on the receiving side. Since any one known only to a specific transmitting side and a specific receiving side can be used as, the confidentiality of communication can be obtained.
Any digital modulation signal p (t) can be used, but a pseudo random code (PN) is used.
Also called ber (code) or M-sequence code, it has a period that is not completely random, but its period is very long, and when the code is converted into a binary number, there is almost no correlation between each bit, and a different code Codes with almost no correlation between) are used. The frequency of the digital modulation signal p (t) (maximum frequency of ± 1 change) is usually several hundreds to several thousand times the frequency of the digital code d (t). For this reason, the spectrum of the transmission signal expressed by the equation (4) spreads (spreads) and becomes strong against disturbance noise and crosstalk between channels. This fact is expressed by Equation (5) as Fourier.
You can understand it by converting. Alternatively, it can be understood if the pseudo-random code itself is a line spectrum but has a wide band.

Next, another four-phase spread spectrum communication system used in the spread spectrum communication system will be described. Since the principle of this 4-phase spread modulation demodulation is derived from the principle of QPSK (4-phase PSK) modulation and demodulation, the QPSK system will be described first. In the QPSK modulation method, the digital modulation signal d (t) to be transmitted is input as data to the S / P (serial-parallel converter) 10 in FIG.
_0, D _2, D ₄ , ... Only signals u _s (t) and odd-numbered bits D ₁ , D ₃ , D ₅ , ... Only signals u _c (t) are divided (FIG. 7). . u _s (t) is sent to one input of the multiplier 12, and u _c (t) is sent to one input of the multiplier 11. The transfer rates of u _s (t) and u _c (t) are just half the transfer rate of the data input to the serial-parallel converter 10. In the carrier wave generator 13, sin (ω ₁ t) is generated as a carrier wave and sent to the other input of the multiplier 12 as a first carrier wave, and at the same time, this signal is also sent to the phase shifter 14. In the phase shifter 14, the phase is shifted by π / 2 and the second carrier wave cos (ω ₁ t) is generated and sent to the other input of the multiplier 11. At the output of the multiplier 11, cos (ω ₁ t) u _c (t) called Q signal is obtained and sent to one input of the adder 15. At the output of the multiplier 12, sin (ω ₁ t) u _s (t) called I signal is obtained and sent to the other input of the adder 15. The output of the adder 15 is cos (ω ₁ t) u _c (t) + sin (ω called QPSK wave.
₁ t) u _s (t) is obtained, but this QPSK wave is transmitted.

U _s (t) and u _c (t) are signals having a value of ± 1. The carrier wave is the first carrier wave sin (ω ₁ t) and the second carrier wave.
Since there is a carrier wave cos (ω ₁ t), the phase of the QPSK wave is 4
There will be different types of states. Table 1 shows these four types of states. u _s (t) u _c (t) I + Q = QPSK wave 1 1 sin (ω ₁ t) + cos (ω ₁ t) = √2 sin (ω ₁ t + π / 4) -1 1 -sin (ω _{1 t) + cos (ω 1} t) = √2sin (ω 1 t + 3π / 4) -1 -1 -sin (ω 1 t) - cos (ω 1 t) = √2sin (ω 1 t-3π / 4) 1 1 sin (ω ₁ t)-cos (ω ₁ t) = √2 sin (ω ₁ t-π / 4) Table 1 As shown in Table 1, the QPSK wave has a phase of π / It can be described in four types of sine wave states: 4, 3π / 4, -3π / 4, and -π / 4. FIG. 8 shows the waveform of Table 1 as a waveform. Here, FIG. 8A shows a QPSK wave, and FIG. 8B shows u.
_s (t), Fig. 8C is u _c (t).

The QPSK wave thus obtained is transmitted, and the QPSK wave received at the receiving side can be expressed as follows. P ・ sin (ω ₁ t + χ (k) + η) (7) where χ (k), k = 0,1,2,3,4,5, .... is the modulation phase of the transmitted wave. π / 4, 3π / 4, -3π / 4 and -π / 4 are shown, and η is the initial reception phase. This received QPSK wave is supplied to one input of each of the multipliers 16 and 17 of FIG. In the reception sine wave generator 18, the frequency of the carrier wave is approximately equal to (ω
_{A 1} ≈ω ₂ ) sine wave sin (ω ₂ t) is generated and sent to the other input of the multiplier 17 and the input of the phase shifter 19. At the output of the phase shifter 19, the phase is shifted by π / 2,
s (ω ₂ t) is output and supplied to the other input of the multiplier 16. The output of the multiplier 16 is P ・ sin (ω ₁ t + χ (k) + η) cos (ω ₂ t) = P / 2 ・ {sin ((ω ₁ -ω ₂ ) t + χ (k) + η) + sin ((ω ₁ + ω ₂ ) t + χ (k) + η)} (8) is obtained, and the output of the multiplier 17 is P · sin (ω ₁ t + χ (k) + η ) sin (ω ₂ t) = P / 2 ・ {cos ((ω ₁ -ω ₂ ) t + χ (k) + η) -cos ((ω ₁ + ω ₂ ) t + χ (k) + η) } (9) is obtained. Since ω ₁ ≒ ω ₂ Since _{ω 1 -ω 2 "ω 1 +} ω 2 is satisfied, the frequency of high frequency by passing the formula (8) and each low pass filter 20 and 21 received QPSK wave of formula (9) the component of the sum of the removal, respectively the output of the low pass filter 20 and 21 Q _R-wave and I
What is referred to as the _R-wave is _{output: Q R = P / 2 ·} sin ((ω 1 -ω 2) t + χ (k) + η) (10) I R = P / 2 · cos ((ω 1 _{-ω 2) t + χ (k} ) + η) (11) these outputs Q _R-wave and I _R-wave are inputted to the respective determination unit 22. To simplify the handling of expressions, the expression (1
0) and equation (11) are rewritten as follows.

Q _R = A · sin θ (12) I _R = A · cos θ (13) where A = P / 2 θ = (ω ₁ −ω ₂ ) t + χ (k) + η. Equations (12) and (13) are vector A (A,
θ) can be regarded as the y component and the x component when expressed in polar coordinates, or can be regarded as the imaginary part and the real part on the complex plane. If χ (k) + η is constant (actually,
χ (k) is not constant because it takes a value of π / 4, 3 π / 4, -3π / 4 or -π / 4), but the vector A has a length A and a constant angular velocity around the origin. It becomes a vector rotating by ωd = ω ₁ -ω ₂ . The Q _R and I _R length A and phase angle θ of the vector A from the equation (12) and (13) are calculated by the following ^{_{calculation: (Q R 2 + I R}} 2) 1/2 = (A 2 sin ² θ + A ² cos ² θ) ^1/2 = (A ² (sin ² θ + cos ² θ)) ^1/2 = A (14) arctan (Q _R / I _R ) = arctan ((A sin θ) / (A cos θ )) = Arctan (tan θ) = θ (15) A and θ are calculated by algebraic calculation (four arithmetic operations of addition, subtraction, multiplication and division and square root calculation) based on Expressions (14) and (15).
Although there is an advantage that the required accuracy can be obtained, there is a drawback that the calculation hardware is large and the calculation time is long. Therefore, as in the present invention, a table lookup method is used when less precision is required. What is the table reference method? ROM (Read Only Memor)
This is a method that uses a memory such as y), uses variables as addresses, and stores corresponding values in memory and reads them when necessary. When in the above example, the value of the formula (14) or equation (15) from the data given Q _R and I _R A or θ is calculated and regarded the calculation result as an address Q _R and I _R leave reserve a memory location of the memory, the value of a or θ corresponding to the address Q _R and I _R optionally is read.

Frequency of receiving sine wave ω₂Ω₂= Ω₁
Control to satisfy Q_R= P / 2 ・ sin (χ (k) + η) (16) I_R= P / 2 · cos (χ (k) + η) (17) is a coherent method to find P / 2, χ (k) and η
Called (synchronous) detection, _d= Ω₁−ω₂Beet ingredient
Leaving ω_dAnd obtain P / 2, χ (k) and η.
The name is called noncoherent (quasi-synchronous) detection.
There is. Angular frequency difference ω_d= Ω₁−ω₂Is the data to communicate
· Rate (ie ω₁Or ω₂) Is smaller than
It is possible to design as a 4-phase PSK
-Q by rent detection_RWave and I_RThe waves are schematic in Figure 9.
As shown in_RData D1, D2, D included in the wave
3, ..., and I_RData D0, D2 included in the wave
The amplitude of D4, ... is the beat angular frequency ω_d= Ω₁−ω₂
It becomes a wavy shape. Figure 9 shows the data rate (ω₁
Or ω₂) And ω_dIs 16: 1.

The transmitted data is included in the received phase information χ (k). In other words, the phase information χ (k) itself is the transmission data. In the case of coherent detection, θ = χ (k) + η is calculated using equation (15), so in principle, the five phase angles θ ₀ , θ ₁ , ... ··· From θ ₄ , the following simultaneous five-dimensional linear equations θ ₀ = χ (0) + η θ ₁ = χ (1) + η θ ₂ = χ (2) + η θ ₃ = χ (3) + η θ ₄ = χ Using (4) + η, χ (0), χ (1), χ (2), χ (3), χ
(4) and η are calculated. Because χ (k) is π /
It is known that the values are 4,3π / 4, -3 π / 4 or -π / 4, and χ (0), χ (1), χ (2), χ (3) and χ (
This is because at least one set of the same items is included in 4), and the number of unknown variables is 5. Once η
If is obtained, then κ (k) = θ−η and k = 5,
Χ (k) for 6, 7, 8, ... Is calculated. In addition, χ (k) is π / 4, 3π / 4, -3π / 4 or
Since it is known to take a value of -π / 4, it can be used to correct the error such as η.

Similarly to the case where the direct sequence modulation waveform is obtained by further modulating the PSK modulation waveform with the pseudo random modulation signal,
The 4-phase spread modulation waveform is obtained by further modulating the QPSK modulation waveform with a pseudo random modulation signal. This is shown in FIG. FIG. 10A shows the bit position of PN (pseudo random code) or its data. This PN is N ₀ ~
Although it is composed of 7 bits of N ₆ , PN of hundreds to thousands of bits is actually used. One bit of this PN is sometimes called one chip in order to clearly distinguish it from one bit of transmitted / received data. However, if there is no risk of confusion with the data bit, the bit may be used as it is instead of the chip. With respect to the PN that takes 0 and 1, for example, 0 and +1 are associated and 1 and -1 are associated, so that a pseudo-random modulation signal is created. The pseudo-random modulation signal and I wave indicated QPSK modulated signal in FIG. 10B (u _s (t) wave) and is multiplied by in SS _I signal is obtained (FIG. 10D), the pseudo-random modulation signal and FIG. 1
Q wave (u _c (t) of the QPSK modulated signal shown in FIG.
Wave) and are multiplied to obtain the SS _Q signal (Fig. 10).
E). In FIGS. 10D and 10E, a bar with a bar above it indicates that it is inverted. Further, in FIG. 10, the carrier wave in the QPSK modulation is not considered in order to simplify the explanation. It is assumed that QPSK modulation and demodulation are performed according to the principles described above. The signal handled here is the signal before QPSK modulation, or QPSK
Consider the signal after demodulation.

On the receiving side, when the received waveform is demodulated, SS _I
And SS _Q are obtained, but it is necessary to synchronize with the phase of the received wave when demodulating. For this purpose, the receiving side generates the same reference pseudo-random modulated signal PN _R as the transmitting side,
Correlate with SS _I and SS _Q. This correlation is called autocorrelation because it is a correlation between pseudo-random modulation signals having different phases. If the phases match, the correlation will increase,
When the phases do not match, the correlation becomes smaller. As described above, since the pseudo random code has a small correlation between bits (chips) when converted into a binary number, PN _R
Preparative example the absolute value of the correlation when the SS _I is shifted over one chip is decreased, for example, -1 (FIG. 10
F). 1 if PN _R and SS _I match exactly
+ 1 + 1 + 1 + 1 + 1 + 1 = + 7 (FIG. 10H).
When PN _R and, for example, SS _I are advanced or delayed by half a chip, it is considered that the value becomes approximately +3, which is an intermediate value between −1 and +7 (FIGS. 10G and 10I). A graph of this correlation is shown in FIG. 10J. Therefore, the correlation between PN _R and SS _I is as large as possible (+7 in this example).
If you control the reception timing so that it is kept at a constant value,
Will be accurate SS _I and SS _Q is received.

Next, when the four-phase spread modulation signal is received, as shown in equations (12) and (13), D _K = P · cos (χ (k) + η) + jP · sin (χ) (k) + η) It is expressed by a complex number like (18). Expressions (12) and (13) are for QPSK modulation and demodulation, but in four-phase spread modulation, a QPSK-modulated waveform is modulated with a pseudo-random modulation signal having a higher frequency, and Since ± 1 which is a value taken by the modulation signal does not change, it can be said that in the four-phase spread modulation, the modulation frequency of the QPSK modulation is set to a high frequency of the pseudo random modulation signal and the carrier frequency (ω ₁ or ω ₂ ) is increased. In Expression (18), j is an imaginary unit. FIG. 11 shows a circuit configuration of a delay lock loop which has been conventionally used. The received waveform data D _k expressed by the equation (18) is supplied to one input of each of the multipliers 31, 32, and 33. In the shift register 40, the same demodulation pseudo-random code (assuming to take a value of ± 1) on the transmitting side is repeatedly shifted by two in the same sequence at a speed approximately twice the carrier frequency ω _1. There is. From the adjacent 3 bits of the shift register 40, a signal is extracted from the left by tapping a rate (late: slow signal), a center (center: signal without delay), and an early (early signal), Multipliers 33 and 3 respectively
It is fed to the other input of 2, and 31. In the multiplier 31, the received waveform data D _k and the early signal which is 1/2 chip earlier than the center signal are multiplied to obtain a correlation. The multiplier 32 multiplies the received waveform data D _k and the center signal by correlation. In the multiplier 33, the received waveform data D _k and the rate signal that is 1/2 chip slower than the center signal are multiplied to obtain a correlation. Shift register 40
Within the same, the same data are shifted as a set, and the shift clock is set to almost twice the carrier frequency, and
It is supplied from the (Voltage Controlled Oscillator) 39 for the purpose of obtaining the correlation with the pseudo random code for demodulation delayed by 1/2 chip (FIG. 12A).

The multiplication result for each bit of the multiplier 31 is supplied to a summing device 34, which sums all the bits (8 bits in this example) of one demodulation pseudo-random code, The resulting correlation vector A is sent to the + input of the delay lock loop control signal generator (subtractor) 37. The multiplication result for each bit of the multiplier 33 is the summation unit 3
6 and the summation of all the bits of one demodulation pseudo-random code is performed by the summation device 36, and the resulting correlation vector B is the − of the delay lock loop control signal generator (subtractor) 37. Sent to input. The multiplication result for each bit of the multiplier 32 is supplied to the summing device 35, and the summing device 35 sums up all the bits of one demodulation pseudo-random code, and the correlation vector C as the result is (received Correlation between waveform data and center signal) data is output. See FIG. 12A for the process of summing these three types of vectors. In the delay locked loop control signal generator 37, the difference AB between the absolute values of the two input vectors A and B is calculated and sent to the loop filter 38.
The loop filter 38 converts the input digital amount into an analog amount, cuts high frequency components, and outputs a voltage proportional to AB.

The digital output obtained at the output of the delay locked loop control signal generator 37 and the analog output obtained at the output of the loop filter 38 are shown in FIG. 12B. In the state where the reception synchronization is established, the adder 3 shown in FIG.
It is considered that the correlation vector A obtained at the output of 4 corresponds to the point a in FIG. 2, and the correlation vector B obtained at the output of the summer 36 in FIG. 11 corresponds to the point b in FIG. When the clock frequency from the VCO 39 becomes higher than the frequency at the time of synchronization from the state of receiving synchronization, the correlation vector A shifts to the left from the point a, and conversely when the clock frequency from the VCO 39 becomes lower than the frequency at the time of synchronization, It shifts to the right from point a. Therefore, the correlation vector A is monitored, and if it shifts to the left from the point a, the clock frequency of the VCO 39 is lowered,
If the clock frequency of the VCO 39 is controlled to increase to the right of the point a, the reception synchronization can be maintained. Similarly, when the clock frequency from the VCO 39 becomes higher than the frequency at the time of synchronization when the reception synchronization is achieved, the correlation vector B shifts to the left from the point b, and conversely, when the clock frequency from the VCO 39 becomes lower than the frequency at the time of synchronization. Vector B is shifted to the right from point b. Therefore, if the correlation vector B is monitored and the clock frequency of the VCO 39 is lowered if it shifts to the left from the point b, and the clock frequency of the VCO 39 increases if it shifts to the right from the point b, the reception synchronization can be maintained.

As shown in FIG. 10, the absolute value A of the correlation vector A and the absolute value B of the correlation vector B depend on the number of bits of the pseudo-random code and also on the transmission data. Alternatively, accurate control is difficult if the correlation vector B is monitored independently. Therefore, the difference A between the absolute value A of the correlation vector A and the absolute value B of the correlation vector B obtained at the output of the delay lock loop control signal generator 37.
-B is used. When the clock frequency of the VCO 39 becomes higher than the synchronizing frequency, A−B becomes negative, and VC becomes
When the clock frequency of O39 becomes lower than the frequency at the time of synchronization, AB becomes positive. Therefore, when A-B obtained at the output of the delay locked loop control signal generator 37 or the output of the loop filter 38 is positive, control is performed so as to increase the clock frequency of the VCO 39, and when A-B is negative, VCO3 is controlled.
If the clock frequency of 9 is controlled to be lowered, reception synchronization can be obtained.

The output voltage of the loop filter 38 is VCO3.
The transmission frequency of 9 is controlled, but as mentioned above, A
When -B> 0, it is controlled to increase the clock frequency of the VCO 39, and when AB <0, it is controlled to decrease the clock frequency of the VCO 39, so that A≈B (near point c in FIG. 12B) is always maintained. It is controlled so as to be kept and reception synchronization is established.

In order to enable the reception synchronization control as described above, AB must be between points d and e in FIG. 12B, but the operation for doing this is called initial pull-in.
This is performed using a matched filter or the like. It may overlap, but the above is summarized as follows. Receiving synchronization is required to properly receive the modulated pseudo-random code, and this receiving synchronization is demodulated by the received pseudo-random code and by the receiving side (of the same sequence as the pseudo-random code at the transmitting side). This is done by taking a correlation with the pseudo random code for use. That is, when the reception synchronization is established, the correlation becomes a constant value, and when the reception synchronization is lost, the correlation deviates from this constant value, so that the reception timing is controlled so that the correlation always takes this constant value.

In order to understand the meaning of the correlation between the received pseudo random code and the demodulating pseudo random code generated on the receiving side, consider the autocorrelation characteristic of the pseudo random code.
The autocorrelation of the pseudo-random code means a correlation between the generated original signal of the pseudo-random code and a delayed signal obtained by multiplying the original signal by a time delay. FIG. 2 shows the autocorrelation characteristics of the pseudo random code. In the figure, the horizontal axis represents the delay time between the original signal and the delayed signal, and the vertical axis represents the autocorrelation value.

At t = t ₀ (delay time is 0), since the original signal and the delayed signal are completely synchronized, a correlation value of C is shown. When t ≧ t ₂ or t ≦ t ₋₂ , the original signal and the delayed signal are 1 chip (1 chip is 1 of pseudo random code).
Since it is shifted by more than the time corresponding to the bit), a small correlation value D is shown. When the delay time changes from 0 to 1 chip, the correlation value also decreases from C to D, but the delay time is -1.
If the correlation value at the time of / 2 chip (t = t _-1 ) is A and the correlation value at the delay time of 1/2 chip (t = t ₁ ) is B, then A = B holds.

The correlation between the modulated pseudo random code received by the receiving side and the demodulating pseudo random code generated by the receiving side is a real number component because the received pseudo random signal is QPSK modulated. It is represented as a vector with an imaginary component. When this correlation is designated as a correlation vector and is denoted as A, the real number component and the imaginary number component of A become A cos θ and As in θ, respectively (FIG. 3). Here, A is the absolute value of the correlation vector A, and θ is the sum of the modulation phase and the initial reception phase.

The correlation between the modulated pseudo-random code received by the receiving side and the demodulating pseudo-random code generated by the receiving side and advanced by ½ chip is called an early signal correlation vector, and is referred to as A again. The correlation between the modulated pseudo-random code received by the receiving side and the demodulating pseudo-random code generated by the receiving side and delayed by 1/2 chip is called a delay signal correlation vector, and is referred to as B again. As described above, at this time, the reception synchronization between the received pseudo random code and the demodulation pseudo random code without delay generated on the receiving side is synchronized when A = B. If ≠ B, it means that the synchronization is lost. Therefore, if A-B is calculated and the reception timing (timing of generation of the demodulation pseudo-random code) is controlled so that this value is always 0, synchronized reception is possible.

In the above description, the delay between the received pseudo-random code and the demodulating pseudo-random code is ± 1/2 chip, but this is ± n / 2, n = 1, 2, 3, ...・ It can be Figure 5 shows a digital delay locked loop
Shown in. The spread spectrum modulated signal (described as P in the figure) received in FIG. 13 is input to one input terminal of each of the multipliers 51, 52, 53 and 54. Reception sine wave generator 70
Is output to the other input terminal of the multipliers 51 and 53. The outputs of the multipliers 51 and 53 are sent to A / D converters 55 and 57, respectively, for A / D conversion, and the respective digital outputs are sent to one input terminal of the multipliers 59 and 61. The output of the reception sine wave generator 70 is also sent to the phase shifter 71, the phase of the sine wave is shifted by π / 2 and converted into a cosine wave, and the result is input to the other input terminals of the multipliers 52 and 54. Is entered. The outputs of the multipliers 52 and 54 are sent to A / D converters 56 and 58, respectively, where
The converted and output digital outputs are sent to one input terminals of the multipliers 60 and 62.

To the other input terminals of the multipliers 59 and 60, a 1/2 chip early demodulation pseudo-random code is input from the shift register 69. Multipliers 61 and 62
The other input terminal of the shift register 69 is input with a 1/2 chip slow demodulation pseudo random code. In the multipliers 59, 60, 61 and 62, the respective input signals are correlated with each other, and the respective outputs have the sine component Asin θ of the early signal correlation vector, the cosine component A cos θ of the early signal correlation vector, and the delayed signal correlation vector of the delayed signal correlation vector. The sine component Bsinθ and the cosine component Bcosθ of the delay signal correlation vector are output, and are respectively stored in the ROM.
63 x input terminal, ROM 63 y input terminal, ROM 6
4 and an y input terminal of the ROM 64. The ROMs 63 and 64 are ROMs for calculating functions, and data (x and y for simplicity) from the data input to the two input terminals x and y are converted into (x ²
+ Y ² ) ^1/2 is calculated and the result is output to the output terminal z. To be more specific, these R
The OM uses the input terminals x and y as address terminals (for example, x
To the higher address and y to the lower address), at the memory location addressed by x and y (x
² + y ² ) ^1/2 should be stored.

In FIG. 5, the imaginary number component Asin θ of the early signal correlation vector A is respectively input to the x and y input terminals of the ROM 63.
And the real number component Acos θ are input, and (A ² sin ² θ + A ² cos ² θ) ^1/2 = (A ² (sin ² θ + cos ² θ)) ^1/2 = (A ² ) ^1/2 at the output terminal z. = A is output. Similarly, the imaginary component Bsin of the delayed signal correlation vector B is applied to the x and y input terminals of the ROM 64, respectively.
θ and the real number component Bcos θ are input, and B is output to the output terminal z. The absolute value A of the early signal correlation vector and the absolute value B of the delayed signal correlation vector obtained from the ROM 63 and the ROM 64 are input to the + input terminal and the − input terminal of the subtractor 65, respectively. The difference AB between the absolute values of the two correlation vectors is output to the output of the subtractor 65. This difference A
-B is low-pass filtered by the digital loop filter 66 and sent to the D / A converter 67. The digital-analog conversion is performed by the D / A converter 67, and the converted signal is sent to the VCO 68. VC
In O68, the shift register 69 according to the voltage input
Is adjusted so that the output from the D / A converter 67 becomes 0, that is, the received pseudo random code and demodulation pseudo random code are synchronized.

[0028]

As described above, in the conventional generator, one ROM is required for each numerical operation of A and B, and two ROMs in total are required, and the hardware becomes large. ing. In addition, the number of wirings has increased accordingly. The object of the present invention is to use R used in numerical operations.
Another object of the present invention is to provide a delay locked loop having a control signal generator in which the number of OMs is reduced and the number of wirings is reduced accordingly.

[0029]

According to the present invention, a correlation (early signal correlation vector) between a pseudo random code advanced by a predetermined phase with respect to a demodulation pseudo random code and a received spread spectrum signal, and the demodulation pseudo random code. On the other hand, the correlation (delay signal correlation vector) between the pseudo random code delayed by the predetermined phase and the received spread spectrum signal is obtained, and the correlation difference between the magnitude of the early signal correlation vector and the magnitude of the delayed signal correlation vector is controlled. In a delay lock loop of a spread spectrum receiving device, which is operated by a signal generator, and which controls the phase of the demodulation pseudo random code according to the operation result to maintain synchronization with the pseudo random code of the received spread spectrum signal, The control signal generator includes a real number component of the early signal correlation vector and a delayed signal correlation vector of the delayed signal correlation vector. Means for calculating a real number difference with the number component, means for calculating an imaginary number difference between the imaginary number component of the early signal correlation vector and the imaginary number component of the delay signal correlation vector, and the correlation from the real number difference and the imaginary number difference And means for computing the difference.

[0030]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. As shown in FIG. 1, the control signal generator, which is the main part of the delay locked loop of the present invention, is composed of one numerical operation ROM 4 and two subtractors 5 and 6. The absolute value | Asin θ | of the imaginary component of the early signal correlation vector A is input to the + terminal of the subtractor 5, and the absolute value | B sin θ | of the imaginary component of the delayed signal correlation vector B is input to the − terminal of the subtractor 5. Then, | Asin θ | − | B sin θ | = (A−B) | sin θ | (19) is obtained at the output, and this output is supplied to the x input terminal of the ROM 4. The positive signal correlation vector A is applied to the + terminal of the subtractor 6.
Of the delay signal correlation vector B is input to the minus terminal of the subtracter 6.
| Is input, and | Acos θ | − | B cos θ | = (AB) | cos θ | (20) is obtained at the output, and this output is supplied to the y input terminal of the ROM 4. Since the ROM 4 has a configuration and a function which are completely equivalent to those of the ROM 1 or 2 shown in FIG. 4, the output terminal z of the ROM 4 has ((AB) ² sin ² θ + (AB) ² cos ² θ). ^1/2 = (( ^AB ) ² ) ^1/2 = | ^AB | (21) is obtained. The one shown in the equation (21) has an absolute value, and what is finally required is AB. The determination of this code is the same as the code of the equation (19) introduced to the x input terminal of the ROM 4 except θ = nπ, n = 0, 1, 2, ..., And θ = (n + 1/2 ) Π, n = 0, 1,
It is the same as the sign of the equation (20) introduced to the y input terminal of the ROM 4 except 2 ,. Therefore, as shown in FIG. 4, the x data and the y data can be collected and the sign of the equation (21) can be determined from the relationship between the sizes of x and y. That is,
When a straight line of y = −x that passes through the origin and divides the second quadrant and the fourth quadrant is considered, the sign is positive in the upper right area and the sign is negative in the lower left area. The ROM 4 may be provided with a code so that the code including x and y is input to the ROM 4 and the value including the code of AB is output.
In FIG. 1, all the data input to the subtractor 5 and the subtractor 6 are absolute values, but the circuit for realizing this is not shown in FIG. 1 because it is easy. This invention is 2
It can be applied to reception of a signal in which phase PSK, 4-phase PSK, 8-phase PSK, etc. are spread spectrum.

[0031]

According to the delay locked loop of the present invention,
The number of ROMs used for numerical calculation is reduced, and the number of wirings is reduced accordingly.

[Brief description of drawings]

FIG. 1 is a block diagram showing a control signal generator which is a main part of a delay locked loop according to the present invention.

FIG. 2 is a diagram showing an autocorrelation characteristic of a pseudo random code.

FIG. 3 is a diagram showing a correlation vector.

FIG. 4 is a diagram showing the principle of code determination.

FIG. 5 is a block diagram showing a conventional delay locked loop.

FIG. 6 is a diagram showing generation and detection of a QPSK wave.

FIG. 7 is a diagram showing a conversion principle by a serial-parallel converter.

FIG. 8 is a diagram showing four kinds of states taken by a QPSK wave.

FIG. 9 is a diagram showing beats of a received signal at the time of non-coherent (quasi-synchronous) detection.

FIG. 10 is a diagram showing the principle of a four-phase diffusion method.

FIG. 11 is a block diagram of a delay locked loop.

FIG. 12 is a diagram showing the principle of a delay locked loop.

Claims (1)

[Claims] 1. A correlation (early signal correlation vector) between a pseudo random code advanced by a predetermined phase and a received spread spectrum signal with respect to the demodulation pseudo random code, and delayed by the predetermined phase with respect to the demodulation pseudo random code. The correlation (delayed signal correlation vector) between the pseudo random code and the received spread spectrum signal is obtained, and the correlation difference between the magnitude of these early signal correlation vector and the magnitude of the delayed signal correlation vector is calculated by the control signal generator. In the delay lock loop of the spread spectrum receiving device for controlling the phase of the demodulation pseudo random code according to the calculation result to maintain synchronization with the pseudo random code of the received spread spectrum signal, the control signal generator is Calculates the real difference between the real number component of the early signal correlation vector and the above real number component of the delayed signal correlation vector Means for calculating the imaginary difference between the imaginary component of the early signal correlation vector and the imaginary component of the delayed signal correlation vector, and means for calculating the correlation difference from the real difference and the imaginary difference, A delay lock loop of a spread spectrum receiver characterized by being provided.