JPH0677139A - Plasma processing device - Google Patents

Abstract

PURPOSE:To improve temperature accuracy and mass-produce high quality semiconductor devices by providing a plurality of plasma reacting furnaces arranged in parallel in a common room so as to successively laminate a plurality of films on a substrate and permitting the degree of vacuum in the common room to be higher than the degree of vacuum in the reacting furnace. CONSTITUTION:A first reacting system 1 is provided with a first room 7, and a substrate and a holder 4 reciprocate between a reacting furnace 1 and the first room 7 by a shifting mechanism 12 provided in the first room 7. In the same manner, a second reacting furnace 42 and a third reacting furnace 43 are provided with shifting mechanisms 29 and 41. A common room 7 is provided for the first, second and third rooms and a first and a second preliminary rooms 8 and 35 are provided at the front entrance and rear exit of the common room so as not to introduce oxygen and water in the air into the reacting system. Since the manufacturing device takes the substrate into the vacuum common room 7 from the reacting furnace for each reaction, the vacuum degree in the common room is controlled to be higher than the vacuum degree in the reacting furnace in order to prevent reactive gas of each reacting system from entering into the reacting furnace.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a manufacturing apparatus for producing a stable and reproducible laminated coating film in large quantities by a plasma vapor phase method (hereinafter referred to as PCVD) utilizing glow or arc discharge.

The present invention relates to a PCVD apparatus, a substrate having a surface to be formed, and a substrate on which the jig is not provided in a reaction cylinder into which a reactive gas in a plasma vapor phase method is introduced in a reaction system. Holder (eg quartz boat)
The present invention relates to a manufacturing apparatus for forming a semiconductor film having a uniform film thickness by introducing only gas and making a reactive gas a laminar flow (laminar flow), and further, forming a semiconductor film with less variation in film quality within and between batches.

[0003]

2. Description of the Related Art Generally, in a PCVD apparatus, when a silane gas or a silicon halide gas, which is a reactive gas containing silicon as a main component, which has a particularly strong reactive power, is used, it is adsorbed on the inner wall of a reaction tube such as a quartz glass tube and a holder. Oxygen (air) and water react with the silicide gas to form silicon oxide (lower silicon oxide), which deteriorates the conductivity as a semiconductor.

In order to prevent the introduction of such oxygen and moisture into the reaction furnace, the present invention provides a chamber having a mechanism for holding or moving the substrate and the substrate holder, which is connected to the reaction tube,
The present invention relates to a manufacturing device that has improved productivity and reproducibility of characteristics.

Further, the present invention comprises electrodes so that a plasma discharge electric field is applied parallel to (along) the substrate surface, and active reactive products are formed by vertically impinging on the surface to be formed. Another purpose is to prevent the characteristics of the semiconductor film from being deteriorated.

In order to prevent the sputtering (damage) on the formation surface, for example, a P-type semiconductor layer is provided on the formation surface and an I-type (intrinsic or substantially intrinsic) semiconductor layer is formed on the upper surface thereof. When, the impurities forming the P-type are 10 ¹⁷ to 10 ¹⁸
A concentration of cm ⁻³ is mixed in the I layer, which deteriorates the PI junction. The present invention is presented to prevent such drawbacks. Further, the present invention provides a first reaction system comprising the above-mentioned reaction system, a first chamber connected to the first reaction system, a second chamber connected to the first chamber, and a second chamber connected to the first chamber. The present invention relates to a manufacturing apparatus provided with a second reaction system similar to the first reaction system connected to the chamber.

In such a manufacturing apparatus, first, a substrate and a holder are inserted into a first reaction furnace by a moving mechanism in an atmosphere in which oxygen and moisture are removed by vacuuming in the first chamber, and then the reaction furnace is inserted into the first reaction furnace. As a result, a semiconductor having one conductivity type, for example, P-type conductivity is formed. Further, the substrate on which the semiconductor is formed is again drawn out to the first chamber, and further moved to the second chamber connected to the first chamber in the same vacuum without oxygen and moisture. Further, the substrate and the holder are introduced into the second reactor from the second chamber, and the second semiconductor layer is formed with a conductivity type different from that in the first chamber or a different additive or a different concentration (impurity or additive) thereof. Can be formed on the first semiconductor layer.

At this time, since impurities attached to the inner wall of the first reaction furnace are not attached at the time of forming the second semiconductor layer, the conductivity is very high and the conductivity or E
It has become possible to control g (energy band width) and the like.

Further, according to the present invention, there are provided three independent reactors, which are connected to each other in a common chamber, that is, a first chamber, a second chamber and a third chamber.
In particular, a P-type semiconductor layer is formed in the first reaction furnace, an I-type semiconductor layer is formed in the second reaction furnace, and an N-type semiconductor layer is further formed in the third reaction furnace. This is particularly effective when manufacturing a conversion device.

According to the present invention, the reactors are arranged according to the order of the films to be laminated through a chamber common to the number of layers to be laminated, so that the number of stages is not only two or three but four to ten. can do.

Thus, PIN, PINPIN, PINI
A junction structure such as PIN, NIPIN, PINIP, ... Can be formed.

When the semiconductor layer is manufactured, carbon or germanium is added to an IV-valent element such as silicon,
By controlling the amount of addition, it is possible to provide the optical energy band width (Eg) proportional to the amount of addition and corresponding. For example, PIN junction is Egp, Egi, Egn
(Egp> Egi ≦ Egn) W-N-W (wide E
g-small Eg-wide Eg).

In addition, in the PINPIN structure in which two PIN junctions are further stacked, Egp ₁ and Egi
₁ , Egn ₁ , Egp ₂ , Egi ₂ , Egn ₂ (Egp
₁ > Egn ₁ ≧ Egi ₁ ≧ Egp ₂ ≧ Egi ₂ ≧ Egn
₂ ), Egp ₁ (2.0 to 2.4 eV), E
gn ₁ (1.7 to 2.1 eV) is converted into Si _x C _1-x (0 <x
<1), Egi ₁ , Egp ₁ (1.6 to 1.8 eV) by Si, Egi ₂ , Egn ₂ (1.0 to 1.5 eV)
V) can be provided as Si _x Ge _1-x (0 <x <1). To form such a tandem structure, six reaction systems may be provided.

Also, MI with NIP or PIN junction
There are two reaction systems for S-FET and bipolar transistor, and N or P is formed on the substrate by the first reaction system.
A layer can be returned to the next I layer by the second reaction system, and the substrate holder can be returned to the first reaction system to form a third N or P layer in a three-layer structure in two systems. It is possible.

The purpose of these inventions is not to connect the reaction furnaces to each other, but to connect independent reaction systems to a common chamber and form an independent semiconductor layer on the substrate through the chambers. There is.

Conventionally, as for the PCVD apparatus, there is known a method in which capacitive coupling electrodes are provided on the upper and lower parallel flat plates, the substrate is placed on one of the electrodes, for example, the lower cathode electrode, and heating is performed from below. There is. However, in this method, since the reaction furnace has one chamber, if the P-type, I-type, and N-type semiconductor layers are not stacked, the impurities in the N-type semiconductor layer after the first production will be the second one. It was mixed in the P-type semiconductor layer in the step of (2), became a recombination center and deteriorated the diode characteristics, and further the characteristics were completely dispersed. Therefore, even if an attempt was made to make a photoelectric conversion device, only the release voltage Voc of 0.2 to 0.6 V was obtained, and the short-circuit current could only flow a few mA / cm ² .

In addition, in this parallel plate type apparatus,
Since the electric field is in the direction perpendicular to the surface of the substrate, even if the I layer is formed after the P type layer, impurities in the P layer are easily mixed in the I layer, and the diode characteristics often do not appear.

Further, since this reactor does not have a preliminary chamber, oxygen and moisture are adsorbed by adsorbing oxygen and moisture on the inner wall of the reaction furnace every time it is manufactured so as to expose it to the atmosphere (air). Exists in the background level during the reaction, the electric conductivity is 10 ^-11 to 10 ^-8 (Ωc in terms of dark conductivity).
m) ^-1 , photoconductivity at AM1 is also 10 ^-6 to 10 ^-4 (Ωc)
m) It was only ^-1 . However, in the present invention using the device in which the adsorbate is not present at all, the dark conductivity is 10 ⁻⁶ to
The photoconductivity at 10 ⁻⁴ and AM1 is 1 × 10 ^{−3 to} 9 × 10.
^It was as high as ^-2 (Ωcm) ^-1 , about 100 times higher, and was able to have semiconductor properties.

[0019]

DISCLOSURE OF THE INVENTION The present invention is a PC of a parallel plate type one-chamber reaction furnace, which has been widely used as described above.
It is intended to eliminate all the drawbacks of the VD device.

Further, as a further improved version of this conventional system, an independent separation type reaction device filed by the present inventor is known. This device is manufactured by "Semiconductor device manufacturing method" December 10, 1978 (Japanese Patent Application No. 53-152887) and its divisional application "Semiconductor device manufacturing method" (Japanese Patent Application No. 56-56).
-055608). further,
"Coating method" August 16, 1979 (Japanese Patent Application No. 54-
The details are also described in 104452).

According to these inventions, for example, when a diode having a PIN junction is to be manufactured, a first reaction system for a P-type semiconductor layer, a second reaction system for an I-type semiconductor, and an N-type reaction system.
The third reaction system for the type semiconductor layer is formed by connecting the respective reaction furnaces (bell jars) with a gate valve. By doing so, the impurities of the P layer are not mixed in the I layer, and the impurities of the N layer are not mixed in the I layer and the P layer. It is characterized in that the so-called semiconductor layers can be completely and accurately controlled. Further, a preliminary chamber is provided in front of the P layer reactor or after the N layer reactor to prevent so-called oxygen and water vapor from entering from the outside.

However, the temperature control of the substrate cannot be sufficiently performed in such a system in which the vertical bell jar type or the modified reaction furnaces thereof which are invented by the present inventor are connected to each other.
That is, it had a temperature range of about 300 ± 20 ° C. For this reason, there is a large variation in the formed film,
Not good. In addition, the number of substrates that can be filled in one reaction furnace was, for example, 1 to 10 square 10 × 10 cm. For this reason, the productivity was extremely low, and it could not be said that it was a so-called low price and mass production.

[0023]

The present invention further improves the independence type semiconductor device manufacturing apparatus of the present inventor, the temperature accuracy is suppressed to 300 ± 1 ° C. or less, and the loading quantity per loading is 50. It is intended to manufacture a large amount of low-priced, high-quality semiconductor devices capable of producing ~ 500 pieces.

The plasma processing apparatus according to the present invention is arranged in parallel with the common chamber capable of depressurizing and the common chamber corresponding to the laminated formation of the coating, and each of the common chambers is hermetically connected via the gate valve means. A plurality of plasma reaction furnaces, a means for loading and unloading a substrate in the common chamber to and from each of the plurality of plasma reaction furnaces, a means for forming a film in each of the plurality of plasma reaction furnaces, and the substrate Moving the substrate in one direction along the plurality of plasma reactors in the common chamber to sequentially form the plurality of coatings on top of each other;
A mechanism for transferring the substrate from one of the carrying-in / carrying-out means to the other is provided, and the degree of vacuum in the common chamber is higher than the degree of vacuum in the plurality of plasma reactors.

Further, in the plasma processing apparatus according to the present invention, the degree of vacuum in the common chamber is 0.001 to 0.01 to.
rr, the degree of vacuum in the plurality of plasma reactors is 0.0
It is configured to be 5 to 0.6 torr.

[0026]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 shows an outline of a horizontal type, independent separation type plasma CVD apparatus of the present invention, that is, a semiconductor device manufacturing apparatus.

In the drawing, the first reaction system (1) is a cylindrical reaction tube (5), for example, transparent quartz (which may be alumina or other ceramic), and its diameter is 100 to 300 m.
mφ. Further, a pair of electrodes (2) and (2 ') for performing plasma discharge were arranged outside the reaction furnace (5). This electrode is made of, for example, stainless steel, and a resistance heater (3) is provided to cover the electrode, and the indicated temperature 5
It is controlled with an accuracy of ± 1 ° C. for 0 to 350 ° C., for example 300 ° C.

The substrate and the substrate holder are abbreviated as (4), and the reactive gas is supplied from (6) through the homogenizer (26). The pair of electrodes receives high frequency (10 KHz to 100 MHz, typically 13.
56 MHz) with a strength of 5 to 200 W. Unnecessary products after the reaction and carrier gases such as helium and hydrogen are discharged from the exhaust port (63) through the pressure adjusting valve (14) in the reaction tube by the vacuum pump (15).

The reaction pressure of the reaction tube (5) is 0.0 during the reaction.
It was maintained at 5 to 0.6 torr, typically 0.3 torr, and the effective flow velocity of the reactive gas was increased to several tens m / sec.

In addition to the first reactor, a first chamber (7) having a moving mechanism (12) on the inlet side in the drawing, in which a substrate and a holder (4) are inserted into or pulled out of the reactor. Is provided.

When this chamber is at atmospheric pressure, high-purity air is supplied from (14), and ventilation is performed by a rotary pump (37) through a valve (39) at 0.01 torr or less, preferably 0.001 to 0. A vacuum is drawn at 0.01 torr. The substrate and the holder (11) are moved from the preparatory chamber (8), and the first preparatory chamber (8) is (1
Air was introduced from 3) to atmospheric pressure, and vacuuming was performed by the valve (40) and the pump (38) to make a sufficiently low vacuum of approximately equal pressure to the chamber 1 (7). Then, the substrate and the holder (10) are transferred to the holder (11). further,
This holder (11) was transferred to the first reaction furnace (4) and a predetermined semiconductor film was formed on the substrate.

Further, after forming this film, the substrate and the holder (4) reach the common chamber (7), and the one to be taken out can be taken out from the preliminary chamber (35).

When a semiconductor layer is to be formed on this, the shutter (32) in the common chamber (7) is opened and moved to the second chamber (30). This shutter (3
2) and the shutter (33) in the next stage are not always necessary, and in that case, a plurality of common chambers are continuously provided in the reaction furnace. Still further, the substrate and holder are transferred to the second reaction system (42) and the second semiconductor layer (eg I
Layers) could be independently laminated regardless of the history of forming the first semiconductor layer (eg P layer).

Also in this second reactor, the reactive gas is introduced through the reactive gas inlet port (27), and the carrier gas and impurities are discharged to the outside through the exhaust port, the valve (19) and the vacuum pump (20). To be done.

Further, after the second semiconductor film is formed, it may be taken out through the second preliminary chamber (35), but in this drawing, the third reaction system (43) is further added. After that, a third semiconductor layer, for example, an N-layer semiconductor layer is formed, and the substrate and the holder (34) on which the three layers are formed are passed through a second preliminary chamber (35) that is evacuated, and then an air pipe ( After being brought to atmospheric pressure by introducing air from 13), it is taken out to the outside by opening the gate valve (36).

As is clear from the above outline, in the present invention, the first reaction system has the first chamber, and the moving mechanism (12) provided in this chamber causes the substrate and the holder (4) to move to the reactor ( Reciprocates between 1) and the first chamber (7).

Similarly, the second reactor (42), the third reactor
The reactor (43), the substrate and holder holding and moving mechanisms (29) and (41).

The first, second and third chambers are commonly provided as a common chamber (7), and first and second auxiliary chambers are provided with air on the inlet side and the outlet side before and after the common chamber. Oxygen inside,
It is provided so that water does not enter the reaction system.

In this manufacturing apparatus, since each reaction is drawn out from the reaction furnace to the common chamber (7) which is evacuated once, the reactive gas of each reaction system must be completely mixed into each reaction furnace. There is no. In order to ensure this point, the degree of vacuum in the common chamber may be controlled to be higher than the degree of vacuum in the reaction furnace. Specifically, the degree of vacuum in the common chamber is 0.00
The degree of vacuum in the reaction furnace is 0.05 to 1 to 0.01 torr.
It is preferably maintained at ˜0.6 torr.

In particular, when the substrate is taken in and out, the gate gate valves (52), (53) between each reaction furnace and the common chamber,
(54) is opened, and the substrate and holder (11) are set to (1
Since the threshold valve is completely closed except when it is moved to the position 1 ') (11 "), each reaction system shown by the inventor in the conventional description is one gate valve. The auto-doping of impurities was further reduced as compared with the case of being connected by.

In addition, in the above description, the substrate holder moved each reaction chamber together with the substrate. However, this movement is performed only for the substrate, and the holders are arranged so that the holder (11) for the first reaction furnace, the holder (11 ') for the second reaction furnace, and the holder (11 ") for the third reaction furnace are exclusively arranged. In the manufacturing apparatus of the present invention, it is possible to completely remove the mixing of impurities between the reaction chambers, especially the mixing of the PN type or Eg varying impurities and additives adhering to the holder surface. It is possible, and it is a completely epoch-making thing for mass production.

FIG. 2 complements the manufacturing apparatus of FIG. That is, the reactive gas supplied to the first, second and third reaction furnaces is the supply system (6), (27), (28).
Supplied by each. The reactive gas is shown in FIG.
It is shown corresponding to (A), (B) and (C).

In FIG. 2A, diborane (43) diluted with hydrogen, a gas for etching the inner wall of the silane (44) reactor such as CF ₄ (O ₂ = 0 to 5%) or NF ₃ ,
Reactive gas in which silicon, which is an additive of carbide, and carbon are combined, such as TMS (tetramethylsilane Si (C
H ₃ ) ₄ ) (46) and carrier gas hydrogen or helium (47) are arranged.

These are flow meters (mass flow meters) (5
0), first through the electromagnetic valve (51) from the supply system (6)
Is supplied to the reactor. In this case, Si _x C _1-x (0.
2 ≦ x ≦ 1), and the conductivity type is P type. As a result, a non-single-crystal semiconductor having a P-type amorphous or semi-amorphous structure having an Eg of 1.7 to 2.5 eV was formed on the substrate to a thickness of 100 to 300 A.

The preparation of the coating film is described in detail in a patent application filed by the present inventor (“Plasma vapor phase method”, October 14, 1981, Japanese Patent Application No. 56-103627), for example, 250 to 330. ℃ especially 300 ℃ 0.1-0.3tor
r Plasma generation current 13.56 MHz 5 to 100 W Film formation time was 10 seconds to 10 minutes. The inner wall of the reactor is 5 to 3
Since a flake (thin piece) is generated when it is manufactured 0 times, in such a case, it may be removed by plasma etching with CF ₄ or NF ₃ . FIG. 2B shows a case where a non-single-crystal semiconductor film formed of an amorphous I layer or a semi-amorphous or micropolycrystal containing microcrystallites having a size of 5 to 100 A is manufactured.

That is, silane (45) CF ₄ (O ₂ =
0-5%), helium (49), which is a carrier gas, and silane diluted with helium to 5-20% has a photoconductivity of 1 × 10 ^{−3 to} 9 × 10 ⁻² (Ωcm) ⁻¹ , particularly A non-single-crystal silicon semiconductor having a value of 5 to 20 × 10 ⁻³ (Ωcm) ⁻¹ was manufactured to a thickness of 0.4 to 1 μm.

Contrary to (A), FIG. 2 (C) shows N-type impurities such as phosphine (48), silane (43), etching gas (45), TMS (46) and carrier gas (40). And an N-type semiconductor layer of 100 to 500 A was prepared.

Thus, the PIN on the substrate as shown in FIG.
A type diode or photoelectric conversion device was made and its characteristics were investigated.

In FIG. 3A, a P-type semiconductor layer (71) and an I-type semiconductor layer (72) are provided on a metal substrate such as stainless steel or a substrate (70) having a stainless film formed on a flexible film such as Kapton. ), A semiconductor layer (73) made of an N-type semiconductor layer (74) is prepared, and a transparent transparent conductive film such as ITO is provided on the upper surface of the semiconductor layer (73) at 600 to 800 A,
ρs = 10 to 25Ω / □ was prepared. The conventional one-chamber parallel plate type has an AM1 (100 mW / cm ² ) of 6 to
Although only 7.5% / 3 × 3 mm square was obtained, in the independent separation type of the vertical mold, which was filed by the present inventor,
7.5-9.5% / 3 x 3 mm squares were obtained. However, in the present invention, when the holder is made independent of each reactor, a solar cell with a high conversion efficiency of up to 16% / 3 × 3 mm square, generally 12 to 15%, can be manufactured.

Further, when the holder is common to all reactors,
The efficiency was as high as 9.0 to 12.5%.

This is because an oxide gas such as oxygen and water is prevented from being mixed in from the outside, and impurities are prevented from being mixed into the surface of each semiconductor.

More importantly, 50 to 500 10 × 10 cm square substrates can be loaded in one batch, and the equipment cancellation cost for one 10 × 10 cm square is 50 to 500 yen, which is the conventional cost. What
It was extremely important for the spread of the photoelectric conversion device in that it could be reduced to 0.2 to 2 yen, about 1/100.

FIG. 3B shows a transparent substrate (7) such as glass.
6) ITO (500-800A) (78) and tin oxide or antimony oxide (79) (100-300) on
The P-type semiconductor layer (7) is formed on the transparent conductive film (77) of A) having a low sheet resistance (ρ ₃ = 5 to 20 Ω / □ high heat resistance).
1), an I-type layer (72), an N-type layer (74) and a back electrode (75) made of aluminum or ITO. Even in this structure, the conversion efficiency is 10 to 13.
I was able to get%.

For this reason, when this structure is integrated on a glass substrate and a PIN type backflow prevention diode is provided at the same time to obtain the same output as a conventional solar cell, the area is half that of the conventional one. Price is 200-250
Decrease the circle to 20-30 yen, and use 1 in an area of 10 cm ^2.
It is possible to make it for 100 yen.

FIG. 4 shows the relationship between the substrate, the electrodes and the loading of the substrate which are arranged in the reaction furnace using the glow discharge method in the plasma CVD method of the present invention.

In the drawing, FIG. 4A shows an electrode (2),
(2 ') was provided in parallel with the horizontal direction, the back surfaces of the substrates (61) were in close contact with each other, and the front surfaces were provided at intervals of 20 to 40 mm between the substrates. The arrangement is also horizontal.

The reaction tube (5) of the reaction furnace (1) has a diameter of 100.
~ 300 mmφ typically has 180 mmφ and its length is 200-400 cm, so 10 × 10 cm
Instead of 8 sheets as shown in the drawing, 20 sheets for each step are placed on a square substrate.
It was possible to arrange 0 to 30 rows. For this reason, it is possible to manufacture 50 to 600 sheets in one manufacturing batch, and it is possible to manufacture a semiconductor device at once in an amount that cannot be considered by the conventional parallel plate system.

In FIG. 4B, the electrodes (2) and (2 ') are provided in the vertical direction, the front surface (formation surface) of the substrate (61) is provided in the vertical direction, and the back surfaces thereof are in close contact with each other. is there. Others are the same as in (A). The loading of the substrate on the holder may be performed by alternately performing (A) and (B).

FIG. 4C shows a plasma CVD method using an arc discharge method or a glow discharge method.

The drawing shows one reactor of FIG. 1 (A). That is, it has discharge electrodes (2) and (2 ') in the reaction tube direction, the substrate (61) is loaded on the holder (60), and the heater (3) for heating is provided outside the reaction tube (5). ing. To make arc discharge, thermoelectrons were emitted from one electrode. The reactive gas is introduced from the supply system (6), and unnecessary reactive products and carrier gas are discharged to the outside from the discharge system (63). Since this unnecessary reaction product becomes powdery in the region where the temperature becomes low, the heater (3) reacts as shown in (65) in order to prevent generation of these in the reaction furnace (5) (inner wall). I tried to cover all of the tubes.

By doing so, the powdery reaction product was not left in the reaction tube, and the yield was improved. The same applies to FIG. 1 and FIGS. 1 and 4 (A) and 4 (B), which is further useful for improving productivity.

[0063]

As is clear from the above description, the present invention adopts a horizontal reaction system which enables mass production in comparison with the plasma vapor phase method, and further has a common chamber for the continuous reaction system. This made it possible to combine the batch system and the continuous system. Therefore, based on this idea, two reaction systems, 4 to 8 reaction systems, etc. could be made, and for the first time a system capable of mass production with a PCVD apparatus could be developed.

Furthermore, in this semiconductor manufacturing apparatus, not only the PIN photoelectric conversion device but also N (N-type semiconductor) (0.1 to 1 μ) -I (intrinsic semiconductor) (0.2 to 2)
[mu] -I (insulator) (0.5 to 1 [mu]) IGFET (vertical channel type insulated gate field effect semiconductor device) or a structure in which it is integrated can be manufactured. Furthermore, in this reaction furnace, a width of 2 to 20 cm, 50 to 1
It is also possible to dispose a semiconductor substrate having a long length of 00 cm and fabricate a photosensor array or other semiconductor device on the entire upper surface thereof. As described above, it is believed that the engineering effect of the semiconductor manufacturing apparatus of the present invention is extremely remarkable.

[Brief description of drawings]

FIG. 1 shows an embodiment of a semiconductor device manufacturing apparatus of the present invention.

FIG. 2 shows an example of a gas system of a reactive gas that supplements FIG.

FIG. 3 shows a vertical sectional view of a photoelectric conversion device made according to the present invention.

4 is an example showing a portion of the reaction furnace of FIG. 1. FIG.

[Explanation of symbols]

 3 Heater 4 Substrate Holder 5 Reactor 12 Moving Mechanism 13 Power Supply 33 Shutter 37 Rotary Pump

Claims (2)

[Claims] 1. A common chamber capable of decompressing, and a plurality of plasma reactors arranged in parallel to the common chamber corresponding to the stacking of coatings and airtightly connected to the common chamber via gate valve means. A means for loading and unloading the substrate in the common chamber with respect to each of the plurality of plasma reaction furnaces, and means for forming a film in each of the plurality of plasma reaction furnaces,
In order to sequentially form the plurality of coating films on the substrate, the substrate is moved in one direction along the plurality of plasma reactors in the common chamber, and the substrate is transferred from one of the loading / unloading means to the other. The plasma processing apparatus is characterized in that the vacuum degree in the common chamber is higher than the vacuum degree in the plurality of plasma reaction furnaces. 2. The degree of vacuum in the common chamber is 0.001 to
The plasma processing apparatus according to claim 1, wherein the degree of vacuum in the plurality of plasma reactors is set to 0.05 to 0.6 torr at 0.01 torr.