JPH0674908A - Support device for verification of semiconductor mask pattern - Google Patents

Abstract

PURPOSE:To make it possible to retrieve only rear error data by providing a psuedo-error data processing part storing data recognized as a psuedo-error in a psuedo-error data storing part as psuedo-error data. CONSTITUTION:A comparing unit 12 compares the error data extracted by an error data extraction unit with the psuedo-error data extracted of a psuedo- error data extraction part 11. A psuedo-error part deleting unit 13 deletes that corresponding to the psuedo-error data from error data on the basis of the comparison results by the comparing unit 12. An error data forming unit 14 forms error data by only real error data which is obtained through elimination of the psuedo-error data by the erasing unit 13 and it is sent to a retrieving unit. A psuedo-error renewing unit 15 stores the error data in a psuedo-error data storing unit 10 as a new psuedo-error data when recognition is made as a psuedo error.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor mask pattern verification support device for supporting error correction processing of mask pattern data of a semiconductor integrated circuit.

[0002]

2. Description of the Related Art FIG. 8 is a functional block diagram showing a conventional semiconductor mask pattern verification support device. In the figure, reference numeral 1 denotes an error data storage unit in which error data of a mask pattern of a semiconductor integrated circuit whose width, interval, etc. have been verified by a mask pattern data verification device (not shown) is stored. Reference numeral 2 is an input unit for inputting an error cell name designating a search target in the error data stored in the error data storage unit 1, and 3 corresponds to the error cell name input from the input unit 2. An error data extraction unit that extracts error data that is an error search target from the error data storage unit 1. 4 is the error data extraction unit 3
Reference numeral 5 denotes a search unit for individually searching for error locations in the error data extracted in step 5, and reference numeral 5 denotes an enlarged display unit for processing enlarged display of the error data retrieved by this search unit. Reference numeral 6 is an identification unit that confirms and corrects the error location retrieved by the retrieval unit to identify the type of error, and determines whether to erase / hold error data, and 7 is an error to be erased by this identification unit. The error erasing unit erases the error data when it is determined to be.

Next, the operation will be described. Here, FIG.
Each functional block shown in is implemented by software in a computer system including a processor and a memory, for example, and FIG. 9 is a flowchart showing the flow of the operation. First, in step ST1, from the error data stored in the error data storage unit 1 after the width, interval, etc. have been verified by the mask pattern verification device, the error cell name of the error data targeted for error search is input from the input unit 2. To do. Next, in ST2, first, the error data extraction unit 3 extracts error data to be subjected to error search from the error data storage unit based on the error cell name of the error data input from the input unit 2, and the search unit 4 Search the extracted error data individually. Next step ST
In 3, the error data retrieved by the retrieval unit 4 is sent to the enlarged display unit 5 and enlarged and displayed on the mask pattern input device (not shown). Then, in step ST4, the identification unit 6 detects the enlarged error data.
After confirming and correcting with, the type of error is identified and the error data is erased or held. Next, in step ST5, it is determined whether or not to move to the search for the next error data, and if "Yes", the process proceeds to step ST2.
Then, the process up to step ST4 is repeated. If "No", the process proceeds to the next step ST6, and the error erasing unit 7 erases the error data.

[0004]

Since the conventional semiconductor mask pattern verification support device is constructed as described above, no pseudo error is dealt with. Therefore, regarding an error recognized as a pseudo error, There is a problem that it is necessary to make individual corrections so that an error does not occur, which hinders the correction work when the designer corrects the mask pattern data.

The inventions set forth in claims 1 and 2 have been made in order to solve the above-mentioned problems. When searching for an error in a mask pattern of a semiconductor integrated circuit, error data recognized as a pseudo error is It is an object of the present invention to obtain a semiconductor mask pattern verification support device that can automatically search and retrieve only true error data.

The invention according to claim 2 further comprises:
An object of the present invention is to obtain a semiconductor mask pattern verification support device capable of displaying a list of current processing states.

[0007]

A semiconductor mask pattern verification support apparatus according to a first aspect of the present invention extracts pseudo error data corresponding to error data to be subjected to error retrieval from a pseudo error data storage unit. , Compare the pseudo error data with the error data to be searched for errors, delete the error data corresponding to the pseudo error data to create error data based only on the true error data, and output the error data to the search unit. At the same time, a pseudo error data processing unit for storing error data newly recognized as a pseudo error in the mask pattern data correction process as pseudo error data in the pseudo error data storage unit is provided.

Further, the semiconductor mask pattern verification support apparatus according to the second aspect of the present invention extracts the placement information of the subordinate data of the mask pattern having a hierarchical structure, and extracts the error from the pseudo error data storage unit. Pseudo error data corresponding to the lower layer data to be searched is arranged based on the arrangement information, and pseudo error data corresponding to the mask pattern data to be corrected is created, and the pseudo error data is targeted for error search. Add to the pseudo error data corresponding to the mask pattern data to be corrected and compare it with the error data to be searched for error, and output the true error data created to the search section to generate new pseudo error data. A pseudo error data processing unit for storing in the pseudo error data storage unit is provided.

Further, the semiconductor mask pattern verification support apparatus according to the third aspect of the present invention includes a total error number extraction unit for extracting the total number of error portions of error data to be subjected to error search, and a pseudo error data storage unit. A file output unit that outputs a file based on the information obtained from the new pseudo error number extraction unit that newly stores the number of pseudo error locations of the pseudo error data, for each mask pattern data to be corrected, and at that time The screen display section for displaying the correction processing state in (3) on the basis of the file output from the file output section is provided.

[0010]

According to the first aspect of the present invention, the pseudo data processing section stores the location recognized as the pseudo error in the pseudo error data storage section, and the error location of the error data to be searched for the error and the pseudo location. By comparing the pseudo error data extracted from the error data, the search for the error part recognized as the pseudo error is omitted, and only the true error part can be searched.

Further, the pseudo error data processing section in the invention according to claim 2 corrects when the mask pattern data has a hierarchical structure and the pseudo error data corresponding to the mask pattern data under the hierarchy exists. The pseudo error data corresponding to the mask pattern data under the hierarchy is reflected in the pseudo error data corresponding to the target mask pattern data, and the error data targeted for error search is compared with the pseudo error data. As a result, the search for error data determined to be a pseudo error is omitted, and only true error data can be searched for.

Further, the file output unit in the invention according to claim 3 is such that the total number of error locations of error data to be subjected to error search and the pseudo error location of the pseudo error data newly stored in the pseudo error data storage section. By outputting a file based on the information such as the number of each of the mask pattern data to be corrected, it is possible to display a list of processing states of error correction of the mask pattern data up to the present time.

[0013]

【Example】

Example 1. Embodiment 1 of the present invention will be described below with reference to the drawings. FIG. 1 is a functional block diagram showing an embodiment of the invention described in claim 1. In the figure, 1 is an error data storage unit, 2 is an input unit, 3 is an error data extraction unit, 4 is a search unit, 5 is an enlarged display unit, 6 is an identification unit, and 7 is an error erasing unit. Since they are the same as or equivalent to those of the conventional ones denoted by the reference numerals, detailed description thereof will be omitted. Reference numeral 8 compares the pseudo error data extracted by the error data extraction unit 3 with the error data targeted for error search, creates error data based only on true error data in which the corresponding error data has been deleted, and outputs the error data to the search unit 4, The pseudo error data processing unit stores error data newly recognized as a pseudo error in the process of correcting the mask pattern data in the built-in pseudo error data storage unit as pseudo error data.

FIG. 2 is a functional block diagram showing the internal configuration of the pseudo error data processing unit 8. In the figure, 1
Reference numeral 0 denotes the pseudo error data storage unit that stores what is determined as a pseudo error in the error data as pseudo error data, and 11 denotes the pseudo error data storage unit 1
It is a pseudo error data extraction unit that extracts pseudo error data corresponding to error data to be an error search target from 0. Reference numeral 12 is a comparison unit for comparing the error data extracted by the error data extraction unit 3 with the pseudo error data extracted by the pseudo error data extraction unit 11. Reference numeral 13 is a pseudo error location erasing section for erasing, from the error data, one corresponding to the pseudo error data based on the comparison result by the comparison section 12, and 14 is a pseudo error location erasing section for erasing the pseudo error. This is an error data creation unit that creates error data based on only true error data from which data has been removed and sends it to the search unit 4. Reference numeral 15 denotes a pseudo error data update unit that stores the error data as new pseudo error data in the pseudo error data storage unit 10 when the error type is identified by the identification unit 6 and the error is newly recognized. is there.

Next, the operation will be described. Here, FIG.
3 is a flowchart showing the flow of the operation. In this embodiment, as in the conventional case, the program based on the flowchart of FIG. 3 is stored in the memory, and the processor operates according to the program, so that FIG. Functions of each block shown in FIG. 2 are realized.

First, in step ST11, an error cell name is input using the input unit 2. Further, in step ST12, it is selected whether or not the pseudo error data corresponding to the error cell name input in step ST11 is extracted from the pseudo error data storage unit 10. If “Yes”, the process proceeds to the next step ST13. , “No”, the process proceeds to step ST16 described later. In step ST13,
The pseudo error data extracted by the pseudo error data extraction unit 11 and the error data extracted by the error data extraction unit 3 from the error data storage unit 1 are sent to the comparison unit 12 and overlapped with each other, and a Boolean operation process is performed to perform both of them. Compare. Next, in step ST14, the pseudo error location erasing unit 1
At 3, the error data corresponding to the pseudo error data is erased. Then, in step ST15, the error data creating unit 14 creates true error data excluding the pseudo error data. If "No" is selected in step ST12, the processes in steps ST13 to ST15 are not executed.

Next, in step ST16, the retrieval unit 4
Searches for error locations in the error data one by one and enlarges the error locations found in step ST17 on the mask pattern input device using the enlargement display unit 5.
Then, in step ST18, the identification unit 6 confirms and corrects the enlarged error location to identify the type of error, recognizes it as a true error, and erases the error, or newly creates a pseudo error. Select whether to recognize as an error and store it in the pseudo error data, or to hold it. Next, in step ST19, it is selected whether to search for the next error location. If "Yes" is selected here, the process returns to step ST16, and the processes up to step ST18 are repeated in the same manner. Moreover, step ST1
When "No" is selected in 9, the process proceeds to step ST20, and the error erasing unit 7 is used to erase the error data identified as the true error in step ST18. afterwards,
In step ST22, the identification unit 6 determines in step ST1.
The error data identified as a pseudo error in 8 is sent to the pseudo error data updating unit 15 of the pseudo error data processing unit 8,
The pseudo error data update unit 15 adds it to the pseudo error data storage unit 10 as new pseudo error data.

Example 2. In the first embodiment described above, the case where the mask pattern data stored in the semiconductor integrated memory does not have a particular hierarchical structure has been described, but the present invention is also applicable to a case where the mask pattern data has a hierarchical structure. FIG. 4 is a functional block diagram showing the internal configuration of the pseudo error data processing unit 8 in one embodiment of such an invention as set forth in claim 2, and the same or corresponding parts to those in FIG. And its description is omitted. In the figure, 16 is an arrangement information extraction unit for extracting arrangement information of hierarchical data of a mask pattern having a hierarchical structure, and 17 is an error search from pseudo error data stored in the pseudo error data storage unit 10. Is a lower layer pseudo error data extraction unit that extracts pseudo error data corresponding to the target lower layer data. The pseudo error data 18 corresponds to the mask pattern data to be corrected by arranging the pseudo error data extracted by the hierarchical lower pseudo error data extracting unit 17 based on the layout information extracted by the layout information extracting unit 16. Is a pseudo error data creation unit that creates
Reference numeral 19 indicates addition of pseudo error data corresponding to the mask pattern data of the correction target, which is the error search target, extracted from the pseudo error data storage unit 10 to the pseudo error data created by this pseudo error data creation unit. This is a pseudo error data addition unit that executes the data and sends it to the comparison unit 12.

Next, the operation will be described. Here, FIG.
Is a flowchart showing the flow of the operation of the semiconductor mask pattern verification support device including the pseudo error data processing unit 8 configured as described above. The flowchart shown in FIG. 3 extracts pseudo error data of upper data. Only step ST31, step ST32 for extracting pseudo error data of lower hierarchy data, step ST33 for extracting arrangement information of lower hierarchy data, and step ST34 for creating pseudo error data of higher order data are different.
Therefore, only those parts will be described below, and the other parts will be given the same step numbers as those in FIG. 3 and the description thereof will be omitted.

First, in step ST31, if the mask pattern data to be corrected has a hierarchical structure, a selection is made as to whether or not to search for pseudo error data corresponding to the mask pattern data to be corrected, and "Yes". ”
In the case of, the process proceeds to step ST31, and in the case of “No”, the process directly proceeds to step ST16 without performing the pseudo error processing. Next, in step ST32, it is selected whether or not to search the pseudo error data corresponding to the subordinate hierarchical data of the mask pattern data to be corrected. If “Yes”, the process proceeds to step ST33, and if “No”, Goes directly to step ST13 without performing the pseudo error processing on the pseudo error data of the mask pattern data under the hierarchy. Next, in step ST33, the arrangement information extraction unit 16 is used to extract arrangement information of the mask pattern data below the layer of the mask pattern data to be corrected, for example, information such as coordinates, presence / absence of rotation, and presence / absence of inversion.

Then, in step ST34, the pseudo error data extraction unit 17 extracts pseudo error data corresponding to the mask pattern data under the hierarchy from the pseudo error data storage unit 10. Then step ST3
According to the arrangement information extracted by the arrangement information extracting unit 16 in 3,
The pseudo error data creating unit 18 creates pseudo error data corresponding to the mask pattern data, and arranges the pseudo error data of the mask pattern data under the hierarchy in the mask pattern data to be corrected according to the arrangement information. The information of the pseudo error data of the multi-pattern data is reflected. Thereafter, the pseudo error data adding unit 19 extracts from the pseudo error data storage unit 10 to the pseudo error data of the mask pattern data to be corrected, which reflects the information of the mask pattern data under the hierarchy in the pseudo error data creating unit 18. Then, the pseudo error data of the correction target mask pattern corresponding to the error data to be subjected to the error search is added, and it is sent to the comparison unit 12.

Example 3. Next, a third embodiment of the present invention will be described with reference to the drawings. FIG. 6 is a functional configuration diagram showing an embodiment of the invention described in claim 3, and the same or corresponding parts as in FIG. 1 are designated by the same reference numerals to avoid duplication of description.
In the figure, reference numeral 20 is an error data storage unit 3 which extracts the total number of error locations of error data extracted from the error data storage unit 1 and which is to be subjected to error retrieval, and sends the total number of errors to the pseudo error data processing unit 8. 21 is a pseudo error for extracting the total number of pseudo error locations of the pseudo error data corresponding to the mask pattern data to be corrected, which is extracted from the pseudo error data storage section of the pseudo error data processing section 8. It is a number extraction unit. Reference numeral 22 is an erasing error number extraction unit that extracts the number of error locations determined to be true errors when the identification unit 6 confirms that the error data has been corrected. This is a new pseudo error number extraction unit that extracts the number of pseudo error portions of the pseudo error data determined to be pseudo errors.

Further, 24 is based on the extraction results of the total error number extraction unit 20, the pseudo error number extraction unit 21, the erasure error number extraction unit 22, and the new pseudo error number extraction unit 23.
Total number of error points, error processing number, pseudo error processing number,
A file output unit that outputs the remaining error amount and the like in a list format for each mask pattern data to be corrected. 25 searches the file output by the file output unit 24 for a file corresponding to the mask pattern data to be corrected, and displays it on the mask pattern input device.
It is a screen display unit for displaying the content on the screen.

Next, the operation will be described. Here, FIG.
Is a flow chart showing a flow of the operation of the semiconductor mask pattern verification support device configured as described above, and is different from the flow chart shown in FIG. 3 in step ST41 for extracting the total number of error locations and step ST42 for extracting the number of pseudo error locations. , Step ST43 for extracting the number of error locations recognized as true errors, step ST44 for extracting the number of error locations recognized as pseudo errors, total number of error locations, error processing count, pseudo error processing count, error remaining Step ST45 for outputting a file such as quantity, and step ST46 for displaying the screen of the data output as a file.
Only differ. Therefore, hereinafter, only those portions will be described, and the other portions will be given the same step numbers as those in FIG. 3 and the description thereof will be omitted.

First, in step ST41, the error total number extraction unit 20 extracts the total number of error portions of the error data extracted from the error data storage unit 1 by the error data extraction unit 3 and is a pseudo error. The data is passed to the data processing unit 8, and the process proceeds to step ST12. Also,
In step ST42, the total number of pseudo error locations of the pseudo error data corresponding to the mask pattern data, which is the correction target extracted from the pseudo error data storage section in the pseudo error data processing section 8 by the pseudo error number extraction section 21. Is extracted and passed to the search unit 4, and the process proceeds to step ST15. Further, in step ST43, the erasure error number extraction unit 22 extracts the number of error portions determined to be a true error when correcting and confirming the error data by the recognition of the error type by the identification unit 6 in step ST18, Next, in step ST44, the new pseudo error number extraction unit 23 extracts the number of error locations recognized as pseudo errors when correcting and checking the error data by the recognition of the error type by the identification unit 6 in step ST18. do. Next, in step ST45, the file output unit 24 outputs the results extracted in steps ST41, ST42, ST43, and ST43 in the form of a list for each mask pattern data to be corrected. In step ST46, the screen display unit 25 searches the file output from the file output unit 24 in step ST45 for a file corresponding to the mask pattern data to be corrected, and displays the contents on the screen on the mask pattern input device. To do.

[0026]

As described above, according to the invention described in claim 1, in the error correction of the mask pattern data,
Store the error data judged as pseudo error as pseudo error data, extract the above pseudo error data when re-correcting the error of the mask pattern data, and do not search the error data recognized as pseudo error or enlarge it. Since it is configured as described above, it is possible to search only the true error portion, and there is an effect that the work efficiency of the confirmation of the mask pattern verification result and the correction of the mask pattern data can be improved.

According to the second aspect of the invention, the pseudo error data corresponding to the mask pattern data to be corrected is further reflected in the pseudo error data corresponding to the mask pattern data to be corrected. Therefore, even if the mask pattern data has a hierarchical structure, it is possible to search only for the true error portion, and it is possible to improve the work efficiency of confirming the mask pattern verification result and correcting the mask pattern data. effective.

Further, according to the invention described in claim 3, since the information obtained from each extraction unit is further outputted as a file for each mask pattern data to be corrected and displayed on the screen, the present time is up to the present. There is an effect that the processing status of error correction of the mask pattern data can be displayed in a list.

[Brief description of drawings]

FIG. 1 is a functional configuration diagram showing a first embodiment of the present invention.

FIG. 2 is a functional configuration diagram showing an internal configuration of a pseudo error data processing unit in the above embodiment.

FIG. 3 is a flowchart showing a flow of operations of the above embodiment.

FIG. 4 is a functional configuration diagram showing an internal configuration of a pseudo error data processing unit according to the second embodiment of the present invention.

FIG. 5 is a flowchart showing a flow of operations of the above embodiment.

FIG. 6 is a functional configuration diagram showing a third embodiment of the present invention.

FIG. 7 is a flowchart showing a flow of operations of the above embodiment.

FIG. 8 is a functional configuration diagram showing a conventional semiconductor mask pattern verification support device.

FIG. 9 is a flowchart showing the flow of the operation.

[Explanation of symbols]

 1 Error Data Storage Section 3 Error Data Extraction Section 4 Search Section 6 Identification Section 8 Pseudo Error Data Processing Section 10 Pseudo Error Data Storage Section 11 Pseudo Error Data Extraction Section 12 Comparison Section 13 Pseudo Error Location Erasure Section 14 Error Data Creation Section 15 Pseudo Error data update unit 16 Layout information extraction unit 17 Hierarchical pseudo error data extraction unit 18 Pseudo error data creation unit 19 Pseudo error data addition unit 20 Total error extraction unit 23 New pseudo error number extraction unit 24 File output unit 25 Screen display unit

Claims (3)

[Claims] 1. An error data extraction unit for extracting error data to be subjected to an error search from an error data storage unit that stores error data whose width and interval of a mask pattern are verified, and the error data extraction unit. A search unit that searches for an error location in the error data extracted in 1. and an identification unit that confirms and corrects the error location searched by the search unit and identifies the type of error In the semiconductor mask pattern verification support device, a pseudo error corresponding to the error data to be searched for from the pseudo error data storage unit that stores what is determined as a pseudo error in the error data as pseudo error data. A pseudo error data extraction unit for extracting data, the error data extracted by the error data extraction unit, and the pseudo error data A comparison unit that compares the pseudo error data extracted by the data extraction unit, and a pseudo error location erasing unit that erases the pseudo error data corresponding to the pseudo error data in the error data based on the comparison result by the comparison unit, An error data creation unit that creates error data only with the true error data from which the pseudo error data has been removed by the pseudo error location deletion unit and sends it to the search unit, and a new pseudo error as a result of the identification by the identification unit. A semiconductor mask pattern verification support device comprising a pseudo error data processing unit having a pseudo error data updating unit for storing the error data as pseudo error data in the pseudo error data storage unit when recognized. 2. A pseudo error data extraction unit in the pseudo error data processing unit, a placement information extraction unit for extracting placement information of hierarchical data of the mask pattern having a hierarchical structure, and the pseudo error data storage unit. From the pseudo-error data stored in the sub-hierarchical pseudo-error data extraction unit that extracts pseudo-error data corresponding to the sub-hierarchical data that is an error search target, and the placement extracted by the placement information extraction unit. A pseudo error data creation unit that creates pseudo error data corresponding to the mask pattern data to be corrected by arranging the pseudo error data extracted by the pseudo error data extraction unit below the hierarchy based on the information; The pseudo error data created by the data creation unit is stored in the error data extracted from the pseudo error data storage unit. 2. The semiconductor mask pattern verification according to claim 1, wherein pseudo error data corresponding to the mask pattern data of the correction target to be searched is added and replaced as a pseudo error data addition unit to be sent to the comparison unit. Support device. 3. An error total number extraction unit for extracting the total number of error locations of error data to be searched for errors extracted from the error data storage unit, and a pseudo error data storage unit of the pseudo error data processing unit are newly added. A new pseudo-error number extraction unit that extracts the number of pseudo-error points of the pseudo-error data stored in, and a file based on the information obtained from the total error number extraction unit and the new pseudo-error number extraction unit is set as a mask to be corrected. A file output unit that creates and outputs each pattern data, and a screen display unit that displays the correction processing state at the time based on the file output from the file output unit are provided. Item 3. The semiconductor mask pattern verification support device according to Item 1 or 2.