JPH0673373B2 - Method of manufacturing contact type one-dimensional image element - Google Patents

Method of manufacturing contact type one-dimensional image element

Info

Publication number
JPH0673373B2
JPH0673373B2 JP60174525A JP17452585A JPH0673373B2 JP H0673373 B2 JPH0673373 B2 JP H0673373B2 JP 60174525 A JP60174525 A JP 60174525A JP 17452585 A JP17452585 A JP 17452585A JP H0673373 B2 JPH0673373 B2 JP H0673373B2
Authority
JP
Japan
Prior art keywords
film
forming
dimensional image
wiring
contact type
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP60174525A
Other languages
Japanese (ja)
Other versions
JPS6233455A (en
Inventor
敏 西垣
隆介 喜多
修平 土本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP60174525A priority Critical patent/JPH0673373B2/en
Priority to DE3626504A priority patent/DE3626504C2/en
Priority to GB8619160A priority patent/GB2180399B/en
Priority to US06/894,051 priority patent/US4766085A/en
Publication of JPS6233455A publication Critical patent/JPS6233455A/en
Publication of JPH0673373B2 publication Critical patent/JPH0673373B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Description

【発明の詳細な説明】 <産業上の利用分野> 本発明はCdを含むII−VI族化合物半導体もしくはこれら
のうち二種以上の化合物半導体を含む光導電材料を光電
変換膜として備え、実時間型読み取り方式、マトリック
ス配線駆動を採用した密着型一次元イメージ素子の製造
方法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION <Industrial field of application> The present invention is provided with a II-VI group compound semiconductor containing Cd or a photoconductive material containing two or more kinds of these compound semiconductors as a photoelectric conversion film. The present invention relates to a method for manufacturing a contact type one-dimensional image device that employs a pattern reading method and matrix wiring driving.

<従来の技術> 長尺あるいは大面積な光電変換膜の作製方法として、従
来より真空蒸着法,スパッタ法あるいはグロー放電気相
成長法等の薄膜作製技術が用いられている。
<Prior Art> As a method for producing a long or large-area photoelectric conversion film, a thin film production technique such as a vacuum vapor deposition method, a sputtering method or a glow discharge vapor deposition method has been conventionally used.

また、このような薄膜作製技術を用いて作製された光電
変換膜を用いた素子の耐環境性向上のために各種有機樹
脂膜あるいは無機絶縁膜等による光電変換膜の保護がな
されている。
Further, in order to improve the environment resistance of an element using a photoelectric conversion film manufactured by using such a thin film manufacturing technique, the photoelectric conversion film is protected by various organic resin films or inorganic insulating films.

<発明が解決しようとする問題点> 上記従来の薄膜作製技術においては膜の特性の良否は製
造装置の製作技術に大きく依存し、歩留り、信頼性の点
で問題がある。たとえば反応性スパッタ法あるいはグロ
ー放電気相成長法等により非晶質シリコン薄膜を作製す
る場合、グロー放電プラズマの制御に高度な技術を必要
とし、再現性,膜特性の均一性を得る事が困難となる。
<Problems to be Solved by the Invention> In the above-described conventional thin film manufacturing technique, the quality of the film characteristics depends largely on the manufacturing technique of the manufacturing apparatus, and there are problems in yield and reliability. For example, when an amorphous silicon thin film is formed by the reactive sputtering method or the glow discharge vapor phase growth method, it is difficult to obtain the reproducibility and the uniformity of the film characteristics because the advanced technology is required to control the glow discharge plasma. Becomes

また、Cdを含むII−VI族化合物半導体薄膜をスパッタ法
あるいは真空蒸着法等によって作製する場合には、化学
量論的組成からのずれが作製条件によって微妙に変化
し、光導電性附与のためのCd,CuあるいはAg等のハロゲ
ン化合物のドーピングによる活性化処理も作製条件によ
り再現性が得がたいという大きな欠点を有する。
Further, when a II-VI group compound semiconductor thin film containing Cd is produced by a sputtering method, a vacuum deposition method, or the like, the deviation from the stoichiometric composition slightly changes depending on the production conditions, and the photoconductivity Therefore, the activation treatment by doping with a halogen compound such as Cd, Cu, or Ag also has a major drawback that it is difficult to obtain reproducibility depending on the manufacturing conditions.

また、従来の素子作製方法においては、素子の保護膜形
成のためのプロセスが余分に必要となるため、コスト高
となる等の問題点があった。
Further, in the conventional element manufacturing method, an additional process for forming a protective film for the element is required, which causes a problem such as an increase in cost.

本発明はこのような点にかんがみて創案されたもので、
素子作製のプロセスを簡素化するとともに、素子作製の
歩留りの向上を可能にした密着型一次元イメージ素子の
製造方法を提供することを目的としている。
The present invention was created in view of these points,
It is an object of the present invention to provide a method for manufacturing a contact type one-dimensional image device, which simplifies the process of manufacturing the device and improves the yield of device manufacturing.

<問題点を解決するための手段> 上記の目的を達成するため、本発明の密着型一次元イメ
ージ素子の製造方法は、Cdを含むII−VI族化合物半導体
単体あるいはこれらのうち二種以上の化合物半導体で構
成される受光素子とマトリックス配線部が同一の基板に
具備された密着型一次元イメージ素子において、マトリ
ックス配線形成のための層間絶縁層を上記受光素子部を
覆うように形成するように構成している。
<Means for Solving the Problems> In order to achieve the above object, the method for producing a contact type one-dimensional image device of the present invention comprises a Cd-containing II-VI group compound semiconductor single substance or two or more of these. In a contact type one-dimensional image device in which a light receiving element composed of a compound semiconductor and a matrix wiring section are provided on the same substrate, an interlayer insulating layer for forming a matrix wiring is formed so as to cover the light receiving element section. I am configuring.

<作用> 上記のように本発明では、Cdを含むII−VI族化合物半導
体単体あるいはこれらの二種以上の化合物半導体で構成
される受光素子をマトリックス配線形成部と同一基板に
作製することにより、マトリックス配線形成のための層
間絶縁膜を同時に受光素子を構成する光電変換膜の保護
膜としても兼ねさせるようになしているため、素子の製
造プロセスが簡素化され、しかも実施例として、この層
間絶縁膜として絶縁性高分子膜を用いることにより、保
護膜及び層間絶縁膜のピンホールの発生等による欠陥を
極力減少させ、素子作製の歩留りの向上がはかられる。
<Operation> As described above, in the present invention, by manufacturing a light receiving element composed of a II-VI group compound semiconductor containing Cd or a compound semiconductor of two or more kinds of these on the same substrate as the matrix wiring forming portion, Since the interlayer insulating film for forming the matrix wiring also serves as a protective film for the photoelectric conversion film forming the light receiving element at the same time, the manufacturing process of the element is simplified, and as an example, the interlayer insulating film is formed. By using the insulating polymer film as the film, defects due to the generation of pinholes in the protective film and the interlayer insulating film can be reduced as much as possible, and the yield of device fabrication can be improved.

上記した本発明の素子作製プロセスにより、多層配線形
成のための層間絶縁膜の形成によって光電変換膜の保護
膜形成工程を素子作製工程の初期に完了するため、後工
程におけるスルーホール形成,配線微細加工工程等に於
ける各種エッチャントによる受光素子特性への影響を完
全に除去することが可能となり、素子特性の信頼性を大
幅に向上させることができる。
By the device manufacturing process of the present invention described above, the protective film forming process of the photoelectric conversion film is completed at the beginning of the device manufacturing process by forming the interlayer insulating film for forming the multi-layer wiring. It is possible to completely eliminate the influence of various etchants on the light-receiving element characteristics in the processing steps, etc., and it is possible to greatly improve the reliability of the element characteristics.

また、有機高分子材料は誘電率が無機絶縁材料に比べて
小さく、かつ5〜10μmの厚膜が容易に形成可能である
ので実施例のように層間絶縁膜として絶縁性高分子膜を
用いることにより、多層配線部の容量を小さくおさえる
ことが可能となり、素子の高速駆動に際し何ら支障とな
らないマトリックス配線を形成することができる。更
に、無機絶縁材料では形成が困難な厚膜が有機高分子材
料では容易に形成が可能であるので、ピンホールの発生
防止が容易となり、素子作製の歩留り向上,低コスト化
が実現される。
In addition, since the organic polymer material has a smaller dielectric constant than the inorganic insulating material and a thick film of 5 to 10 μm can be easily formed, the insulating polymer film should be used as the interlayer insulating film as in the embodiment. As a result, it is possible to reduce the capacitance of the multilayer wiring portion, and it is possible to form a matrix wiring that does not hinder the high speed driving of the device. Furthermore, since a thick film that is difficult to form with an inorganic insulating material can be easily formed with an organic polymer material, it is easy to prevent pinholes from occurring, and the yield of device fabrication is improved and the cost is reduced.

<実施例> 以下、本発明の実施例を図面を参照して詳細に説明す
る。
<Example> Hereinafter, an example of the present invention will be described in detail with reference to the drawings.

Cdを含むII−VI族化合物半導体もしくはこれらのうち2
種以上の化合物半導体材料は、公知の化学的折出法によ
り得られる0.2μm程度の生粉にCucl2および/あるいは
AgCl2を0.1〜1モル%不純物として添加したものを不活
性ガス中で600〜800℃で30〜60分間焼成し活性化処理を
施すことにより光導電性を附与したものを用いる。この
結晶粉体を以下の実施例で用いる出発物質とする。
II-VI group compound semiconductor containing Cd or 2 of these
The compound semiconductor material of one kind or more may be Cucl 2 and / or CuCl 2 and / or a raw powder of about 0.2 μm obtained by a known chemical extrusion method.
A material to which photoconductivity is imparted is used by adding 0.1 to 1 mol% of AgCl 2 as an impurity and firing it in an inert gas at 600 to 800 ° C. for 30 to 60 minutes for activation. This crystal powder is used as a starting material used in the following examples.

素子構成は第1図及び第2図(第1図A−A′断面図)
に示すように、絶縁性基板1上に焼成工程を経て形成さ
れた光電変換膜2を帯状に設け、この光電変換膜2の両
側部を覆うように共通電極3及びストライプ状の個別電
極4を形成し、この個別電極4は連続して延長して下層
配線5を形成し、これらの上に層間絶縁膜及び素子保護
膜となる有機絶縁層6が形成され、更にその上に上部配
線7が形成されており、電極配線は複数個ずつブロック
に分割したマトリックス配線として形成されている。
The element structure is shown in FIG. 1 and FIG. 2 (AA 'sectional view in FIG. 1).
As shown in FIG. 2, the photoelectric conversion film 2 formed on the insulating substrate 1 through the firing process is provided in a strip shape, and the common electrode 3 and the striped individual electrode 4 are provided so as to cover both sides of the photoelectric conversion film 2. This individual electrode 4 is continuously extended to form a lower layer wiring 5, an organic insulating layer 6 serving as an interlayer insulating film and an element protective film is formed thereon, and an upper wiring 7 is further formed thereon. The electrode wiring is formed as a matrix wiring divided into a plurality of blocks.

電極3,4及び配線5,7の材料は仕事関数の小さな高融点金
属であるTi,Taあるいはこれらの合金を用いることによ
り光電変換膜2とのオーミック性接触をとると同時に、
光電変換膜2及び絶縁性基板1との密着性の向上をはか
る。絶縁性基板1としてはセラミック基板,アルミナ基
板あるいはパイレックスガラス基板等の高耐熱性基板を
用いる。有機絶縁層6としてはポリイミド樹脂,ポリア
ミドイミド樹脂等の耐熱性樹脂を用いるのがよい。
The materials of the electrodes 3, 4 and the wirings 5, 7 are Ti, Ta which is a refractory metal having a small work function, or their alloys, so that they make ohmic contact with the photoelectric conversion film 2 and at the same time,
The adhesion between the photoelectric conversion film 2 and the insulating substrate 1 is improved. As the insulating substrate 1, a highly heat resistant substrate such as a ceramic substrate, an alumina substrate or a Pyrex glass substrate is used. As the organic insulating layer 6, it is preferable to use a heat resistant resin such as a polyimide resin or a polyamideimide resin.

第3図は本発明により作製された密着型一次元イメージ
素子を実際に用いる場合の基本回路構成を示す図であ
り、図示の抵抗R1,R2…は共通電極3と各個別電極4,4…
間との光電変換膜2の各部分、即ち、画素子(受光素子
アレイ)10の素子抵抗である。11は共通電極3に印加す
るためのバイアス直流電源、12は信号電流を電圧として
読み取るための負荷抵抗で信号出力端子13に出力され
る。
FIG. 3 is a diagram showing a basic circuit configuration when the contact type one-dimensional image device produced according to the present invention is actually used. The resistors R1, R2 ... Shown are the common electrode 3 and the individual electrodes 4, 4.
It is the element resistance of each part of the photoelectric conversion film 2, that is, the picture element (light receiving element array) 10 between the space. Reference numeral 11 is a bias DC power supply for applying to the common electrode 3, and 12 is a load resistance for reading a signal current as a voltage, which is output to the signal output terminal 13.

14は切換スイッチで、切換えにより各共通電極3はバイ
アス直流電源11或いは接地側に接続される。15は各個別
電極4を負荷抵抗12に接続するためのスイッチであり、
このスイッチ14,15は、例えば、C−MOSトランジスタで
構成されるスイッチング素子で、シフトレジスタに接続
された素子内のゲートにより、順次、スイッチング動作
がなされるようになっている。
Reference numeral 14 is a changeover switch, and each common electrode 3 is connected to the bias DC power supply 11 or the ground side by switching. 15 is a switch for connecting each individual electrode 4 to the load resistance 12,
The switches 14 and 15 are switching elements composed of, for example, C-MOS transistors, and the gates in the elements connected to the shift register sequentially perform switching operations.

上述の構成により、各画素子を構成する光電変換膜2は
受光した光量に応じて抵抗変化を示し、この抵抗変化は
バイアス直流電源11により信号電流として出力されるの
で、端子13には光量に対応した電圧が出力される。した
がって、スイッチ14,15のスイッチングにより、各画素
を走査すれば、各画素を構成する受光素子が受光した光
量に応じて抵抗変化を示し、信号電流として端子13より
一次元のイメージ情報の読み取り信号が出力される。
With the above configuration, the photoelectric conversion film 2 forming each image element exhibits a resistance change according to the amount of received light, and this resistance change is output as a signal current by the bias DC power supply 11, so that the amount of light is output to the terminal 13. The corresponding voltage is output. Therefore, when each pixel is scanned by switching the switches 14 and 15, a resistance change is shown in accordance with the amount of light received by the light receiving element forming each pixel, and a signal for reading one-dimensional image information from the terminal 13 is output as a signal current. Is output.

このような構成ではクロストーク防止のためのブロッキ
ングダイオードを必要とせず、またマトリックス配線の
採用によりスイッチング素子の大幅な減少をはかること
ができ、素子作製が容易であると同時に低コスト化が可
能となる。
With such a configuration, a blocking diode for preventing crosstalk is not required, and by adopting matrix wiring, it is possible to significantly reduce the number of switching elements, and it is easy to fabricate the elements and at the same time reduce the cost. Become.

本発明の実施例において作製される光電変換膜は非常に
高い光導電性を示し、例えばCdSe系光電変換膜は、695n
m,30lxの光照射時の明暗比が103以上,光電流として1
μA以上の信号が得られ、実時間型の読み出し方式を採
用した密着型一次元イメージ素子の作製が可能となる。
また、光応答特性にも優れ、立ち上がり(90%)及び立
ち下がり(90%)ともに5msec以下の速い応答を示し、
高速読み取り用素子として極めて好ましい特性を示す。
さらに、受光素子は有機絶縁性樹脂膜により完全に封止
されているので、環境変化による素子特性の極めて小さ
い。
The photoelectric conversion film produced in the examples of the present invention shows a very high photoconductivity, for example, a CdSe-based photoelectric conversion film is 695n.
Brightness / darkness ratio at the time of light irradiation of m, 30 lx is 10 3 or more, and the photocurrent is 1
A signal of .mu.A or more is obtained, and it becomes possible to manufacture a contact type one-dimensional image device adopting a real-time reading method.
In addition, it has excellent optical response characteristics and shows a fast response of 5 msec or less at both rising (90%) and falling (90%),
It exhibits extremely favorable characteristics as a high-speed reading element.
Furthermore, since the light receiving element is completely sealed by the organic insulating resin film, the element characteristics due to environmental changes are extremely small.

また、本発明により作製される素子の光電変換膜は光導
電体ペーストをスクリーン印刷によって作製することが
でき、また有機絶縁層も塗布工程により形成することが
可能であるので量産性にも優れている。
Further, the photoelectric conversion film of the device manufactured by the present invention can be manufactured by screen printing a photoconductor paste, and the organic insulating layer can also be formed by a coating process, so that it is excellent in mass productivity. There is.

以下、更にCdSe系光電変換膜を用いた素子の作製工程を
詳細に示す。
Hereinafter, the steps of manufacturing an element using the CdSe photoelectric conversion film will be described in detail.

絶縁性基板1としてコーニング社製#7059ガラス基板を
用い、この基板1上に光導電ペーストをスクリーン印刷
法を用いて塗布し、100℃/1時間の熱風乾燥後、N2雰囲
気中で300℃/15分,引き続き500℃/30分の熱処理を施
し、膜厚約4μmの光電変換膜を形成した。光導電ペー
ストはあらかじめ活性化熱処理のなされた平均粒径約2
μmのCdSe結晶粉(Cu:0.4モル%ドープ,N2中800℃処
理粉)をCdCl23モル%,低融点ガラスフリット(Tg:38
5℃)を全量に対し2重量%及び粘度調整のためのオイ
ル(1.5重量%のエチルセルロース含有)を適量添加
し、ボールミル中で約50時間混合したものを用いた。
A Corning # 7059 glass substrate is used as the insulating substrate 1, a photoconductive paste is applied onto the substrate 1 by a screen printing method, dried at 100 ° C for 1 hour with hot air, and then at 300 ° C in a N 2 atmosphere. Heat treatment was performed for 15 minutes, and subsequently for 500 minutes at 500 ° C. to form a photoelectric conversion film having a thickness of about 4 μm. The photoconductive paste has an average particle size of about 2 which has been previously heat treated for activation.
μm CdSe crystal powder (Cu: 0.4 mol% dope, 800 ° C. powder in N 2 ) CdCl 2 3 mol%, low melting point glass frit (Tg: 38
2% by weight based on the total amount (5 ° C.) and an appropriate amount of oil (containing 1.5% by weight of ethyl cellulose) for viscosity adjustment were added and mixed in a ball mill for about 50 hours.

このようにして作製された光電変換膜2上に共通電極3
及び個別電極4よりなる対向電極をリフトオフ法により
形成すると共に下層配線5を形成した。本実施例では電
極及び配線としてTiを約5000Å被着し、電極間隔50μm,
電極長70μmを有する1728画素からなる受光素子アレイ
を形成した。この上全面にスピンコート法により硬化後
の膜厚が約5μmとなるポリイミド樹脂層6を層間絶縁
膜及び素子保護膜として形成した。マトリクス配線化の
ためのスルーホールの形成はまず、ポリイミド樹脂をハ
ーフキュア状態で通常のフォトリソグラフィー技術を用
いてパターン化し、上部配線材料としてNi−Cuを被着後
ポリイミド樹脂膜を本キュアした。上部配線パターンは
通常のフォトグラフィー技術を用い、32素子を1ブロッ
クとするマトリックス配線を形成した。
The common electrode 3 is formed on the photoelectric conversion film 2 thus manufactured.
The counter electrode including the individual electrodes 4 was formed by the lift-off method, and the lower layer wiring 5 was formed. In this embodiment, about 5000Å of Ti is deposited as electrodes and wiring, and the electrode interval is 50 μm,
A light receiving element array consisting of 1728 pixels having an electrode length of 70 μm was formed. A polyimide resin layer 6 having a film thickness after curing of about 5 μm was formed on the entire surface by spin coating as an interlayer insulating film and an element protective film. To form a through hole for forming a matrix wiring, first, a polyimide resin was patterned in a half-cure state by using a normal photolithography technique, Ni-Cu was adhered as an upper wiring material, and then the polyimide resin film was cured. The upper wiring pattern was formed by using a normal photography technique to form a matrix wiring having 32 elements as one block.

マトリックス配線部の層間絶縁層6はリフトオフ工程後
受光素子上にも同時に形成しているため上部配線形成工
程に於ける影響を受けることがなく光電変換膜の特性劣
化は認められなかった。
Since the interlayer insulating layer 6 of the matrix wiring portion was formed simultaneously on the light receiving element after the lift-off process, it was not affected by the upper wiring formation process and no deterioration of the characteristics of the photoelectric conversion film was observed.

上記の方法で作製した素子は、バイアス電圧12V,30lxの
入射光に対し平均15μA程度の信号電流を読み取ること
ができ、各画素間の出力特性のバラツキも±15%と良好
であった。また、光応答速度は立ち上がり(90%)3.0m
sec立ち上がり(90%)0.5msecと優れた応答特性を示
し、実時間型読み取り方式で読み取り可能な高速の密着
型一次元イメージ素子を作製することができた。更に本
素子を65℃,95%RHの高温高湿中で信頼性テストを行っ
たところ、200時間後も特性変動は5%以内と良好な結
果を得、光電変換膜上に形成したポリイミド樹脂層は、
素子の信頼性向上のための封止膜としての機能を充分に
はたしていることが判明した。
The device manufactured by the above method was able to read an average signal current of about 15 μA with respect to incident light with a bias voltage of 12 V and 30 lx, and the variation in output characteristics between the pixels was as good as ± 15%. In addition, the light response speed rises (90%) 3.0m
It showed excellent response characteristics with a rise of sec (90%) of 0.5 msec, and was able to fabricate a high-speed contact type one-dimensional image element that can be read by a real-time reading method. Furthermore, when this device was subjected to a reliability test in a high temperature and high humidity environment of 65 ° C and 95% RH, the characteristic variation was within 5% even after 200 hours, and a good result was obtained. The polyimide resin formed on the photoelectric conversion film The layers are
It was found that the device sufficiently functions as a sealing film for improving the reliability of the device.

<発明の効果> 以上のように本発明によれば、マトリックス配線形成工
程で同時に受光素子アレイの封止を行うので工程数の簡
略化が可能となり、かつ量産性にも優れている。したが
って本発明によれば、素子作製の歩留りが高く、信頼性
のよい素子を低コストで作製することができる。
<Effects of the Invention> As described above, according to the present invention, since the light receiving element array is simultaneously sealed in the matrix wiring forming step, the number of steps can be simplified and the mass productivity is excellent. Therefore, according to the present invention, it is possible to manufacture a highly reliable device at a low cost with a high yield of device manufacturing.

【図面の簡単な説明】[Brief description of drawings]

第1図は本発明の一実施例により作製される密着型一次
元イメージ素子の部分平面図、第2図は第1図A−A′
部分の断面を示す図、第3図は本発明により作製された
密着型一次元イメージ素子を実際に用いる場合の基本回
路構成を示す図である。 1……絶縁性基板、2……光電変換膜、3……共通電
極、4……個別電極、5……下層配線、6……層間絶縁
膜及び素子保護膜としての有機絶縁膜、7……上部配
線。
FIG. 1 is a partial plan view of a contact-type one-dimensional image device manufactured according to an embodiment of the present invention, and FIG. 2 is FIG.
FIG. 3 is a view showing a cross section of a part, and FIG. 3 is a view showing a basic circuit configuration when the contact type one-dimensional image device manufactured according to the present invention is actually used. 1 ... Insulating substrate, 2 ... Photoelectric conversion film, 3 ... Common electrode, 4 ... Individual electrode, 5 ... Lower layer wiring, 6 ... Organic insulating film as interlayer insulating film and element protective film, 7 ... … Top wiring.

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】少なくともCdを含むII−VI族化合物半導体
および1種類以上のハロゲン化Cdおよび低融点ガラスフ
リットを有機バインダーに分散し、ペースト化したもの
を基板に塗布し、熱処理工程を経て形成される光電変換
薄膜で構成される受光素子と、マトリックス配線部が同
一の基板に具備された密着型一次元イメージ素子におい
て、 受光素子形成膜を帯状に設け、該膜の両側部を覆うよう
に共通電極及びストライプ状の個別電極を形成し、この
個別電極が連続して下層配線を形成する工程と、 前記受光素子部および下部配線部の上に層間絶縁膜およ
び素子保護膜となり、かつ絶縁性高分子膜から構成され
る絶縁膜を形成する工程と、 該絶縁膜上に上部配線部をブロック分割したマトリック
ス配線を形成する工程と、 を含むことを特徴とする密着型一次元イメージ素子の製
造方法。
1. A II-VI group compound semiconductor containing at least Cd, one or more kinds of halogenated Cd and a low-melting-point glass frit dispersed in an organic binder, and the paste is applied to a substrate, which is then subjected to a heat treatment step. In the contact type one-dimensional image element in which the light receiving element composed of the photoelectric conversion thin film and the matrix wiring part are provided on the same substrate, the light receiving element forming film is provided in a strip shape so as to cover both sides of the film. A step of forming a common electrode and a stripe-shaped individual electrode, and continuously forming a lower layer wiring with the individual electrode; and an interlayer insulating film and an element protective film on the light receiving element section and the lower wiring section, and an insulating property. And a step of forming an insulating film composed of a polymer film, and a step of forming a matrix wiring in which the upper wiring portion is divided into blocks on the insulating film. Method for producing a contact type one-dimensional image element that.
JP60174525A 1985-08-07 1985-08-07 Method of manufacturing contact type one-dimensional image element Expired - Lifetime JPH0673373B2 (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP60174525A JPH0673373B2 (en) 1985-08-07 1985-08-07 Method of manufacturing contact type one-dimensional image element
DE3626504A DE3626504C2 (en) 1985-08-07 1986-08-05 Method of manufacturing a linear image sensor
GB8619160A GB2180399B (en) 1985-08-07 1986-08-06 "method of manufacturing contact type one-dimensional image sensor, and contact type image sensor manufactured thereby"
US06/894,051 US4766085A (en) 1985-08-07 1986-08-07 Method of manufacturing contact type one-dimensional image sensor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60174525A JPH0673373B2 (en) 1985-08-07 1985-08-07 Method of manufacturing contact type one-dimensional image element

Publications (2)

Publication Number Publication Date
JPS6233455A JPS6233455A (en) 1987-02-13
JPH0673373B2 true JPH0673373B2 (en) 1994-09-14

Family

ID=15980047

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60174525A Expired - Lifetime JPH0673373B2 (en) 1985-08-07 1985-08-07 Method of manufacturing contact type one-dimensional image element

Country Status (1)

Country Link
JP (1) JPH0673373B2 (en)

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57139973A (en) * 1981-02-25 1982-08-30 Ricoh Co Ltd Image sensor with multiplying factor of one
JPS6065564A (en) * 1983-09-21 1985-04-15 Hitachi Ltd Image read-out sensor

Also Published As

Publication number Publication date
JPS6233455A (en) 1987-02-13

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