JPS6233455A - Manufacture of contact type one-dimensional image device - Google Patents

Manufacture of contact type one-dimensional image device

Info

Publication number
JPS6233455A
JPS6233455A JP60174525A JP17452585A JPS6233455A JP S6233455 A JPS6233455 A JP S6233455A JP 60174525 A JP60174525 A JP 60174525A JP 17452585 A JP17452585 A JP 17452585A JP S6233455 A JPS6233455 A JP S6233455A
Authority
JP
Japan
Prior art keywords
film
contact type
wiring
manufacturing
dimensional image
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP60174525A
Other languages
Japanese (ja)
Other versions
JPH0673373B2 (en
Inventor
Satoshi Nishigaki
敏 西垣
Ryusuke Kita
隆介 喜多
Shuhei Tsuchimoto
修平 土本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP60174525A priority Critical patent/JPH0673373B2/en
Priority to DE3626504A priority patent/DE3626504C2/en
Priority to GB8619160A priority patent/GB2180399B/en
Priority to US06/894,051 priority patent/US4766085A/en
Publication of JPS6233455A publication Critical patent/JPS6233455A/en
Publication of JPH0673373B2 publication Critical patent/JPH0673373B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Abstract

PURPOSE:To simplify the manufacturing process of devices and to increase the manufacturing yield of devices, by forming an inter-layer insulating layer for forming matrix wiring so as to cover an light-receiving element. CONSTITUTION:II-IV sole compound semiconductor including Cd or two or more kinds of compound semiconductor material of them is made of raw powder of about 0.2mum being added with CuCl2 and/or AgCl2 of 0.1-1mol as an impurity, being fired for 30-60min at 600-800 deg.C in an inert gas, and being treated with an activating process to provide a photoconductivity. Concerning the device structure, a photoelectric converting film 2 formed on an insulating substrate 1 through an firing process is formed in belt-shape, and common electrodes 3 and stripe-shaped discrete electrodes 4 are formed so as to cover the both sides of the photoelectric converting film 2. The discrete electrodes 4 are extended continuously to form lower layer wiring 5, on which an inter-layer insulating film and an organic insulating layer 6 serving as an element protecting film are formed. Moreover, upper wiring 7 is formed thereon, and the electrode wiring is formed as matrix wiring divided into blocks each of a plural number.

Description

【発明の詳細な説明】 〈産業上の利用分野〉 本発明はCdを含むn−VI族化合物半導体もしくはこ
れらのうち二種以上の化合物半導体を含む光導電材料を
光電変換膜として備え、実時間型読み取り方式、マトリ
ックス配線駆動を採用した密着型一次元イメージ素子の
製造方法に関するものである。
Detailed Description of the Invention <Industrial Application Field> The present invention provides a photoconductive material containing a Cd-containing n-VI group compound semiconductor or two or more of these compound semiconductors as a photoelectric conversion film. The present invention relates to a method for manufacturing a contact type one-dimensional image element that employs a mold reading method and matrix wiring drive.

〈従来の技術〉 長尺あるいは大面積な光電変換膜の作製方法と!ア 停
止トh宣六菌首・比 フック51.力社家スL>l砕グ
ロー放電気相成長法等の薄膜作製技術が用いられている
<Prior art> A method for producing a long or large-area photoelectric conversion film! A Stop H Senroku Fungi Neck/Ratio Hook 51. Thin film fabrication techniques such as pulverized glow discharge electric phase epitaxy are used.

めに各種有機樹脂膜あるいは無機絶縁膜等による光電変
換膜の保護がなされている。
For this reason, photoelectric conversion films are protected using various organic resin films or inorganic insulating films.

〈発明が解決しようとする問題点〉 上記従来の薄膜作製技術においては膜の特性の良否は製
造装置の製作技術に大きく依存し、歩留り、信頼性の点
で問題がある。たとえば反応性スパッタ法あるいはグロ
ー放電気相成長法等により非晶質シリコン薄膜を作製す
る場合、グロー放電プラズマの制御に高度な技術を必要
とし、再現性。
<Problems to be Solved by the Invention> In the conventional thin film manufacturing techniques described above, the quality of the film characteristics largely depends on the manufacturing technology of the manufacturing equipment, and there are problems in terms of yield and reliability. For example, when producing an amorphous silicon thin film using reactive sputtering or glow discharge electrophase growth, advanced technology is required to control the glow discharge plasma, making reproducibility difficult.

膜特性の均一性を得る事が困難となる。It becomes difficult to obtain uniformity of film properties.

また、Cdを含むIf −Vl族化合物半導体薄膜をス
パッタ法あるいは真空蒸着法等によって作製する場合に
は、化学量論的組成からのずれが作製条件によって微妙
に変化し、光導電性附与のためのCd、CuあるいはA
g等のハロゲン化合物のドーピングによる活性化処理も
作製条件により再現性が得がたいという大きな欠点を有
する。
Furthermore, when producing If-Vl group compound semiconductor thin films containing Cd by sputtering or vacuum evaporation, the deviation from the stoichiometric composition varies slightly depending on the production conditions, and the photoconductivity imparted may be affected. Cd, Cu or A for
Activation treatment by doping with a halogen compound such as G also has a major drawback in that it is difficult to obtain reproducibility depending on the manufacturing conditions.

また、従来の素子作製方法においては、素子の保護膜形
成のためのプロセスが余分に必要となるため、コスト高
となる等の問題点があった。
Further, in the conventional device manufacturing method, an extra process is required to form a protective film of the device, which causes problems such as high cost.

本発明はこのような点にかんがみて創案されたもので、
素子作製のプロセスを簡素化するとともに、素子作製の
歩留りの向上を可能にした密着型一次元イメージ素子の
製造方法を提供することを目的としている。
The present invention was devised in view of these points.
It is an object of the present invention to provide a method for manufacturing a contact type one-dimensional image element, which simplifies the process of manufacturing the element and makes it possible to improve the yield of manufacturing the element.

く問題点を解決するための手段〉 上記の目的を達成するため、本発明の密着型一次元イメ
ージ素子の製造方法は、Cdを含むn −■族化合物半
導体単体あるいはこれらのうち二種以上の化合物半導体
で構成される受光素子とマトリックス配線部が同一の基
板に具備された密着型一次元イメージ素子において、マ
トリックス配線形成のための層間絶縁層を上記受光素子
部を覆うように形成するように構成している。
Means for Solving the Problems> In order to achieve the above object, the method for manufacturing a contact type one-dimensional image element of the present invention uses a single n-■ group compound semiconductor containing Cd or two or more of these. In a contact type one-dimensional image element in which a light receiving element made of a compound semiconductor and a matrix wiring part are provided on the same substrate, an interlayer insulating layer for forming the matrix wiring is formed to cover the light receiving element part. It consists of

く作用〉 上記のように本発明では、Cdを含むn−VI族化合物
半導体単体あるいはこれらの二種以上の化合物半導体で
構成される受光素子をマトリックス配線形成部と同一基
板に作製することにより、マトリックス配線形成のため
の眉間絶縁膜を同時に受光素子を構成する光電変換膜の
保護膜としても兼ねさせるようになしているため、素子
の製造プロセスが簡素化され、しかも実施例として、こ
の層間絶縁膜として絶縁性高分子膜を用いることにより
、保護膜及び層間絶縁膜のピンホールの発生等による欠
陥を極力減少させ、素子作製の歩留りの向上がはかられ
る。
Effect> As described above, in the present invention, by manufacturing a light-receiving element composed of a single n-VI group compound semiconductor containing Cd or a compound semiconductor of two or more of these types on the same substrate as the matrix wiring forming part, Since the glabellar insulating film for matrix wiring formation also serves as a protective film for the photoelectric conversion film constituting the light-receiving element, the manufacturing process of the element is simplified. By using an insulating polymer film as the film, defects such as pinholes in the protective film and interlayer insulating film can be reduced as much as possible, and the yield of device manufacturing can be improved.

上記した本発明の素子作製プロセスにより、多層配線形
成のための層間絶縁膜の形成によって光電変換膜の保護
膜形成工程を素子作製工程の初期に完了するため、後工
程におけるスルーホール形成、配線微細加工工程等に於
ける各種エッチャントによる受光素子特性への影響を完
全に除去するヒ こ殉が可能となり、素子特性の信頼性を大幅に向上させ
ることができる。
According to the device manufacturing process of the present invention described above, since the protective film formation process for the photoelectric conversion film is completed at the beginning of the device manufacturing process by forming an interlayer insulating film for forming multilayer wiring, through-hole formation and wiring fineness are performed in the later process. It becomes possible to completely eliminate the influence of various etchants on the characteristics of the light-receiving element during processing steps, etc., and the reliability of the characteristics of the element can be greatly improved.

また、有機高分子材料は誘電率が無機絶縁材料に比べ小
さく、かつ5〜10μmの厚膜が容易に、坦成可能であ
るので実施例のように層間絶縁膜として絶縁性高分子膜
を用いること番こより、多層配線部の容量を小さくおさ
えることが可能となり、素子の高速駆動に際し何ら支障
とならないマトリックス配線を形成することができる。
In addition, an organic polymer material has a lower dielectric constant than an inorganic insulating material, and a thick film of 5 to 10 μm can be easily formed, so an insulating polymer film is used as an interlayer insulating film as in the example. This makes it possible to keep the capacitance of the multilayer wiring portion small, and it is possible to form a matrix wiring that does not pose any problem when driving elements at high speed.

更に、無機絶縁材料では形成が困難な厚膜が有機高分子
材料では容易に形成が可能であるので、ピンホールの発
生防止が容易となり、素子作製の歩留り向上。
Furthermore, thick films that are difficult to form with inorganic insulating materials can be easily formed with organic polymer materials, making it easier to prevent pinholes and improving yields in device manufacturing.

低コスト化が実現される。Cost reduction is achieved.

〈実施例〉 以下、本発明の実施例を図面を参照して詳細に説明する
<Example> Hereinafter, an example of the present invention will be described in detail with reference to the drawings.

Cdを含むII−VI族化合物半導体単体もしくはこれ
らのうち2種以上の化合物半導体材料は、公知の化学的
析出法により得られる0、2μm程度の生粉にCu C
l 2および/あるいはA g Cl 2を0.1〜1
モル%不純物として添加したものを不活性ガス中で60
0〜800℃で30〜60分間焼成し活性化処理を施す
ことにより光導電性を附与したものを用いる。この結晶
粉体を以下の実施例で用いる出発物質とする。
A single II-VI group compound semiconductor containing Cd or a compound semiconductor material of two or more of them is prepared by adding CuC to raw powder of about 0.2 μm obtained by a known chemical precipitation method.
l 2 and/or A g Cl 2 from 0.1 to 1
60% of the added mole% impurities in an inert gas.
The material used is one that has been given photoconductivity by firing at 0 to 800[deg.] C. for 30 to 60 minutes and performing an activation treatment. This crystalline powder is used as the starting material in the following examples.

素子構成は第1図及び第2図(第1図A−A’断面図)
に示すように、絶縁性基板I上に焼成工程を経て形成さ
れた光電変換膜2を帯状に設け、この光電変換膜2の両
側部を覆うように共通電極3及びストライブ状の個別電
極4を形成し、この個別電極4は連続して延長して下層
配線5を形成し、これらの上に層間絶縁膜及び素子保護
膜となる有機絶縁層6が形成され、更にその上に上部配
線7が形成されており、電極配線は複数個ずつブロック
に分割したマトリックス配線として形成されている。
The device configuration is shown in Figures 1 and 2 (A-A' sectional view in Figure 1).
As shown in the figure, a photoelectric conversion film 2 formed through a baking process is provided in a band shape on an insulating substrate I, and a common electrode 3 and strip-shaped individual electrodes 4 are provided to cover both sides of the photoelectric conversion film 2. The individual electrodes 4 are continuously extended to form a lower wiring 5, on which an organic insulating layer 6 serving as an interlayer insulation film and an element protection film is formed, and an upper wiring 7 is formed on top of this. is formed, and the electrode wiring is formed as a matrix wiring divided into a plurality of blocks.

電極3,4及び配線5,7の材料は仕事関数の小さな高
融点金属であるT i 、 T aあるいはこれらの合
金を用いることにより光電変換膜2とのオーミック性接
触をとると同時に、光電変換膜2及び絶縁性基板】との
密着性の向上をはかる。絶縁性基板1としてはセラミッ
ク基板、アルミナ基板あるいはパイレンク霜等の高耐熱
性基板を用第3図は本発明により作製された密着型一次
元イメージ素子を実際に用いる場合の基本回路構成を示
す図であり、図示の抵抗R1、R2・・・は共通電極3
と各個別電極4,4・・・間との光電変換膜2の各部分
、即ち、画素子(受光素子アレイ)10の素子抵抗であ
る。11は共通電極3に印加するためのバイアス直流電
源、12は信号電流を電圧として読み取るための負荷抵
抗で信号出力端子13に出力される。
The materials of the electrodes 3, 4 and the wirings 5, 7 are high melting point metals with a small work function, such as Ti, Ta, or an alloy thereof, so that they can make ohmic contact with the photoelectric conversion film 2, and at the same time perform photoelectric conversion. 2 and the insulating substrate]. As the insulating substrate 1, a highly heat-resistant substrate such as a ceramic substrate, an alumina substrate, or a pyrenk frost is used. FIG. 3 is a diagram showing the basic circuit configuration when the contact type one-dimensional image element manufactured according to the present invention is actually used. The illustrated resistors R1, R2... are the common electrode 3.
and each individual electrode 4, 4, . 11 is a bias DC power supply for applying to the common electrode 3, and 12 is a load resistor for reading the signal current as a voltage, which is output to the signal output terminal 13.

14は切換スイッチで、切換えにより各共通電極3はバ
イアス直流電源11或いは接地側に接続される。15は
各個別電極4を負荷抵抗12に接続するためのスイッチ
であり、このスイッチ14゜15は、例えば、C−MO
S)ランジスタで構成されるスイッチング素子で、シフ
トレジスタに接続された素子内のゲートにより、順次、
スイッチング動作がなされるようになっている。
Reference numeral 14 denotes a changeover switch, and by switching, each common electrode 3 is connected to the bias DC power supply 11 or the ground side. 15 is a switch for connecting each individual electrode 4 to the load resistor 12, and the switches 14 and 15 are, for example, C-MO
S) A switching element consisting of a transistor, which is sequentially controlled by a gate in the element connected to a shift register.
A switching operation is performed.

上述の構成により、各画素子を構成する光電変換膜2は
受光した光量に応じて抵抗変化を示し、この抵抗変化は
バイアス直流電源11により信号電流として出力される
ので、端子13には光量に対応した電圧が出力される。
With the above configuration, the photoelectric conversion film 2 constituting each pixel element exhibits a resistance change depending on the amount of light received, and this resistance change is outputted as a signal current by the bias DC power supply 11, so that the terminal 13 has a change in resistance depending on the amount of light. The corresponding voltage is output.

したがって、スイッチI’4.15のスイッチングによ
り、各画素を走査すれば、各画素を構成する受光素子が
受光した光量に応じて抵抗変化を示し、信号電流として
端子13より一次元のイメージ情報の読み取り信号が出
力される。
Therefore, when each pixel is scanned by switching the switch I'4.15, the light receiving element constituting each pixel exhibits a resistance change according to the amount of light received, and a signal current is sent from the terminal 13 to generate one-dimensional image information. A read signal is output.

このような構成ではクロストーク防止のためのブロッキ
ングダイオードを必要とせず、またマトリックス配線の
採用によりスイッチング素子の大幅な減少をはかること
ができ、素子作製が容易であると同時に低コスト化が可
能となる。
This configuration does not require blocking diodes to prevent crosstalk, and by using matrix wiring, the number of switching elements can be significantly reduced, making it easy to manufacture devices and reducing costs. Become.

本発明の実施例において作製される光電変換膜は非常に
高い光導電性を示し、例えばCdSe系光電変換膜は、
695nm、301xの光照射時の明暗比が103以上
、光電流として1μA以上の信号が得られ、実時間型の
読み出し方式を採用しまた、光応答特性にも優れ、立ち
上がり(90%)及び立ち下がり(90%)ともに5m
5ec  以下の速い応答を示し、高速読み取り用素子
として極めて好ましい特性を示す。さらに、受光素子は
有機絶縁性樹脂膜により完全に封止されているので、は
光導電体ペーストをスクリーン印刷によって作製するこ
とができ、また有機絶縁層も塗布工程により形成するこ
とが可能であるので量産性にも優れている。
The photoelectric conversion films produced in the examples of the present invention exhibit extremely high photoconductivity; for example, the CdSe-based photoelectric conversion film has
When irradiated with light at 695 nm and 301x, the brightness ratio is 103 or more, and a signal with a photocurrent of 1 μA or more is obtained.It uses a real-time readout method, and has excellent photoresponse characteristics, with a rise (90%) and a rise Both descents (90%) are 5m
It exhibits a fast response of 5 ec or less, and exhibits extremely favorable characteristics as an element for high-speed reading. Furthermore, since the photodetector is completely sealed with an organic insulating resin film, the photoconductor paste can be produced by screen printing, and the organic insulating layer can also be formed by a coating process. Therefore, it is also suitable for mass production.

以下、更にCdSe系光電変換膜を用いた素子の作製工
程を詳細に示す。
Hereinafter, the manufacturing process of an element using a CdSe-based photoelectric conversion film will be described in detail.

絶縁性基板1としてコーニング社製#7059ガラス基
板を用い、この基板1上に光導電ペーストをスクリ−ン
印刷法を用いて塗布し、】00℃/1時間の熱風乾燥後
、N2雰囲気中でaOO℃/15分、引き続き500℃
/30分の熱処理を施し、膜厚的4μmの光電変換膜を
形成した。光宿苧へO−1【r蒔セ11清12・2状・
1屏lし赴hn罪小佇寺七た平均粒径約2μmのCdS
e結晶粉(Cu:0.4モル%ドープ、N2中800℃
処理粉)をCdC1゜3モル%、低融点ガラスフリット
(Tg:ass℃)を全量に対し2重量%及び粘度調整
のためのオイル(1,5重量%のエチルセルロース含有
)を適量添加し、ボールミル中で約50時間混合したも
のを用いた。
A #7059 glass substrate made by Corning Co., Ltd. was used as the insulating substrate 1. A photoconductive paste was applied onto this substrate 1 using a screen printing method, and after drying with hot air at 00°C for 1 hour, it was dried in an N2 atmosphere. aOO℃/15 minutes, then 500℃
A heat treatment was performed for 30 minutes to form a photoelectric conversion film having a thickness of 4 μm. O-1 [r Makise 11 Kiyoshi 12.2nd condition]
CdS with an average particle size of about 2 μm
e Crystal powder (Cu: 0.4 mol% doped, 800°C in N2
Processed powder) was added with 1°3 mol% of CdC, 2% by weight of low melting point glass frit (Tg: ass°C) based on the total amount, and an appropriate amount of oil for viscosity adjustment (containing 1.5% by weight of ethyl cellulose), and then milled in a ball mill. The mixture was mixed for about 50 hours in a vacuum cleaner.

このようにして作製された光電変換膜2上に共通電極3
及び個別電極4よりなる対向電極をリフトオフ法により
形成すると共に下層配線5を形成した。本実施例では電
極及び配線としてTiを約5000A被着し、電極間隔
50メAm 、電極長70μmを有する1728画素か
らなる受光素子アレイを形成した。この上全面にスピン
コード法により硬化後の膜厚が約5pmとなるポリイミ
ド樹脂層6を層間絶縁膜及び素子保護膜として形成した
。マトリクス配線化のためのスルーホールの形成はまず
、ポリイミド樹脂をハーフキュア状態で通常のフォトリ
ソグラフィー技術を用いてパターン化し、上部配線材料
としてNi−Cuを被着後ポリイミド樹脂膜を本キュア
した。上部配線パターンは通常のフォトグラフィー技術
を用い、32素子を1ブロツクとするマトリックス配線
を形成した。
A common electrode 3 is placed on the photoelectric conversion film 2 produced in this way.
A counter electrode consisting of individual electrodes 4 was formed by a lift-off method, and lower layer wiring 5 was also formed. In this example, approximately 5000A of Ti was deposited as electrodes and wiring to form a light-receiving element array consisting of 1728 pixels with an electrode spacing of 50mm and an electrode length of 70μm. A polyimide resin layer 6 having a thickness of about 5 pm after curing was formed on the entire surface by a spin-coding method as an interlayer insulating film and an element protective film. To form through holes for matrix wiring, first, polyimide resin was patterned in a half-cured state using normal photolithography technology, Ni--Cu was deposited as an upper wiring material, and then the polyimide resin film was fully cured. For the upper wiring pattern, a matrix wiring with 32 elements in one block was formed using ordinary photography technology.

マトリックス配線部の層間絶縁層6はリフトオフ工程後
受光素子上にも同時に形成しているため上部配線形成工
程に於ける影響を受けることがなく光電変換膜の特性劣
化は認められなかった。
Since the interlayer insulating layer 6 of the matrix wiring portion was simultaneously formed on the light receiving element after the lift-off process, it was not affected by the process of forming the upper wiring, and no deterioration in the characteristics of the photoelectric conversion film was observed.

上記の方法で作製した素子は、バイアス電圧12V、3
06xの入射光に対し平均15メLA程度の信号電流を
読み取ることができ、各画素間の出力特性のバラツキも
±15%と良好であった。
The device manufactured by the above method had a bias voltage of 12V, 3
It was possible to read a signal current of about 15 meLA on average with respect to the incident light of 0.06x, and the variation in output characteristics between each pixel was good at ±15%.

また、光応答速度は立ち上がり(90%)3.0m5e
c  立ち下がり(90%) 0.5 m5ecと優れ
た応答特性を示し、実時間型読み取り方式で読み取り可
能な高速の密着型一次元イメージ素子を作製することが
できた。更1こ本素子を65℃、95%RHの高温高温
中で信頼性テストを行ったところ、200時間後も特性
変動は5%以内と良好な結果を得、光電変換膜上に形成
したポリイミド樹脂層は、素子の信頼性同上のための封
止膜としての機能を充分にはたしていることが判明した
In addition, the light response speed is 3.0 m5e (90%)
It was possible to fabricate a high-speed contact type one-dimensional image element that exhibited excellent response characteristics with c fall (90%) of 0.5 m5ec and was readable using a real-time reading method. Furthermore, when we conducted a reliability test on this device at a high temperature of 65°C and 95% RH, we obtained good results with characteristic fluctuations within 5% even after 200 hours. It has been found that the resin layer sufficiently functions as a sealing film for improving the reliability of the device.

〈発明の効果〉 以上のように本発明によれば、マトリックス配線形成工
程で同時に受光素子アレイの封止を行うので工程数の簡
略化が可能となり、かつ量産性にも優れている。したが
って本発明によれば、素子作製の歩留りが高く、信頼性
のよい素子を低コストで作製することができる。
<Effects of the Invention> As described above, according to the present invention, since the light-receiving element array is sealed at the same time as the matrix wiring formation process, the number of steps can be simplified and mass productivity is also excellent. Therefore, according to the present invention, it is possible to manufacture a highly reliable device at a low cost and with a high yield.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例により作製される密着型一次
元イメージ素子の部分平面図、第2図は第1図A−A’
部分の断面を示す図、第3図は本発明により作製された
密着型一次元イメージ素子を実際に用いる場合の基本回
路構成を示す図である。 I・・・絶縁性基板、2・・・光電変換膜、3・・・共
通電極、4・・・個別電極、5・・・下層配線、6・・
・層間絶縁膜及び素子保護膜としての有機絶縁膜、7・
・・上部配線。 第1図 第2図
FIG. 1 is a partial plan view of a contact type one-dimensional image element manufactured according to an embodiment of the present invention, and FIG.
FIG. 3 is a diagram showing a cross section of a portion, and is a diagram showing a basic circuit configuration when a contact type one-dimensional image element manufactured according to the present invention is actually used. I... Insulating substrate, 2... Photoelectric conversion film, 3... Common electrode, 4... Individual electrode, 5... Lower layer wiring, 6...
・Organic insulating film as interlayer insulating film and element protection film, 7.
・Top wiring. Figure 1 Figure 2

Claims (1)

【特許請求の範囲】 1、Cdを含むII−VI族化合物半導体単体あるいはこれ
らのうち二種以上の化合物半導体で構成される受光素子
とマトリックス配線部が同一の基板に具備された密着型
一次元イメージ素子において、 マトリックス配線形成のための層間絶縁層を上記受光素
子部を覆うように形成してなることを特徴とする密着型
一次元イメージ素子の製造方法。 2、前記受光素子は、前記化合物半導体を融剤であるC
dのハロゲン化物の一種以上あるいは/および低融点ガ
ラスフリットを有機バインダーに分散しペースト化した
ものを基板に塗布し、不活性ガス雰囲気中で400℃乃
至600℃の熱処理工程を経て形成されてなることを特
徴とする特許請求の範囲第1項記載の密着型一次元イメ
ージ素子の製造方法。 3、前記受光素子上及びマトリックス配線部の層間絶縁
層は絶縁性高分子膜から構成されてなることを特徴とす
る特許請求の範囲第1項記載の密着型一次元イメージ素
子の製造方法。 4、前記受光素子を構成する電極とマトリックス配線部
の下層電極は連続的に形成されてなることを特徴とする
特許請求の範囲第1項記載の密着型一次元イメージ素子
の製造方法。
[Claims] 1. A close-contact type one-dimensional device in which a light-receiving element composed of a single II-VI group compound semiconductor containing Cd or a compound semiconductor of two or more of these and a matrix wiring section are provided on the same substrate. 1. A method of manufacturing a contact type one-dimensional image element, characterized in that, in the image element, an interlayer insulating layer for forming matrix wiring is formed so as to cover the light-receiving element part. 2. The light-receiving element may contain C as a flux for the compound semiconductor.
It is formed by applying a paste made by dispersing one or more of the halides and/or low-melting glass frit in an organic binder to a substrate, and subjecting it to a heat treatment process at 400°C to 600°C in an inert gas atmosphere. A method of manufacturing a contact type one-dimensional image element according to claim 1, characterized in that: 3. The method of manufacturing a contact type one-dimensional image element according to claim 1, wherein the interlayer insulating layer on the light receiving element and on the matrix wiring portion is composed of an insulating polymer film. 4. The method of manufacturing a contact type one-dimensional image element according to claim 1, wherein the electrodes constituting the light receiving element and the lower electrode of the matrix wiring section are formed continuously.
JP60174525A 1985-08-07 1985-08-07 Method of manufacturing contact type one-dimensional image element Expired - Lifetime JPH0673373B2 (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP60174525A JPH0673373B2 (en) 1985-08-07 1985-08-07 Method of manufacturing contact type one-dimensional image element
DE3626504A DE3626504C2 (en) 1985-08-07 1986-08-05 Method of manufacturing a linear image sensor
GB8619160A GB2180399B (en) 1985-08-07 1986-08-06 "method of manufacturing contact type one-dimensional image sensor, and contact type image sensor manufactured thereby"
US06/894,051 US4766085A (en) 1985-08-07 1986-08-07 Method of manufacturing contact type one-dimensional image sensor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60174525A JPH0673373B2 (en) 1985-08-07 1985-08-07 Method of manufacturing contact type one-dimensional image element

Publications (2)

Publication Number Publication Date
JPS6233455A true JPS6233455A (en) 1987-02-13
JPH0673373B2 JPH0673373B2 (en) 1994-09-14

Family

ID=15980047

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60174525A Expired - Lifetime JPH0673373B2 (en) 1985-08-07 1985-08-07 Method of manufacturing contact type one-dimensional image element

Country Status (1)

Country Link
JP (1) JPH0673373B2 (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57139973A (en) * 1981-02-25 1982-08-30 Ricoh Co Ltd Image sensor with multiplying factor of one
JPS6065564A (en) * 1983-09-21 1985-04-15 Hitachi Ltd Image read-out sensor

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57139973A (en) * 1981-02-25 1982-08-30 Ricoh Co Ltd Image sensor with multiplying factor of one
JPS6065564A (en) * 1983-09-21 1985-04-15 Hitachi Ltd Image read-out sensor

Also Published As

Publication number Publication date
JPH0673373B2 (en) 1994-09-14

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