JPH0669477A - Bonding method for substrate - Google Patents

Abstract

PURPOSE:To avoid voids between substrates, realize a satisfactory bonding state and avoid inconvenience such as expansion/contraction of a pattern when a plurality of substrates are bonded to each other. CONSTITUTION:Two substrates 1 and 4 are bonded to each other to form a bonded substrate (such as a bonded semiconductor wafer). Both the bonding surfaces of the respective substrates are bonded to each other by excavation 40 or fine ventilation holes are formed in the substrate on the excavation side to perform excavation 40.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a substrate bonding method. INDUSTRIAL APPLICABILITY The present invention can be used in general when joining two substrates to form a bonded substrate. For example, 2
It can be used in the case of laminating a plurality of semiconductor wafers to form a semiconductor bonded wafer. In addition, SOI used as a structure of electronic parts such as semiconductor devices
(Silicon on Insulator) A means for forming a structure (this is a method in which a silicon portion is present on an insulating portion and various semiconductor elements are formed on this silicon portion, and is mainly used in the field of electronic materials). As one of the methods, there is a technique of forming a structure in which a silicon portion exists on the insulating portion by laminating another substrate on the surface of the insulating portion of the silicon substrate on which the insulating portion is formed and polishing the silicon substrate. It is known and generally referred to as a bonded SOI or the like, but it can also be used to form such a bonded SOI (for the bonding technology, see, for example, “NIKKEI MICRODEVICES” by Nikkei McGraw-Hill, Inc. 1988 3 (See page 84 of the monthly issue).

[0002]

2. Description of the Related Art A conventional method for forming such a bonded SOI structure will be described with reference to FIG.

A silicon substrate 1 as shown in FIG.
By using a photolithography technique or an etching technique to pattern one side of one side of the wafer (generally using a high flatness silicon wafer, which will be referred to as a substrate A), and further forming a SiO ₂ film on this side. The insulating part 2 is formed. As a result, as shown in FIG. 3B, a structure in which the insulating portion 2 is formed on one side of the silicon substrate 1 is obtained. The insulating portion 2 is formed as a film having irregularities as shown in the figure according to the surface shape of the patterned silicon substrate 1. Further, a polysilicon film is formed as a bonding film 3 on this insulating portion 2 (FIG. 3C). Bonding film 3
The (polysilicon film) will be formed on another substrate (FIG.
This is for forming a highly smooth bonding surface when the substrate 4) indicated by B is bonded to (e).

Next, the surface of the bonding film 3 which is a polysilicon film is flattened and polished to form a highly smooth surface (FIG. 3).
(D)).

Another substrate 4 (referred to as substrate B) is brought into close contact with the polished surface of the bonding film 3. Both surfaces are joined by the tight compression bonding, and as a result, a joining structure as shown in FIG. 3 (e) is obtained. Generally, it is said that a firm bond is achieved by hydrogen bonding due to the action of water or hydroxyl groups present on both surfaces. This is usually heated to thermally bond to achieve a very strong bond. The laminating strength is generally 200 kg / cm ² or more, and even 2,000 kg / cm ² in some cases. As another substrate 4 (substrate B) to be bonded together, a silicon substrate similar to the substrate 1 (substrate A) is usually used. This is because a heating step is often performed after laminating, so that inconvenience may occur unless the physical properties such as thermal expansion are the same.
If such a problem does not exist, for example, in the prior art shown in FIG. 3, the other substrate 4 only serves as a support base, so that it is not necessarily a silicon substrate. However, when an element is formed on another substrate 4 (substrate B) to be bonded together, it is necessary that the semiconductor substrate is an element formable semiconductor substrate.

Next, polishing is performed, and chamfering or the like of the side peripheral portion is performed as required to obtain the structure shown in FIG. 3F is upside down from FIG. 3E, but this is because the substrate 1 is turned upside down for this polishing / chamfering and the next grinding. .

After that, the surface of the substrate 1 is further ground, and FIG.
The structure is (f). This surface grinding is stopped before the insulating part 2 is exposed.

Next, selective grinding is performed. Here, precise finishing grinding is performed until the insulating portion 2 is just exposed.
As a result, as shown in FIG. 3G, a structure is obtained in which the silicon portion 10 is surrounded by the uneven insulating portion 2 and the silicon portion 10 is present on the insulating portion 2. In the structure (SOI structure) in which the silicon portion 10 exists on the insulating portion 2 in this manner, various elements are formed on the silicon portion 10. In the structure of FIG. 3G, each silicon portion 10 is surrounded by the insulating portion 2, so that the element isolation is completed from the beginning.

FIG. 3 shows one silicon part for clarity of illustration.
Although 10 is illustrated in a large scale, in reality, many such fine silicon portions 10 are aggregated.

[0010]

Problems to be Solved by the Invention In the formation of the bonded SOI structure as described above, there are times when bubbles are formed at the bonded interfaces. Explaining with reference to FIG. 3, FIG.
In the above, when the surface of the silicon film 3 on the substrate 1 and the substrate 4 are bonded together, bubbles may be generated at this interface. Bubbles may be generated in a size of, for example, about 0.5 mm to 5 mm.

Since the joining surface is not in close contact with the portion where bubbles are generated, sufficient joining is not performed and the portion is easily peeled off.
For example, after the surface grinding shown in FIG. 3 (f), the film thickness t ₁ of the film of the substrate 1 on the substrate 4 is 4 to 20 μm, usually 5 to 10 μm.
Since it is a thin film, it is easily peeled off when the bubbles 5 are present. This is a source of pollution and may have an important influence on device formation. For example, polishing may cause scratches on the wafer. In this way, the peeling due to the air bubbles causes contamination and impairs the reliability of the device. In the state of FIG. 3 (g), the silicon portion 10 on the substrate 4 has a thinner film thickness t ₂ of about 3 to 4 μm, and if it is peeled off here, it becomes a pollution source in the same manner.
Furthermore, it may become a defective element.

For this reason, it is necessary to prevent bubbles from being generated in the bonded portions of both substrates.

Conventionally, when forming a bonded SOI,
In order to prevent bubbles from being generated between the two substrates to be bonded together, as shown in FIGS. 4A to 4C, the first supporting portion 13 for supporting one substrate 4 and the other substrate 1 are used. For example, a second supporting jig 14 for supporting a semiconductor wafer is used, and the second supporting jig 14 has a convex surface on the substrate 1 to be supported and is convex toward the substrate 4. The technique of matching is adopted (the figure is shown as extremely convex for clarity).

In the technique described above, however, one substrate 1 is warped in a convex shape and the bonding is performed, so that the expansion and contraction of the pattern can occur even though it is slight. Further, even if the second supporting jig 14 that supports the substrate 1 is configured as, for example, a vacuum chuck, it is not always possible to support the substrate 1 in a good convex shape. Furthermore, when forming a flat bonded substrate by laminating, that is, from the state of FIG.
When the joining is performed in the state of (C), a good close joining is not performed, which may cause expansion and contraction of the pattern. For this reason, as described above, it is difficult to meet the recent demand for finer patterns by the bonding technique that supports the substrate in a convex shape on either one of them.

The present invention solves the above problems and prevents the generation of air bubbles, and the bonding is performed in a good condition.
It is an object of the present invention to provide a substrate bonding method that does not cause inconvenience such as expansion and contraction of patterns.

[0016]

According to the invention of claim 1 of the present application, in a substrate laminating method for laminating two substrates to form a laminated substrate, the laminating surfaces of both substrates are bonded to each other. A bonding method for substrates, characterized in that the bonding is performed by bonding both substrates by evacuation, and the above-mentioned object is achieved thereby.

According to a second aspect of the present invention, at least one of the substrates is a semiconductor substrate, and the substrate is laminated to obtain a semiconductor device having a structure in which the semiconductor portion is located in the insulating portion. A method for laminating substrates,
This achieves the above-mentioned object.

The invention according to claim 3 of the present application is a substrate bonding method for bonding two substrates to each other to form a bonded substrate. The bonding between the bonding surfaces of both substrates is performed by vacuum evacuation. A method for laminating substrates, characterized in that the substrates are joined together and the vacuum is exhausted from the side of one substrate, and the one substrate is provided with pores for ventilation. The object mentioned above is achieved.

According to a fourth aspect of the present invention, at least one of the substrates is a semiconductor substrate, and the substrate is laminated to obtain a semiconductor device having a structure in which the semiconductor portion is located in the insulating portion. A method for laminating substrates,
This achieves the above-mentioned object.

The invention of claim 1 of the present application will be described below with reference to the example of FIG. 1 showing an embodiment of the invention which will be described later in detail. That is, the present invention takes steps as shown in FIG. 1 (a) and then FIG. 1 (b) as illustrated in FIG. 1, which is a laminated substrate obtained by laminating two substrates 1 and 4. In the substrate bonding method for forming the substrate, the bonding surfaces of the substrates 1 and 4 are bonded to each other by bonding the substrates 1 and 4 by evacuation 40.

The invention of claim 2 of the present application will be described below with reference to the example of FIG. 1 showing an embodiment of the invention which will be described later in detail. That is, the present invention takes steps as shown in FIG. 2 (a) and then FIG. 2 (b) as illustrated in FIG. 2, which is a laminated substrate obtained by laminating two substrates 1 and 4. In the substrate bonding method for forming the substrate, the bonding surfaces of both substrates 1 and 4 are bonded by bonding both substrates 1 and 4 by vacuum evacuation 40, and the vacuum evacuation 40 is located on one substrate 1 side. The first substrate 1 is characterized in that the pores 5 for ventilation are formed.

[0022]

According to the invention of claim 1 of the present application, since the substrates 1 and 4 are brought into close contact with each other by utilizing vacuum exhaust, a uniform adhesive pressure is applied, and it is possible to prevent bubbles from being generated and to be excellent. Achievement can be achieved. In addition, since good bonding without such bubbles can be realized without making the substrates 1 and 4 convex, pattern expansion and contraction does not occur, and therefore the bonding of the substrates for forming a fine pattern is also preferably used. it can.

According to the invention of claim 2 of the present application, since the pores 5 for ventilation are provided in the substrate on the side of vacuum evacuation, these function as holes for evacuation. Even in the case where it remains, the gas forming the bubble is evacuated from the pores 5 and thus the generation of the bubble is further reliably prevented.

[0024]

Embodiments of the present invention will be described below with reference to the drawings. However, as a matter of course, the present invention is not limited to the examples described below.

Example 1 Reference is made to FIG. In this embodiment, the substrates 1 and 4 are 2
The invention according to claim 1 of the present application is applied to a case where a plurality of semiconductor wafers are bonded to each other to form a bonded wafer and polishing is performed after the bonding to form an SOI structure.

In FIG. 1, substrates 1 and 4 are two semiconductor wafers, and their bonding surfaces are mirror-polished. 30
Is a vacuum chuck for holding the semiconductor wafer 4 flat, 6
Is a seal ring for holding a vacuum. The evacuation is indicated by arrow 40. The surface of the vacuum chuck 30 that supports the substrate 4 (the upper surface in the figure) is formed with a concentric ring-shaped convex portion 31 on which the substrate 4 is placed and vacuum exhaust via the concave portion 32. As a result of being done 40 and sucking here,
The substrate 4 is firmly held on the vacuum chuck 30. In the present embodiment, even if one of the substrates 1 and 4 is the substrate and the other is the SOI structure pattern forming substrate, whichever is on the vacuum chuck 30 side (the lower side of the drawing) Good. The drawing shows the case where the substrate 4 serving as a table is chucked.

FIG. 1A shows a state in which the substrates 1 and 4 which are semiconductor wafers are set on the vacuum chuck 30. In this state, the periphery of the substrate wafer is surrounded by the seal ring 6 and vacuum exhaust is performed. When evacuation is started, the substrate 4 on the vacuum chuck 30 side is sucked by the vacuum chuck 30,
Adsorbed on a flat surface.

Next, exhaust is performed. That is, as shown in the drawing, the gas between the substrate 1 and the substrate 4 and other residual gas are exhausted from the inside of the seal ring 6 in the direction of the arrow.

FIG. 1 (b) shows a state in which the gas is completely exhausted, and shows a state in which the atmospheric pressure is applied to the upper substrate 1 in the figure. In this state, both substrates 1 and 4 which are semiconductor wafers become completely bonded wafers. By releasing the vacuum evacuation, it is possible to obtain a bonded wafer having little pattern expansion and contraction and no bubbles.

In this embodiment, a flat vacuum chuck
Since it is held by 30, the pattern expansion / contraction is extremely small, and even if expansion / contraction occurs, it can be suppressed to a few ppm or less. Air bubbles are also prevented from remaining.

In this embodiment, by performing vacuum evacuation, the substrate 1 on the upper side of the drawing is subjected to the atmospheric pressure on the surface opposite to the bonding surface (the upper surface of the drawing), so that the atmospheric pressure is applied to the lower side of the drawing. It comes into close contact with the substrate 4 on the side, that is, it is pushed from the upper side of the drawing, so that the bonding is achieved at the same time as the chuck. Since it is evacuated, bubbles can be prevented from remaining. A technique for bonding the substrates to each other in a vacuum container is also conceivable, but in that case, it is necessary to provide a means for producing a pressure difference between the two substrates, or a means such as electrostatic pressure bonding,
No such means are necessary here.

When a pressure reducing pump is used in this embodiment, is it one in which oil does not flow back into the vacuum?
Alternatively, it is preferable that the trap can prevent the reverse flow of oil.

Example 2 Referring to FIG. This example embodies the invention of claim 2 of the present application and was applied to the formation of a bonded semiconductor wafer similar to that of the first embodiment.

In this embodiment, the substrate 1 on the side to be evacuated, that is, on the side of the vacuum chuck 30 (the lower side of the drawing) is provided with the pores 5 forming the ventilation holes. This serves as an exhaust hole in the vacuum exhaust foil.

Therefore, as shown in FIG. 2A, during the vacuum exhaust, not only the exhaust from the inside of the ceiling 6 (shown by the arrow I in FIG. 2A) but also the one provided on the substrate 1 is performed. Exhaust is also performed from the pores 5 (arrow IIa,
IIb). Therefore, even if bubbles may remain between the substrates 1 and 4, the gas that constitutes the bubbles is exhausted from the pores 5, so that the possibility of bubbles remaining is further reduced. Can be achieved.

In this embodiment, the substrate 1 on the side of the vacuum chuck 30, that is, the substrate 1 having the pores 5 is used for pattern formation. This is because it is easy to turn over in the next step and enter the polishing step. However, this is not always necessary.

In the present embodiment, all the operational effects obtained in the first embodiment could be obtained.

[0038]

According to the present invention, it is possible to prevent bubbles from being generated when the substrates are bonded together, to achieve bonding in a good condition, and to realize substrate bonding without causing inconvenience such as expansion and contraction of patterns. .

[Brief description of drawings]

FIG. 1 is a diagram showing a process of Example 1.

FIG. 2 is a diagram showing a process of Example 2.

FIG. 3 is a diagram showing a conventional technique.

FIG. 4 is a diagram showing a problem of the conventional technique.

[Explanation of symbols]

 1 Substrate (semiconductor wafer) 4 Substrate (semiconductor wafer) 5 Pore (exhaust hole) 30 Vacuum chuck 40 Vacuum exhaust

Claims (4)

[Claims] 1. A substrate laminating method for laminating two substrates to form a laminated substrate, wherein the laminating surfaces of the two substrates are joined by joining the two substrates by vacuum exhaust. A method for laminating substrates, which is characterized by: 2. The substrate bonding method according to claim 1, wherein at least one of the substrates is a semiconductor substrate, and the substrate bonding is for obtaining a semiconductor device having a structure in which a semiconductor portion is located in an insulating portion. 3. A substrate laminating method for laminating two substrates to form a laminated substrate, wherein the laminating surfaces of the two substrates are joined by joining the two substrates by evacuation. The method for laminating substrates is characterized in that the vacuum evacuation is performed from the side of one substrate, and the one substrate is provided with pores for ventilation. 4. The substrate bonding method according to claim 3, wherein at least one of the substrates is a semiconductor substrate, and the substrate bonding is for obtaining a semiconductor device having a structure in which a semiconductor portion is located in an insulating portion.