JPH0669306B2 - Inverter output frequency control circuit - Google Patents

Description

The present invention relates to an output frequency control circuit for an inverter, which detects a control target amount in a negative feedback control system using an inverter and issues a control command for the output frequency of the inverter based on the detection result. Regarding

[Conventional technology]

As a conventional inverter control system of this type, one illustrated in the control system block diagram of FIG. 5 is known. FIG. 6 is an example of a filter and comparator circuit diagram in FIG.
In FIG. 5, reference numeral 2 is a frequency control circuit, which comprises an average value comparison circuit 2a, an arithmetic circuit 2b and a filter 2c. The comparator circuit 2a compares the values of the control amount detection signal S ₅ which is smooth and two averages input or set control amount S ₈ and outputs a signal S ₆ resulting in on-off binary signal The operation circuit 2b is an operation circuit such as a CPU that receives the signal S ₆ and performs various operations necessary for inverter control.
c is a smoothing circuit for the control amount detection signal S ₄ including ripples. An inverter main circuit 3 receives the output control signal S ₇ from the arithmetic circuit 2b and outputs an AC S ₁ having a controlled frequency and voltage for the AC motor 6. Reference numeral 4 is a setter that gives a controlled variable set value S ₈ , and 5 is a detector for the controlled variable S ₃ . The rotation output of the electric motor 6 is converted into a manipulated variable S ₂ for the load 7. The inverter device 11 is composed of the elements 2 to 5. In FIG. 6, the filter 2c includes a resistor R ₁ and a capacitor C.
Is composed of a setting device 4 is intended to provide a resistor R ₂ and R ₃ DC controlled by both said resistor consists Metropolitan power P _C -N dividing control amount set value S ₈ a DC voltage of _C. Average value comparison circuit 2a
Is mainly composed of a high-amplitude operational amplifier OA and a feedback resistor R ₄ for creating a hysteresis width for comparison operation.

[Problems to be solved by the invention]

However, in the feedback control system of the inverter as in the above-mentioned conventional method, the detected value of the actual value of the control amount to be compared with the set value of the control amount is an average value created via the contained ripple removing filter circuit. , A time delay based on the filter circuit time constant between the fluctuation of the control amount actual value and the response of the detected average value is unavoidable, and the time delay impairs the responsiveness of the control system and The constant decision was complicated. In view of this, the present invention provides an output frequency control circuit of an inverter that improves the responsiveness of the control system and enables stable operation by eliminating or minimizing the influence of the filter circuit on the time delay. That is the purpose.

[Means for solving problems]

In the comparison between the set value and the actual value of the control amount of the inverter feedback control system, the instantaneous value including the ripple component of the control amount detection value is used as the actual value, the pulse signal of the comparison result is counted, and the pulse signal is generated. A control means for estimating the magnitude relation between the set value and the actual value from the state and giving a control command for the inverter output frequency is provided. That is, the control amount of the control target load operated by the AC motor driven by the inverter is detected, and the output frequency of the inverter is changed according to the difference between the control amount detection value and its target value to change the control amount. In the output frequency control circuit of the inverter control system for controlling to the target value, the instantaneous value including the ripple of the control amount detection value is compared with the target value, and the ON / OFF binary signal is output according to the magnitude relationship between the two. A comparator, an arithmetic circuit for performing a logical product operation of the binary output signal and the reference pulse signal and a count comparison of the results, and an ON / OFF state of each of the output pulses of the operation result by the arithmetic circuit. The magnitude relationship between the average value of the control amount detection values and the target value is determined depending on whether the same state continues for a prescribed number of times or more, and the inverter And it is characterized in providing any of the control commands in the tripartite decreased and current status continues and increases with respect to the output frequency.

[Action]

Generally, in a feedback control system, the relative relationship between the set value of the controlled variable and the detected value can be classified into the following three cases. Now, the set value is V _S, and the detected value including the ripple component is V _S
r, the average value of which is Va, and the ripple is the simplest example, the amplitude is υ, and the frequency of the change is fr. In the first case, V _S > Vr, that is, the maximum value Va + υ of the detected values. a case where the small consisting than still the set value V _S at, the second case is a case made still larger than the set value V _S at the minimum value Va-upsilon of V _{S <Vr} i.e. the detection value . In the third case And the average value Va of the detection values Vr.
Is within the range of V _S ± υ around the set value V _S , and the magnitude relationship between V _S and Vr is periodically inverted at the frequency fr. According to the magnitude relation between V _S and Vr, the above relation has two conjugate ON / OFF pairs.
In terms of the output of the comparator that outputs the value signal, the first and second cases are in the continuous continuous ON state, respectively, and in the third case, the frequency fr is repeatedly turned on and off. Further, the continuous state confirmation of each of the states is performed by determining the number of continuous ON states of the AND operation pulse of the reference scanning pulse of the period T _S and the comparator output signal is the prescribed number N.
It can be determined whether or not the number of times is greater than or equal to the number of times, and the confirmation time unit in that case is N · T _S. Therefore the AND
Using the size determination signal of said V _S and Vr continuous state confirmation signal of the operational pulse as a control quantity control signal in the feedback control system, increase the operation in the case of the first to the control amount, the reduction operation in the second case, the third mean value of the detected value Vr follow the average value of the controlled variable if makes with any operation even rows that should currently continuing decrease in the case the range V _S It will be controlled within ± υ. Further, the time delay of the fluctuation detection when the control amount fluctuates is a confirmation time unit N · T _S which is a product of the period T _{S of the} scanning pulse and the confirmation number N.

In the present invention, in order to perform the various calculations, a comparison circuit of the set value of the control amount and the instantaneous value of the detected value, and an output state of the ON / OFF binary signal of the comparison circuit are scanned at an appropriate cycle, and An arithmetic circuit for outputting a required control signal according to the result and a filter for reducing the ripple division width of the detection signal are provided if necessary, and the ripple division width, the scanning cycle, and the number of times the scanning result is confirmed The inverter output frequency control circuit having high accuracy and high responsiveness is obtained by appropriate selection of the three.

Embodiments Embodiments of the present invention will be described below with reference to the drawings. 1 is a control system block diagram showing an embodiment of the present invention, FIG. 2 is a comparator circuit diagram in FIG. 1, FIG. 3 is a comparison operation diagram in the circuit diagram shown in FIG. 2, and FIG. 4 is the same. It is a flowchart of a comparison operation. In FIG. 1, constituent elements having the same functions as those in the embodiment of the prior art shown in FIG. 5 are designated by the same reference numerals.

FIG. 1 is a diagram in which the frequency control circuit 2 based on the average value comparison method in FIG. 5 is replaced by the frequency control circuit 1 based on the instantaneous value comparison method. Is unnecessary. That is, the frequency control circuit 1 is
An instantaneous value comparison circuit 1a which compares S ₈ with the instantaneous value S ₄ of the control amount detection signal and outputs the result as two sets of conjugate ON / OFF binary signals S ₆ and the signal S ₆ are received. A logical product of the signal S ₆ and a scanning pulse SP having an appropriate period T _S (AN
D) An arithmetic circuit 1b such as a CPU for judging the control content for the control amount depending on whether or not the number of continuous on-states of the pulse train obtained by the arithmetic becomes a prescribed number N or more.
In principle, the filter 1c is unnecessary unless the ripple contained in the signal S ₄ is particularly large. The content of the control instruction by the arithmetic circuit 1b is, for example, that the number of continuous ONs of the pulse train is equal to or more than the specified N times and the signals S ₈ and S ₄ are S ₈ > S ₄
If so, the control amount is increased. If S ₈ <S ₄ , the control amount is decreased, and if the number of continuous ONs does not reach the specified N times, the control amount is increased or decreased. It is what makes me. Then OA is the main component of the comparator circuit 1a is an arithmetic increase width instrument high multiplication Habado in Figure 2, the resistor R ₂ and the DC control power source by both said resistor consists R ₃ Metropolitan P _C 4 dividing the voltage between the -N _C set control amount S ₈
Is to give. In the comparative operation diagram of FIG. 3, FIG. 9A illustrates the relative variation pattern between the set value S ₈ and the control amount detection value S ₄ including ripples. Figure (b) is the output signal S ₆ of the instantaneous value comparison circuit 1a, S _8> S ₄ at S ₆
The output pattern when it is turned on (S ₆ = H) is shown. Naturally also
When S ₈ <S ₄ , S _{6 is} off (S ₆ = L). Moreover although not illustrated, the conjugate value ₆ S ₆ is S _8> S ₄ o'clock _{6 =} L, at S ₈ <S _4
6 = H. FIG. 6C shows the reference scanning pulse SP of the period T _S generated by the arithmetic circuit 1b and the determination state of the control content by the arithmetic circuit 1b. In the illustrated case, the prescribed number of times N is 3. Time in Figure (c)
t ₁ to S ₈ and the S ₈ and S ₄ is> S ₄ a is and the S ₄ and SP and logical product S of any in ₆ · SP group G ₁ and G ₂ of the pulse train of S ₆ · SP of Is in the on (H) state but is also in the same group
The third S ₆ · SP pulse of G ₃ is turned off (L) at time t ₁ , and the increasing operation for the controlled variable is stopped. Between time t _{1 and} t ₂ , logical product ₆ of ₆ and SP
In the pulse train of SP, the continuous ON state is started in the group G ₄ , the third ON state is confirmed at time t ₂ , and at this time the current continuous operation state between time t _{1 and} t ₂ is completed. Then, the state shifts to the state of S ₈ <S _{4 in} the subsequent stage t ₂ and the control amount decreasing operation is started. After time t _{2, the} decreasing operation is continued as long as the ON state of the pulse train ₆ · SP continues as in the group G ₅ . FIG. 4 is a flowchart of the comparison operation, and shows a case where the inverter output frequency is made to correspond to the load operation amount for adjusting the controlled object amount. Note has a S ₆ · SP = SD relative drawing the S ₆ · SP, thus SD its conjugate value if substituting S ₆ to ₆ ▲
▼

〔The invention's effect〕

According to the present invention, in the detection of the feedback control amount in the negative feedback control system by the inverter, the instantaneous value including the ripple of the detected value and the control amount set value are compared by an ON / OFF binary output comparator. , The on / off repeated state of the output signal is scanned by the reference pulse to determine the fluctuation of the average value of the detected values, so that it is possible to increase the average value without using the average value detection filter by the reactor and the capacitor as in the conventional method. It is possible to obtain an inverter output frequency control circuit with high responsiveness and high accuracy.

[Brief description of drawings]

FIG. 1 is a block diagram of a control system showing an embodiment of the present invention, and FIG.
FIG. 4 is a comparison circuit diagram in FIG. 1, FIG. 3 is a comparison operation diagram in the circuit diagram shown in FIG. 2, and FIG. 4 is a flow chart of the comparison operation in FIG. FIGS. 5 and 6 are embodiments of the prior art corresponding to FIGS. 1 and 2, respectively. 1,2 …… Frequency control circuit, 1a …… Instantaneous value comparison circuit, 2a…
… Average value comparison circuit, 1b, 2b …… Calculation circuit, 1c, 2c …… Filter, 3 …… Inverter main circuit, 4 …… Setting device, 5 ……
Detector, 6 ...... AC motor, 7 ...... load, 10, 11 ...... inverter, R ₁ to R ₄ ...... resistance, C ...... capacitor, OA
…… Computation amplifier.

Claims (1)

[Claims] 1. A control amount of a control target load operated by an AC electric motor driven by an inverter is detected, and an output frequency of the inverter is changed according to a difference between the control amount detection value and its target value. In an output frequency control circuit of an inverter control system for controlling the controlled variable to its target value, an instantaneous value including a ripple of the detected controlled variable is compared with the target value, and the on / off control is performed in accordance with the magnitude relationship between the two. A comparator for outputting a value signal, an arithmetic circuit for performing a logical product operation of the binary output signal and a reference pulse signal and a count comparison of the results, and an ON or OFF of the output pulse of the operation result by the arithmetic circuit. The magnitude relationship between the average value of the control amount detection values and the target value is determined depending on whether or not each of the same states continues for a specified number of times or more, and the inverter is determined according to the determination result. The output frequency control circuit of an inverter, characterized in that to provide any of the control command in the tripartite decreased and current status continues and increases with respect to the output frequency of the motor.