JPH0666964B2 - Recording device - Google Patents

Description

The present invention relates to a recording apparatus suitable for application to an integrated video or the like.

BACKGROUND ART AND ITS PROBLEMS In a recording device such as an integrated video, a color video signal is divided into a luminance signal and a pair of component color signals and recorded on separate tracks. Therefore, at the time of reproduction, it is necessary to align the time axes of the luminance signal and the pair of component color signals simultaneously reproduced from different tracks, and therefore, the luminance signal and the pair of component color signals respectively have the same time axis. A reference pulse that serves as a reference may be inserted.

It is conceivable to use a sync pulse inserted in the luminance signal as the reference pulse, for example, a horizontal sync pulse, but since the level of the horizontal sync pulse is generally low and the S / N is poor, it is necessary to correctly perform sync separation during reproduction. Cannot be performed or the sync pulse portion is easily disturbed by noise, and thus the time axis of the separated horizontal sync pulse is easily changed.

Further, as will be described later, the luminance signal is FM-modulated and then recorded on a tape or the like. In this case, the FM modulation method is a low carrier FM modulation method, and the white level of the luminance signal is high. Since the carrier frequency is modulated and the black level is modulated with a low FM carrier frequency, the FM carrier frequency of the horizontal sync pulse after pre-emphasis is lower than the FM carrier frequency of the black level. For this reason, moire due to aliasing occurs.

For this reason, the horizontal sync pulse cannot be used as a reference pulse on the time axis. Therefore, a pulse different from the horizontal sync pulse is prepared as the reference pulse on the time axis, and this is used as a luminance signal at an appropriate timing. And a pair of component color signals.

However, even when inserting this other reference pulse, the pulse insertion position, pulse polarity, pulse width, etc. should be sufficient so that this reference pulse does not affect the horizontal sync pulse or the playback image such as synchronization disturbance or deterioration of image quality. Need to consider.

SUMMARY OF THE INVENTION It is therefore an object of the present invention to insert the reference pulse so that the time axes of the channels can be aligned accurately, and that the synchronization insertion and the deterioration of the image quality due to the insertion of the pulse do not occur.

SUMMARY OF THE INVENTION Therefore, according to the present invention, the above object is realized by inserting a rectangular wave signal serving as a reference of a time axis such as a reference pulse into a portion corresponding to the latter half of the horizontal blanking period, especially the horizontal synchronizing pulse. Is.

EXAMPLE Next, an example of the present invention will be described in detail with reference to the drawings. In the examples shown in FIG. 1 and the following, a color video signal is divided into a luminance signal and a pair of component color signals, and these are separately divided into two parts.
This is a case where recording is performed on one track (simultaneous recording on two channels), and red and blue color difference signals RY and BY are used as a pair of component color signals.

FIG. 1 shows a recording / reproducing apparatus (10) to which the present invention is applied, (10A) shows a recording apparatus, and (10B) shows a reproducing apparatus.

In the recording apparatus (10A), the terminal luminance signal Y adder including the supplied horizontal synchronizing pulse P _H in (1) (2), combined between channels time, i.e. the time combined with the pair of component color signals First, which serves as the reference for the time axis
_Is combined with the rectangular wave signal P _R1 .

As the first rectangular wave signal P _R1 , a rectangular wave signal (hereinafter referred to as a first reference pulse) P _R1 having the same period as the horizontal synchronization as shown in FIG. 2B is used. As will be described later in detail, the first reference pulse P _R1 is _added to the pulse P in the latter half of the horizontal synchronizing pulse P _H as shown in FIG.
Insertion and addition are performed with the opposite polarity to _H.

(3) is a circuit for forming the first reference pulse P _R1 , which is a sync separation circuit.
The first reference pulse P _R1 is formed based on the horizontal synchronizing pulse P _H output from (4).

Incidentally, W _H represents a pulse width of the pulse P _H, in this example the pulse width of the first reference pulse P _R1 is chosen to 1 / 2W _H.

The luminance signal S _Y in which the first reference pulse P _R1 is inserted is given the pre-emphasis characteristic by the pre-emphasis circuit (9) (FIG. 2D) and then FM-modulated by the FM modulator (5). The FM modulated output S _Y -FM is recorded on the tape (6).

In this example, two-channel recording is performed, so that the red and blue color difference signals R-Y and BY are compressed by the compressor (40) to have their time axis halved and the compressed color difference signal R-Y. -Y,
After BY is arranged alternately, it is combined with the second rectangular wave signal (hereinafter referred to as the second reference pulse) _{PR2 in} the adder (7). The second reference pulse P _R2 has a fixed time relationship (the same time position in the embodiment) with the first reference pulse P _R1 inserted in the luminance signal Y, and both of them are the luminance signal Y and the color difference signal R. It is used as a reference for time adjustment with -Y and BY. The above-mentioned first reference pulse P _R1 is directly inserted as the second reference pulse P _R2 ,
The compressed color difference signal S _C as shown in FIG. E is formed.

The compressed color difference signal S _C is FM-modulated by the FM modulator (8) and then recorded on the tape (6). In this case, a recording track for the compressed color difference signal is formed so as to be adjacent to the recording track for the luminance signal S _Y.

Next, the reproducing device (10B) will be described. The FM-modulated reproduction luminance signal S _Y -FM is demodulated by the demodulation circuit (11) and then supplied to the time axis corrector (TBC) (12) so that the time axis of the reproduction luminance signal S _Y containing jitter is Aligned.
Therefore, the reproduction luminance signal S _Y is supplied to the pulse separation circuit (13) and the first reference pulse P _R1 is separated, and this is the time base reference output from the reference oscillator (14) in the phase comparator (15). The phase of the pulse P ₀ is compared and the output thereof controls the delay time of the variable delay element (16).

The reproduction luminance signal S _Y aligned on the time axis is a pulse removing circuit.
The first reference pulse P _R1 is removed by being supplied to (17). This horizontal synchronizing pulse P _H is returned to the normal pulse width.

On the other hand, the FM-compressed reproduced compressed color difference signal S _C -FM is demodulated by the demodulation circuit (19) and then supplied to the level corrector (20) to correct the level fluctuation between lines occurring during the compression operation. That is, the compressor (40) is composed of a plurality of delay elements as will be described later, but since the transfer characteristics and temperature characteristics of these plurality of delay elements are usually slightly different, there is a difference in these characteristics. Therefore, there is a difference in the output level of each delay element. This level difference is line crawling on both sides.

The level corrector (20) averages the levels between the lines to prevent line crawling.

FIG. 3 shows an example of the level corrector (20), which has a delay time of one horizontal scanning period (1H) in order to synthesize the compressed color difference signals RY and BY between adjacent horizontal lines. It has an element (21), an adder (22), and a level adjuster (23) that reduces the combined output level to 1/2.

The time axis of the averaged compressed color difference signal S _C is corrected by TBC (25). Therefore, the pulse separation circuit (26)
The second reference pulse P _R2 is separated from the compressed chrominance signal S _C by this, and this is compared in phase with the reference pulse P ₀ by the phase comparator (27), and the delay time of the variable delay element (28) is controlled by its output. As a result, a jitter-free compressed color difference signal S _C is formed.

The compressed color difference signal S _C whose time axis has been corrected is a time axis expander.
At (29), it is expanded to the original time axis and separated into the respective color difference signals RY and BY, each of which is an encoder.
The carrier color signal C _C is formed by being supplied to (30). The carrier color signal C _C is frequency-multiplexed with the luminance signal Y in the synthesizer (31) to reproduce the well-known color video signal S _TV .

Note that (35) is a monitor terminal.

Now, FIG. 4 is a system diagram showing an example of the compressor (40) and its control circuit (50). The compressor (40) has four delay elements (41A) to (41D) as shown in the figure. And a first delay element and a third delay element
For example, a red color difference signal RY is supplied to (41A) and (41C), and a blue color difference signal BY is supplied to the second and fourth delay elements (41B) and (41D). A CCD is used for each of the delay elements (41A) to (41D), and each is selected to have a delay time corresponding to 1H.

After the delay elements (41A) to (41D), there is provided a switching circuit (42) for selecting compressed color difference signals which are delayed outputs and arranging them sequentially and alternately. In this example, the first switch SW ₁ for selecting the output of the first and second delay elements (41A), (41B), the third and fourth delay elements (41C), (41C)
D) second switch SW ₂ for selecting output and third switch SW ₃ for further selecting these selected outputs
And constitute a switching circuit (42).

The compression operation of the color difference signals using these delay elements (41A) to (41D) will be described with reference to FIGS. 5 and 6.

First, as shown in FIG. 5, first and second delay elements (41A)
The write mode is selected for each line so that the odd lines are in the write mode in (41B) and the even lines are in the third and fourth delay elements (41C) and (41D).

Then, while the third and fourth delay elements (41C) and (41D) are in the write mode, respectively, the first and second delay elements (41
A) and (41B) are controlled in the read mode. in this case,
The frequency _R of the read clock CK _R is selected to be twice the frequency _W of the write clock CK _W , so that the input color difference signals R-Y and B-Y are output with their time axes compressed to 1/2. To be done.

In this example, the first delay element (41A) is used in the first half period (0.5H) of one horizontal scanning period so that the read modes of the first and second delay elements (41A) and (41B) do not overlap. The second delay element (41B) is applied to the read mode of
It is applied to the read mode of.

Therefore, when the color difference signal RY as shown in FIGS. 6A and 6D is input, the time is shown from the first and second delay elements (41A) and (41B) at the timings shown in FIGS. The compressed color difference signals (RY) _A and (BY) _{B of the} axes are output, and these are sequentially and alternately selected by the first switch SW ₁ to form a signal train as shown in FIG. Be organized.

The reference point for compression on the time axis is selected during the horizontal blanking period, particularly in this example, immediately after the insertion of the reference pulses P _R1 and P _R2 .

When the first and second delay elements (41A) and (41B) are in the write mode, the third and fourth delay elements (41C) and (41D) are controlled to the read mode, and the read mode and the second delay element Since the selection timing of the switch SW ₂ is the same as that described above, the third and fourth delay elements (41C) and (41D) output the compressed color difference signal on the time axis at the timings shown in FIGS. 6C and 6F. (RY) _C and (BY) _D are output and organized into the signal sequence shown in FIG. Therefore, in the odd line, the third switch SW ₃ is switched as shown by the broken line.

Next, the control circuit (50) for achieving these writing, reading mode and switching mode will be described with reference to FIG. 4 again.

The control circuit (50) has a reference clock generator (51), which is a PLL, and the oscillation frequency of the VCO (52) is selected to be an integral multiple of _H. Of course, the integer value is the delay element (41)
The number of bits is the same as that of 682 in this example. 1/2 This oscillation output counter (53), are respectively counted down 1/341 in the next counter (54), _H count output P _{D (Fig.} 7 G) is the integrator at (55) thereof The rising portion is integrated to form an integrated output P _I shown in FIG. 6H, which is then supplied to the phase comparator (56).

On the other hand, the first mono-multivibrator (58) is triggered by the horizontal synchronizing pulse P _H (D in the figure) separated from the reproduction luminance signal S _Y supplied to the terminal (57), and 1
Of multiple outputs M ₁ are formed. First multi-output M ₁
The pulse width of the horizontal synchronizing pulse P is as shown in FIGS.
_Although it is selected to be wider than the pulse width WH of _{H and} narrower than the horizontal blanking pulse width, it is configured as a variable mono-multivibrator so that the pulse width can be varied. The first multi-output M ₁ triggers the second mono-multivibrator (59) to form the second multi-output M ₂ of FIG. F, which is integrated by the phase comparator (56). P
_It is phase compared to _I and its output controls the VCO (52). 1/2 _H count output P _D and this at the counter (45)
The count output P _DD of 1/2 _{H which} has been counted down is supplied to the switching pulse forming circuit (70), from which the first to third switches SW _{1 to} SW ₃ are shown in FIGS. 5 and 6. A switching pulse P _S that switches at a timing is formed.

Although detailed description of the switching pulse forming circuit (70) is omitted, the switching pulse P _S1 having the same phase as that of FIG. 7G and the switching pulse P _S2 having the same phase as that of FIG. The second switch SW ₁ , SW ₂ is controlled by the switching pulse P _S1 and the third switch SW ₃ is controlled by the remaining switching pulse P _S2 .

In the figure, when the switching pulses P _S1 and P _S2 are “H”, they are switched as shown by the solid line.

Oscillation output of 682 _H outputted from the reference clock generator (51), i.e. the reference clock CK _R is used as a write clock to the delay element (41), counter to this
The reference clock CK _W that has been counted down to 1/2 in (53) is used as the write clock.

These writing and reading clocks CK _W and CK _R are supplied to the corresponding delay elements (41A) to (41D) only during the period for writing or reading, as shown in FIGS. The reason why the delay elements (41A) to (41D) are driven only during the writing or reading period is to prevent the clock pulse applied to the delay element not used as an output from jumping into the output. Therefore, a clock gate circuit (60) is provided.

As shown in FIG. 8, the gate circuit (60) is composed of a plurality of NAND gates and a logic gate using a plurality of NOR gates. The gate circuit (60) has a write / read clock CK.
Along with _W and CK _R , a counter output P _{D of H and} a counter output P of which the counter (45) counts down to 1/2
_DD (Fig. 7I) is supplied respectively. Then, the counter outputs P _D and P _DD and the respective inverted outputs obtained by the inverters (61) and (62) And (FIG. 9 to D), 4 pieces of NOR gate (63A) ~ (63D) and de read clock CK gates for _R pulse _G A ~G _D
(E to G in the figure) are formed. (64A) ~ (64D) is a NAND gate for gating a read clock CK _R.

Further, (65A) and (65B) are NAND gates for gate of the write clock CK _W , the counter output P _DD is supplied as a gate pulse G _E (I in the same figure) to the NAND gate (65A), and the inverted output Is the gate pulse G _F for the other NAND gate (65B)
(J in the same figure). The gate timings of the write clock CK _W and the read clock CK _R are controlled by the four NAND gates (66A) to (66D) provided at the final stage.

Therefore, as shown in FIG. 9, in the odd line, the input of the read clock CK _{R to} the NAND gates (66A) and (66B) is blocked by the action of the gate pulses G _A and G _B , while the gate pulse G _A and G _B are blocked. write clock CK _W by G _E passes through the NAND gate (65A) a pair of NAND gates (66A), from input to (66B), first and second delay elements (41A), the (41B) write mode .

In the even-numbered line, the gate pulse G _E blocks the input of the write clock CK _{W to} the NAND gates (66A) and (66B), while the gate pulses G _A and G _B block the NAND gates (64A) and (64B). ) is read clock CK _R a pair of NAND gate open (66A), (from respectively inputted to 66B), a pair of delay elements (41A), the (41B) is read mode.

However, during the first half of the even-numbered line, the gate pulse G
Since the delay elements (41A) only read clock CK _R by the action of _A is supplied, the color difference signals compressed from the delay element (41A) (R-Y) A is obtained. Therefore, the second half of the delay elements by the gate pulse G _B in the horizontal scanning period (41B) for reading the clock CK _R will be supplied only, the other delay element (41B) compressed color difference signals from the (B-Y) _B can be obtained.

With respect to the remaining delay elements (41C) and (41D), the gate pulses G _C , G _D and G _F work to control the same operation mode on a different line from the above.

In the present invention, as described with reference to FIGS. 1 and 2, the first reference pulse P _R1 has a polarity opposite to that of the horizontal synchronizing pulse P _{H in} the latter half of the horizontal synchronizing pulse P _H. Insertion and addition are performed with a level sufficiently larger than the level of the horizontal synchronizing pulse P _H.

The first reference pulse P _{R1 is provided in} the latter half of the horizontal synchronizing pulse P _H.
The reason why the reference pulse P _R1 is inserted is to prevent the level of the front porch from varying and the waveform of the falling portion of the horizontal synchronizing pulse P _{H from} being disturbed.

The polarity of the first reference pulse P _R1 is selected to be opposite to that of the horizontal synchronizing pulse P _H in order to prevent the occurrence of moire. That is, as described above, the luminance signal S _Y
The low carrier FM modulation method is used for the FM modulation of the above. Therefore, the polarity of the first reference pulse P _R1 is set to the horizontal synchronization pulse P _H.
If the same polarity is selected (see Fig. 10A), the first
Since the FM carrier frequency of the reference pulse P _R1 of 1 is the same as that of the horizontal synchronizing pulse P _H , or even lower in the example of FIG. 10, aliasing distortion is likely to occur, which causes moire.

To minimize moire, the first reference pulse
The FM carrier frequency of P _R1 must be increased.
Therefore, the polarity of the first reference pulse P _R1 is selected to be opposite to that of the horizontal synchronizing pulse P _H.

When the luminance signal S _Y having the polarity shown in FIG. 10A is pre-emphasized, a waveform as shown in FIG. 10B is obtained, but when the pre-emphasized luminance signal S _Y is dark clipped, the first signal is obtained as shown by a broken line. Since the waveform of the falling portion of the reference pulse P _R1 of 1 is distorted, the time axis of this falling portion easily changes due to the inclusion of noise or the like. Therefore, the falling portion cannot be used as the reference point on the time axis, and the function as the reference pulse on the time axis is lost. Also from this, the polarity of the first reference pulse P _R1 is the horizontal synchronization pulse P _R1.
It is necessary to select the polarity opposite to _H.

The first reference pulse P _R1 is inserted at a level sufficiently larger than the level of the horizontal synchronization pulse P _H in order to improve the S / N and facilitate the sync separation, but the level is set to the second level.
As shown in the figure, the level (absolute value) of the horizontal synchronizing pulse P _H
Larger than the white level and smaller than the white level.

If a value near the white level or a level higher than the white level is selected, the waveform of the rising portion of the reference pulse P _R1 is distorted by the white clip operation, and thus a value smaller than the white level is selected. In this example, when the white level is 100 IRE (luminance level), the sync tip level is 90 IRE at maximum.

Then, the pulse width of the first reference pulse P _R1 is selected narrower than the pulse width W _H of the horizontal synchronizing pulse P _H,
The pulse width and the insertion timing are selected so that the falling time thereof is slightly behind the rising time of the horizontal synchronizing pulse P _H. This is based on the following reasons.

That is, the rising portion of the actual horizontal synchronizing pulse P _H is
Since there is some inclination as shown in Fig. 11A, for example, W _R = 1 /
Select the 2W _H, and if you choose a point 1 / 2W _H with respect to the falling point of the insertion timing horizontal sync pulses P _H (FIG. 11 B), the waveform after insertion figure C This is because there is a possibility that the beard q like this remains and is affected by the beard q when the reference pulse is extracted.

Therefore, in this example by selecting W _R a 1 / 2W _H slightly wider than as shown in FIG. 11 D, the delay slightly than the rise time of the reference pulse P _R1 fall time of the horizontal synchronizing pulse P _H of This eliminates the occurrence of beard q (Fig. E).

Adder when the first reference pulse P _R1 is selected in this way
An example of (2) is shown in FIG. The first reference pulse P _R1 can be inserted by resistance addition as shown in the figure, and therefore, a pair of resistors (8
It can consist of only 0), (81) and adder (82).

Figure 13 and Figure 14 is a specific example, the luminance signal Y including the horizontal synchronizing pulse P _H is supplied to the transistor to Q ₁ emitter grounded, the grounded base its output via a resistor (80) It is supplied to the adding transistor Q ₂ . On the other hand, the first reference pulse P _R1 passing through the resistor 81 and the level adjusting resistor 83 is supplied to the transistor Q ₂ and added to the horizontal synchronizing pulse P _H.

FIG. 14 shows the case where a transistor Q ₂ having a grounded emitter is used, and FIG. 15 shows the case where a differential amplifier is used as the adder (82).

Since the pulse width W _R of the first reference pulse P _R1 is about ½ _WH , nothing is inserted on the back porch side of the pulse P _H. Therefore, a pedestal clamp or the like can be performed on the back porch side as usual.

By the way, as shown in FIG. 1, a gate circuit (90) is provided in the reference pulse insertion system, and the vertical blanking pulse VBL
At K, the first reference pulse P _R1 is gated. Therefore, the first reference pulse P _R1 is the horizontal synchronization pulse P _R1 only during the scanning period.
_It is added to _H and is not added during the vertical blanking period.

This is done in order to avoid malfunction of the vertical sync separation circuit provided in the recording device (10A) or the like. That is, since the separation of the vertical sync pulses using an integrating circuit, inserting a first reference pulse P _R1 during the vertical blanking period, because even result in integration to the first reference pulse P _R1.

When the first reference pulse P _R1 is inserted as shown in FIG. 2C, the demodulation output obtained at the terminal (35) in FIG. 1 contains horizontal and vertical synchronizing pulses. The video content can be monitored based on this demodulation output.

However, when only the first reference pulse P _{R1 serving} as the reference of the time axis is inserted instead of the horizontal synchronizing pulse P _H , this demodulated output cannot be used as a signal for monitoring.

Next, another embodiment of the present invention will be described.

The second rectangular wave signal P _R2 has a color signal S at the same time point as the first rectangular wave signal P _R1 or at a time point having a fixed time relationship.
If inserted in _C , the waveform, polarity, etc. will be the first rectangular wave signal.
It may not be the same as P _R1 and may be the same. The polarity may be opposite to that of the first rectangular wave signal P _R1 .

The reason why the polarities may be reversed is that if the polarities are reversed, there is a slight disadvantage in that moire is prevented, but the color difference signals R-Y,
This is because the frequency band of BY is narrower than that of the luminance signal Y, so that there is no visual problem.

The pair of component color signals to be compressed may be I and Q signals.

Color video signals are not recorded simultaneously on 2 channels,
3 channels can be recorded simultaneously. In this case, a luminance signal Y and a pair of color difference signals RY and BY are provided for each channel.
Alternatively, the I signal, the Q signal, or the three primary color signals of R to B are recorded, and a rectangular wave signal serving as a time axis reference is inserted into each of them.

Therefore, the present invention is extremely suitable when applied to an integrated video or the like.

EFFECTS OF THE INVENTION As described above, according to the present invention, in a recording device in which a frequency-modulated color signal and a luminance signal are recorded on different tracks, the luminance signal serves as a reference of a time axis. The rectangular wave signal of is inserted only in the scanning period other than the vertical blanking period, and the second rectangular wave signal having the leading edge having a fixed time relationship with the leading edge of the first rectangular wave signal is inserted in the color signal. Therefore, it is not necessary to use the horizontal synchronizing pulse P _H , the time axis of which easily fluctuates due to noise or the like, as a reference signal for time adjustment, time can be accurately adjusted between channels, and synchronization disturbance does not occur.

The first square wave signal with respect to the horizontal synchronizing signal, polarity reversed, the amplitude is large, and the width is narrow, FM carrier frequency of the first rectangular wave signal from the horizontal synchronizing pulse P _H Therefore, the occurrence of moire due to aliasing distortion is prevented, and deterioration of image quality can be reliably prevented. Moreover, the large amplification makes it possible to easily separate the first rectangular wave signal,
Further, there is no influence such as level fluctuation on the parts before and after the horizontal synchronizing signal.

In addition, the maximum level of the first rectangular wave signal is set lower than the white level of the luminance signal, and the leading edge of the first rectangular wave signal is positioned within the horizontal synchronizing signal period, and the first rectangular wave signal is Since the trailing edge is positioned at a time point slightly later than the trailing edge of the horizontal synchronizing signal, the waveforms of the rising portion and the falling portion of the reference pulse are not distorted, and the reference pulse can be accurately extracted.

[Brief description of drawings]

FIG. 1 is a system diagram showing an example of a suitable recording / reproducing apparatus to which the present invention is applied, FIG. 2 is an operation explanatory diagram thereof, FIG. 3 is a system diagram showing an example of a level corrector, and FIG. A system diagram showing an example of a signal compression system which is an essential part of the invention, FIGS. 5 to 7 are explanatory diagrams of its operation, FIG. 8 is a system diagram showing an example of a gate circuit, and FIG. 9 is its explanatory diagram. Waveform diagram to be provided, FIG. 10 and FIG. 11 are waveform diagrams used to explain the present invention, FIG. 12 is an explanatory diagram of an adder, and FIGS. 13 to 15 are diagrams showing specific examples of the adder. is there. (10A) is a recording device, (10B) is a reproducing device, (40) is a compressor, and (1
2) and (25) are TBCs, (28) is a stretcher, (50) is a control circuit, and (5)
1) is a reference clock generator, (41) is a delay element, (42) is a switching circuit, (60) is a gate circuit, (70) is a circuit for forming a switching pulse P _S , and CK _W and CK _R are write and read. Clocks, P _R1 and P _R2 are first and second rectangular wave signals, and P _H is a horizontal synchronizing pulse.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-57-118490 (JP, A) JP-A-50-7427 (JP, A) Jikken-44-27365 (JP, Y1)

Claims (1)

[Claims] 1. A color signal obtained separately from a video signal and a luminance signal including a horizontal synchronizing signal are frequency-modulated so that the frequency becomes higher in the white level direction of the luminance signal, and these frequencies are generated. In a recording device in which each of the modulated color signal and the luminance signal is recorded on a separate track, the luminance signal includes a first rectangular wave signal serving as a time axis reference in a scanning period other than a vertical blanking period. And a second rectangular wave signal having a leading edge having a fixed time relationship with the leading edge of the first rectangular wave signal is inserted into the color signal. The signal is
The polarities are opposite, the amplitude is large and the width is narrow, the maximum level of the first rectangular wave signal is lower than the white level of the luminance signal, and the leading edge of the first rectangular wave signal is A recording apparatus, wherein the recording device is located within the horizontal synchronizing signal period, and the trailing edge of the first rectangular wave signal is positioned at a time point slightly later than the trailing edge of the horizontal synchronizing signal.