JPS6260394A - Time base compression and expansion device for recording and reproducing device - Google Patents

Abstract

PURPOSE:To simplify a circuit constitution by selectively executing the 1/2 times time base compression and twice times time base expansion through the use of four analog delay elements having time delayed by 1/2 horizontal scan period so as to share a circuit with a recording system and a reproducing one. CONSTITUTION:At recording, color difference signals R-Y and B-Y from input terminals 1 and 2 are supplied to the group of analog delay elements CCDs 61 and 62 and that of 63 and 64, respectively. The 1st and 2nd time base compression color difference signals are taken out of switches 7 and 8 at every 0.5H period, and only the 2nd signal is taken out through a 0.5H delay circuit 10 as a sequential signal alternately synthesized in time series. At reproduction, the CCDs 61 and 62 switch the frequency of the reproduced sequential signal arriving at an input terminal 3 at every 2H period in such a way that during a 0.5H period followed by the 1H period at a frequency fS/2 frequency is fS, and during the next 0.5H period frequency is zero. Moreover, the signals are synchronously switched so that when the one is the frequency fS, the other is fS/2. The CCDs 63 and 64 switch the frequency at every 2H in such a way that the FS is attained during 0.5H period after a clock stops, during the next 1H period the frequency is fS/2, and during the next 0.5H period, the clock stops.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a time axis compression/expansion device for a recording/reproducing device.
In particular, in a magnetic recording/reproducing device, two information signals are compressed on the time axis and then recorded sequentially as signals, and during playback, this sequential signal is expanded on the time axis to separate the original two information signals. This invention relates to a compression and decompression device.

Conventional technology Two information signals whose time axes have been expanded are synthesized alternately in time series at regular intervals to create a sequential signal, which is modulated using a predetermined modulation method and then recorded on a recording medium. As a recording and reproducing method, the time axis of the sequential signal obtained by demodulating the signal is extended, thereby returning it to the original time axis, and obtaining two separated information signals. In a broadcasting camera-integrated VTR, etc., there is a component used in a color signal recording/reproducing system of a component recording method in which a luminance signal and a color signal are recorded on separate tracks.

This device is transmitted simultaneously with the luminance signal schematically shown in Fig. 10(A), and two types of color difference signals (R-Y) and (B After compressing the time axes of -Y) to 1/2, they are synthesized alternately in time series to form a sequential signal as schematically shown in FIG.

Figure 11 (△) shows the waveform of the above luminance signal;
B) shows the waveform of the above sequential signal, and the horizontal synchronization signal port S
The starting point of time axis compression is located 5.3 μs after the leading edge of . Thereafter, the above sequential signals are frequency modulated and then recorded on the magnetic tape by a rotating head. Also,
During this recording, a brightness signal frequency-modulated by another rotary head is recorded simultaneously with the frequency-modulated sequential signal (FM sequential signal) and forming a separate track.

During reproduction, two recording track groups are scanned separately and simultaneously, and the above-mentioned FM sequential signal and FM luminance signal are reproduced separately and simultaneously.

After the above-mentioned FM sequential signal is FM demodulated, the time axis is expanded twice and returned to the original time axis, and the reproduced color difference signals RY and BY are extracted in parallel by being separated.

Problems to be Solved by the Invention However, in the above-mentioned conventional magnetic recording and reproducing apparatus, the recording system is provided with means for sequentially compressing the two types of color difference signals in the time axis, expanding the reproduced signal in the time axis, and , it is necessary to provide a means for separating two types of color difference signals in the reproduction system, which requires a large number of parts, and the circuit configuration is complex and expensive because it uses digital memory to compress and expand the time axis. There were some problems.

SUMMARY OF THE INVENTION Therefore, the present invention provides a time axis compression/expansion device for a recording/reproducing device that solves the above problems by using an analog delay element to perform both time axis compression and time axis expansion in one circuit. With the goal.

Means for Solving the Problems The time axis compression/expansion device of the recording/reproducing device according to the present invention is as follows:
a first switching means for selectively outputting one of the two types of information signals and the reproduction sequential signal to the two transmission paths; and after writing the signal from the first switching means based on a clock pulse of a first frequency. A time axis conversion circuit having analog delay elements each having a delay time of 1/2 horizontal scanning period; a second switching means for selectively outputting the read output signals of the two analog delay elements; a third switching means for selectively outputting the output signals of the second switching means;
It consists of a delay circuit that delays the input signal or output signal of one set of analog delay elements with respect to the input signal or output signal of the other set of analog delay elements by 1/2 horizontal scanning period in phase.

At the time of action recording, two scales of information signals are separately selected and outputted to two transmission paths by the first switching means, and the second
The frequency is selected to be twice the first frequency, and the time axis conversion circuit performs 1/2 time axis compression. As a result, the time axis of the two types of information signals is compressed by 1/2 by the third switching means, and a sequential signal is obtained by chronologically combining the two types of information signals alternately every 1/2 horizontal scanning period. is taken out. On the other hand, during reproduction, the first switching means selectively outputs the sequential signals to the two transmission paths, and the second frequency is selected to be 1/2 of the first frequency, and the time axis is The conversion circuit performs twice the time axis expansion. As a result, the two types of information signals returned to the original time axis by the second switching means are separated and output.

Embodiments Hereinafter, each embodiment of the present invention will be described with reference to the drawings. FIG. 1 shows a block system diagram of a first embodiment of the apparatus of the present invention. In the figure, color difference signals R-Y and B-Y, which are examples of two types of information signals, are input to input terminals 1 and 2, respectively, while sequential signals, which will be described later, are input to input terminal 3. . Color difference signal R-Y.

B-Y is supplied to contacts R of switches 4 and 5 constituting the first switching means S1, and the above sequential signals are supplied to contacts P of switches 4 and 5, respectively. Here, the time axis compression/expansion apparatus of the present invention is used, for example, in a recording and reproducing apparatus having the configuration shown in FIG. 9, and the configuration of this recording and reproducing apparatus will first be explained.

In FIG. 9, during recording, a luminance signal is input to the input terminal 20, and color difference signals R-Y, B- are input to the input terminals 21 and 22.
Y comes and goes. During recording, the luminance signal that has entered the input terminal 20 is supplied to the synchronizing signal separation circuit 24 through the switch 23 connected to the contact REC side, while being supplied to the FM modulator 25 . Recording amplifier 26. During recording, the signal is supplied to the rotary head 28 through the switch 27 connected to the contact REC side. On the other hand, the color difference signal R- inputted to the input terminal 21
Y is supplied to two synchronization signal addition circuits, where the horizontal synchronization signal from the synchronization signal separation circuit 24 is added, and then input to the input terminal 1 of the time axis compression/expansion circuit 30, which constitutes the main part of the present invention. supplied to In addition, the color difference signal 8B from the input terminal 22
-Y is supplied to the input terminal 2 of the time axis compression/expansion circuit 30.

On the other hand, the horizontal synchronization signal taken out from the synchronization signal separation circuit 24 is supplied to a clock generator 31 and a control pulse generator 32, respectively. A clock generator 31 generates a high frequency clock that is phase-synchronized with the horizontal synchronization signal and supplies it to a control pulse generator 32 and a clock controller 33, respectively. The control pulse generator 32 generates control pulses for controlling the switching of second and third switching means S2 and S3, which will be described later, of the time axis compression/expansion circuit 30, respectively, to the time axis compression/expansion circuit 30 and the clock controller 33. supply clock controller 3
3 are four types of clock pulses CK1.3 to be described later. CK2. C
K3 and CK4 are generated respectively, and the frequency is set to f.
S or fs/2 at a predetermined timing and supplies it to the time axis compression/expansion circuit 30. Furthermore, the switching control signal from the input terminal 34 is supplied to the time axis compression/expansion circuit 30.
A first switching means 'S+, which will be described later, is switched depending on whether recording or reproduction is being performed.

As will be described later, the time axis compression/expansion circuit 30 compresses the time axis of the color difference signals R-Y and B-Y by 1/2 during recording, and then sequentially compresses them in time series every 1/2 horizontal scanning period. and generates a sequential signal, and outputs this sequential signal to output terminal 1.
Output to 1. This sequential signal is sent to the FM modulator 35. Recording amplifier 36. During recording, the signals are supplied to the rotary head 38 through the switches 37 connected to the contact REC side.

The rotating heads 28 and 38 are a pair of rotating heads mounted opposite to each other on the rotating surface of a rotating body such as a rotating drum, and are mounted close to each other. Further, the three magnetic tapes are wound obliquely around the above rotating body over an angular range of over 180 degrees, and are made to run at a predetermined constant speed. As a result, there are tracks on the magnetic tape 39 in which frequency-modulated luminance signals (FM luminance signals) are recorded by the rotary head 28, and tracks in which FM sequential signals are recorded by the rotary head 3.
8 are formed simultaneously and separately, and thereafter two tracks are formed for each field.

Next, the operation during reproduction will be explained. During reproduction, the switches 23, 27 and 37 are respectively switched to the contact PB side. Since the rotary heads 28 and 38 scan the two tracks separately, the rotary head 28 outputs FMIii.
The frequency signal is re-signaled, and at the same time, an FM sequential signal is reproduced from the rotary head 38. The FM brightness signal reproduced by the rotary head 28 is transmitted to the switch 27. Preamplifier 4
0 to the FM demodulator 41, where it is FM demodulated into a reproduced luminance signal and then output to the output terminal 42. On the other hand, the FM sequential signal reproduced by the rotary head 38 is transmitted to the switch 37. The signal is supplied to the FM demodulator 44 through the preamplifier 43, where it is FM demodulated into a reproduced sequential signal, and then supplied to the input terminal 3 of the time axis compression/expansion circuit 30. Here, the horizontal synchronizing signal added during recording is separated and extracted, and then supplied to a clock generator 31 and a control pulse generator 32, respectively.

Control pulse generator 32. Each output pulse of the clock controller 33 is supplied to a time axis compression/expansion circuit 30, respectively.

As a result, the time axis compression/expansion circuit 30 doubles the time axis of the input reproduction sequential signal, as will be described later, and separates the reproduction color difference signals R-Y and B-Y from the output terminal 1.
2.13 respectively in parallel and continuously. The reproduced color difference signal RY taken out from the output terminal 12 is supplied to a synchronization signal extraction circuit 45, where the horizontal synchronization signal added during recording is processed, and then output to the output terminal 46. In addition, the reproduced color difference signal B taken out from the output terminal 13
-Y is output to the output terminal 47.

Returning to FIG. 1 again, first, during recording, the switches 4 and 5 constituting the first switching means S+ are connected to the contact point R.
connected to the side. As a result, the color difference signal R-Y that has entered the input terminal 1 is passed through the switch 4 to a charge coupled device (CCD), which is an example of an analog delay element.
)6+ and 62, respectively. On the other hand, the color difference signal B-Y that has entered the input terminal 2 is passed through the switch 5 to the CCD 6.
3 and 64, respectively. That is, a set of two CCDs 6+ and 62 is installed on each of the two color difference signal transmission paths.
．． 63 and 64 are provided, and these two sets of CC
D6+ to 64 are the controllers 1 to roll pulse generator 3 described above.
2. Together with the clock controller 33, it constitutes a time axis conversion circuit.

CCD6+, 62, 63 and 64 are clock pulses C
K1. CK2. When CK3 and CK4 are supplied separately and the clock pulse frequency is fs, 1l2 horizontal scanning period <
It has a delay time of 1/2 H) minutes. - As an example, if the number of stages of CCDs 6+ to 64 is 455, the frequency fS will be about 14 MHz, which is 910 times the horizontal scanning frequency fH. The clock pulses CK1 and CK3 are switched so that the one-day period of the frequency fs and the one-hour period of the frequency fs/2 alternate, as schematically shown in 1H units in FIG. and CK4 are the 1H period of the frequency t's and the frequency f, respectively, as schematically shown in 1l1 units in FIG.
The 1-day period in which the 1H periods of s/2 are switched alternately and the clock pulses CK1 and CK3 are t's is fs/2, and the 1H period of fs/2 is t's.
The H period is defined as fS.

Now, the input color difference signals R-Y of CCD6+ and CCD62 are
The input color difference signals F3-Y of the CCDs 63 and 64 are shown as A+, A2, . . . in 1H units in FIG.

It shall be shown as... First 1H of color difference signal R-Y
1 to the period signal is a clock pulse CK of frequency fs/2
1 writes to the full capacity (all stages) of CCD6+, so when the frequency of clock pulse CK1 switches to fs during the next 1l-1l1 interval (2H), the signal is written in the first half of the 1H period, 0.5H period. AI is read out from the CCD 6+ as a signal A+' whose time axis is compressed by 112 times. At the same time, the 2H-th input signal Δ2 is written into the CCD 62 by the clock pulse GK2 having a frequency of fs/2 during this one-day period. Furthermore, the next 111 periods (3H
2), the input signal A3 is written to the CCD 6+ based on the clock pulse CK1 of frequency fs/2, while the signal Δ2' whose time axis is compressed by 1l2 in the first half 0.5H period is written as the clock pulse of frequency fs. It is read out from the CCD 62 based on pulse OK2. Hereinafter, in the same manner as above, the frequency f s / 2 of the CCDs 61 and 62
One COD to which a clock pulse of 1 is supplied performs a write operation, and the other COD reads a signal whose time axis has been compressed by 1/2, which is alternately repeated every 1H. FIG. 2 (D) schematically shows the operation of CCD6+, and FIG. This shows the 0 and 5H periods during which the output signal is being read.

The output signals of CCD 6+ and 62 are supplied to switch 7. The switch 7 together with the switch 8 is connected to the second switching means S2.
The control pulse generator 3 described above
Control pulses of frequency f H/2 from CCD 6+ and CCD 62 are used to alternately switch and connect each day so as to selectively output the output signal of the COD which is performing a read operation at clock frequency fs. As a result, as schematically shown in FIG. 2(F), the output signal of the switch 7 is as shown in FIG.
It is taken out every other time and supplied to the contact 9a of the switch 9 constituting the third switching means S3.

On the other hand, like the CCDs 6+ and 62, the CCDs 63 and 64, as schematically shown in FIG. 0.5H of the first half of the day period as shown by R
Color difference signal B- whose time axis is compressed to 1/2f8 in the period
Read the signal B+' etc. of the 11-1 period of Y and read the signal B+' etc. of the 11-1 period of Y, and
During the period, one COD performs a read operation at a frequency fS, and the other COD performs a write operation at a frequency fs/2.

Thereafter, the same operation as above is repeated alternately every 1H. The switch 8 is connected to the alternating current U every 1H so as to selectively output the output of the COD of the CCDs 63 and 64 whose clock pulse frequency is fS. As a result, switch 8 outputs o, 5HJ, which is the same as the output signal of switch 7.
A second time-domain compressed color difference signal is extracted at every IIJ interval. This second time-axis compressed color difference signal is delayed by 0.5H by the 0.5 day delay circuit 10 to become a signal as schematically shown in FIG. 2(J), and then is supplied to the contact 9b of the switch 9. Ru.

The switch 9 receives the input signal of the contact 9a in the first half of the 2H, the input signal of the contact 9b in the second half of the 2H, the input signal of the contact 9a in the first half of the 38th, and so on every 035H by a control pulse of frequency f+-+. By alternately selecting and outputting the input signals, the first and second time-axis compressed color difference signals are output from the switch 9 to the output terminal 11 in the order shown in FIG.
．． Sequential signals formed by time-series synthesis are taken out alternately every 58 times.

Next, the operation during reproduction will be explained. During reproduction, the switches 4 and 5 are respectively connected to the contact P side. As a result, the raw sequential signal inputted to the input terminal 3 is supplied to the C0Ds 61 to 64 through the switches 4 and 5, respectively. C.C.
As schematically shown in FIGS. 3(A) and (B), D6+ and 62 are connected to the next 0 between 1)(lrA) of frequency fs/2.
．． 5) (The frequency is fS during the 1m period, and the frequency is zero during the next 0.5H period, in other words, the pulse output is stopped. The frequency is switched every 2H period, and one is at the frequency fS.
When , the clock pulses CK1 and CK2 are driven by clock pulses CK1 and CK2 which switch synchronously so that the other is at fs/2. On the other hand, for CCDs 63 and 64, Fig. 3 (G) and (]'')
Clock pulses CK3.0 and 4 as shown schematically in
is supplied. Clock pulses CK3 and CK4 are 0.5 of the above clock pulse CK1゜CK3 is clock stopped.
Between 1 and 1 light, the frequency is S, and during the next 1H light, the frequency is fs/2.Furthermore, the clock is stopped for the next 0.5Hm, and so on, the frequency changes every 2H and 1 m, and the clock is Pulse CK4 is delayed in phase by 1H compared to CK3.

CCDs 6+ to 64 are not supplied with clock pulses,
During 5H111, the previous state is held and neither write nor read operations are performed.

The input reproduced sequential signals are schematically shown in FIGS. 3(C) and (T), and the signal ΔI' during the first 0.5H111] is regenerated by the clock pulse CKI of frequency fs to CCD6+
will be written to. At this time, since the CCD 61 operates as a 0.5 day delay circuit, the signal A+' with a period of 0.51''
is CCD6 by clock pulse CK1 of frequency t's.
At the point when all stages of + have been completely accumulated, the input of the clock pulse CK1 is stopped, and this state is maintained for a period of 0.5H thereafter.

On the other hand, during the 0 and 5H periods when the input of the clock pulse CK1 is stopped, the frequency of the clock pulse CK3 is fs.
Then, the signal B+' in the incoming sequential signals becomes C
It is written to all stages of CD63.

After that, the frequencies of the clock pulses CKI and CK3 are switched to fs/2 for the 1H period, so that the signals A+', which have been accumulated in all stages of the CCDs 6+ and 63,
B+' is expanded twice on the time axis and read out separately and simultaneously as signals A+ and B+. This CC
18 where D6+ and 63 are both performing read operation
In the first half of 0.5H light between 191 and 191, signal A2' is CCD6
2, the clock pulse CK2 of frequency t's is written to all stages, and the second half 0.5)-1 period is written to the signal B2'.
is written to all stages of C0D6a by clock pulse CK4 of frequency fS, and then CC is written in 1H period of post-washing.
From D62.6a, the time axis of the signal A 2 ′ l B 2 ′ is expanded by twice, and the signal A 2 ′ l B 2 ′ is expanded separately and simultaneously.
It is read out as °82. Thereafter, the same operation as above is repeated.

The operations of the above CCD6+ and 62 are shown in Fig. 3(D) and (
The operation of the CCDs 63 and 64 is schematically shown in Ll) and <K) of the same figure. Same figure (D),
In (E), (J), and (K), W indicates a 0.5H reading/output operation period, and R indicates a 1H readout operation period.

Switches 7 and 8 switch the back frequency f of CCD 6+ to 64.
Two Cs supplied with clock pulses of s/2
The output signal of the OD is switched and connected every 1H so that the output signal of the OD is selectively output.
As schematically shown in Figure (F), the color difference signals R-Y returned to the original time axis are synthesized and taken out in a time-series manner, and at the same time, the color difference signals RY returned to the original time axis are synthesized and taken out, while at the same time, the signals are sent from the switch 8 to the output terminal 13 in the same figure. (
As schematically shown in L), the color difference signal B-Y returned to the original time axis is extracted.

Next, a second embodiment of the apparatus of the present invention will be described. FIG. 4 shows a block system diagram of the second embodiment of the apparatus of the present invention. In the figure, the same components as those in FIG. This embodiment performs the same operation as the first embodiment during recording, but during reproduction, the clock pulse CKI'
-CK4' The frequency is continuously switched without stopping the generation of CK4'. That is, during reproduction, the clock pulses CK1' to CK4' supplied to the CCDs 6+ to 64 have a frequency of fS during the 05H period and a frequency of fs/2 during the next 1.5Hm, with a frequency of 2H. The clock pulse CK2' shown in FIG. 5(B) is delayed in phase by 1H compared to the clock pulse CK1' shown in FIG.
The clock pulse CK3' shown in (G) has a phase lead of 0.51-1 compared to CK1', and the clock pulse CK4' shown in (H) of the same figure has a phase delayed by 1H compared to CK3'.

The switch 7 selects and outputs the output signal of the COD of the CCDs 6+ and 62 to which the clock pulse frequency of fs/2 is supplied for a period of 1H from the time the clock pulse frequency is switched from fS to S/2. Similarly, the switch 8 selects the output signal of the COD which is supplied with a clock pulse of 1H period fS from the time when the frequency is switched from fS to fs/2 among the CCDs 63 and 64. The CCDs 6+ and 62 are schematically shown in Fig. 5 (D) and (E), and the CCD 63.6a is schematically shown in Fig. 5 (J) and (K>, respectively. As shown in the figure (C
) and N) are performed (indicated by W), and immediately after that, based on the clock pulse of frequency fs/2, the accumulated reproduction sequential signals of the 0 and 5H periods are written over time. The axis is expanded twice and the signal is read out for a period of one day (indicated by R), and the signal read out from the COD during the 1H1 period indicated by R is taken out from the switch 7.8. Therefore, the clock pulse t is applied to CCD6+ to CCD64.
0.5l - (also f s /
Clock pulses of two frequencies are supplied to perform the operation, and during this period, signals are read out from the COD, but the signals are not transmitted to the subsequent stage due to the switching operations of the switches 7 and 8.

In this way, the fifth
As schematically shown in Figure (F), the reproduced color difference signal B-Y returned to its original time axis is extracted. Further, as a result, the reproduced color difference signal R-Y returned to the original time axis is taken out from the switch 8 at an early timing of 0.5H period, and 0.
After being time-aligned with the reproduced color difference signal B-Y by the 58 delay circuit 10 as schematically shown in FIG. 5(L), the signal is output to the output terminal 12.

Next, to explain the third embodiment of the device of the present invention, the sixth embodiment
The figure shows a block system diagram of a third embodiment of the device of the present invention.

In the figure, the same components as in FIG. 1 are denoted by the same reference numerals, and their explanations will be omitted. This embodiment is characterized in that the 0.5H delay circuit 15 is placed on the input side of the CCDs 63 and 64. First, to explain the operation during recording, the input clock pulses CK1'', CK2'', CK3'' and CK4'' of CCD6+, 62.63 and 64 shown in FIG. 6 are as shown in FIGS. 7(A) and (B). , (G) and (H), the frequencies of t's and fS/2 alternately switch every day, and the clock pulses CK1'' and CK2
″ is when one is fS and the other is fs/2, and C
K 3 ″ is 0.5 days behind CK 1 ″, and G K 4 ″ is 0.5 H behind CK 2 ″.
The phase is delayed. FIG. 7(C) schematically shows the input color difference signal RY of the input terminal 1, and FIG. 7(1) schematically shows the input color difference signal B-Y of the input terminal 2 in units of 1H.

The CCDs 6+ and 62 perform the operations schematically shown in FIGS. 7(D) and (E), respectively, similarly to the first and second embodiments. On the other hand, the input color difference signals of the CCDs 63 and 64 are delayed by <0.5H by the 0.5H delay circuit 15 as schematically shown in FIG. As shown in (G) and (H), there is a delay of 0.58, so the first and second
Similarly to the embodiment, CCDs 63 and 64 are shown in the same figure (K) and (
The operations schematically shown in L) are performed. The switches 7 and 8 selectively output the output of the COD to which the clock pulse fS is supplied.
A time-axis compressed color difference signal as schematically shown in FIG. Further, the switch 9 selectively outputs the output signal of the switch outputting the signal among the switches 7 and 8. As a result, as schematically shown in FIG. 7(N), two types of color difference signals compressed in time axis by 1l2 are sent from the switch 9 to the output terminal 11 in a time-series manner alternately every 0.5H period. The sequential signals resulting from the synthesis are extracted.

Next, to explain the operation during reproduction, the clock pulses CK 1 '' and CK 3 '' during reproduction are shown in FIG. 8 (A
>, the frequency is fS during the 0.5 day period, and the following 1.
During the 5H period, the frequency is switched at a 2H cycle so that the frequency is f s / 2, and the clock pulses OK2'' and CK4'' are CK1'' as shown in FIG.
The frequency is switched with a delay of 1H compared to CK3''.

As schematically shown in FIGS. 8(C) and 8(G), the input playback sequential signals include switching of the frequency of clock pulses CK1 to CK4- and switching of the rtJ-axis compressed color difference signal at the first and second times. The time of connection is made to match. From this, CCD6+ and 62 are the eighth
As schematically shown in Figures (D) and (E), the sequential signals input and output during the 05H period at the frequency fs are converted to the frequency fs/2.
The read operation is performed over a period of 11'', and the switch 7 selects one of the CCDs 6+ and 62 whose clock frequency is f.
Convert the output signal of the COD, which is s/2, from fs to fs/2
Since the switching connection is made so that 1l1 light is output from the time of switching to , the connection from switch 7 to output terminal 13 is as shown in the figure (F)
As schematically shown in , the reproduced color difference signal B-Y returned to the original time axis is extracted.

On the other hand, the input reproduced sequential signal is passed through the 0.5H delay circuit 15 and is extended to CC as shown in FIG. 8(H).
Supplied to D63 and D64, respectively. On the other hand, the CCD 63 is supplied with the same clock pulse CK 3 '' as the CCD 6+, the CCD 64 is supplied with the same clock pulse CK 4 '' as the CCD 62, and the switch 8
is switched and connected every 1H at the same timing as switch 7, so from switch 8, CCDs 63 and 64 are connected to the eighth
The output signal during the read operation is taken out during the 1H period indicated by R in FIGS. (I) and (1), respectively.

The output signal of this switch 8 is a reproduced color difference signal RY whose time axis is expanded twice and returned to the original time axis, and which is synthesized in time series as shown in FIG. 8(K). Yes, and is output to the output terminal 12.

Note that the present invention is not limited to the above-mentioned embodiments, and for example, other charge transfer devices (such as a packet brigade device (BBD)) may be used as the analog delay device.
Of course, it is also possible to use In addition, the two signals to be compressed and expanded in the time axis are not limited to the color difference signals R-Y and B-Y, but also the double signal Q signal, the luminance signal and the color signal, and the
Any two types of information signals may be used, such as various combinations such as a frequency division multiplexed signal consisting of an audio signal and a color signal, a luminance signal, and a color video signal and an audio signal.

Effects of the Invention As described above, according to the present invention, the 1/2 horizontal scanning period (0
, 5H) can selectively perform 1/2 time compression and 2x time expansion with a single circuit using four analog delay elements with a delay time of Compared to conventional recording and reproducing devices, which have a time axis compression circuit and a time axis expansion circuit that use separate digital memories in the reproduction system, the circuit can be used for both the recording system and the reproduction system, and it uses an analog delay element. According to the present invention, the circuit configuration can be made extremely simple and can be constructed at a significantly low cost.

[Brief explanation of drawings]

FIG. 1 is a block system diagram showing a first embodiment of the device of the present invention, FIGS. 2 and 3 are time charts for explaining the operation of the block system shown in FIG. 1 during recording and reproduction, respectively, and FIG. A block system diagram showing a second embodiment of the device of the present invention, FIG. 5 is a time chart for explaining the operation during reproduction of the block system shown in FIG. 4, and FIG. 6 is a block system diagram showing a third embodiment of the device of the present invention. 7 and 8 are time charts for explaining the operation of the block system shown in FIG. 6 during recording and reproducing, respectively, and FIG. 9 is a block system diagram showing an example of a recording/reproducing apparatus having the device of the present invention. FIG. 10 is a diagram illustrating an example of time axis compression in a conventional device, and FIG. 11 is a diagram showing waveforms of a luminance signal and a sequential signal in the conventional device. 1.2...Color difference signal input terminal, 3...Sequential signal input terminal, 61-64...Charge coupled device (COD), 10.15...0.5H delay circuit, 1
1... Sequential signal output terminal, 12.13... Reproduction color difference signal output terminal, 20... Luminance signal input terminal, 21゜2
2... Color difference signal input terminal, 28.38...; Rotating head, 30... Time axis compression/expansion circuit, 32... Control pulse generator, 33... Clock controller, 34... Switching Signal input terminal, 39... Magnetic tape, 46.47... Reproduction color difference signal output terminal, Sl...
・First switching means, S2...Second switching means, S3・
...Third switching means. Patent Applicant Victor Japan Co., Ltd. Figure 1 Figure 4 Figure 1 Theta Figure It Figure 2 Figure 3 Figure 7 Figure S Procedural Amendment November 12, 1985 I. Commissioner of the Japan Patent Office Michibe Uga 1, Indication of inertia 1985 Patent Application No. 200323 2, Name of the invention Time axis compression/expansion device for recording and reproducing device 3, Relationship with the amended person's case Address of the patent applicant 3-12 Moriyamachi, Kanayō-ku, Yokohama-shi, Kanagawa 221 Name (432) Japan Victor Co., Ltd. Representative Director and President Michi Shishi - Department 4, Agent Address 5-7-6 Kojimachi, Chiyoda-ku, Tokyo 102
, Detailed description of the invention in the specification to be amended. 7. In the statement of contents of the amendment, "1 expansion" stated in line 11 of page 3 is changed to "compression"
and correct it.

Claims (1)

[Claims] During recording, two types of information signals are supplied, and the time axis is
/After being compressed to 2 times, the sequential signals obtained by synthesizing them alternately in time series are output as recording signals, and during playback, the reproduced sequential signals are supplied and the time axis is expanded by 2 times. In a time axis compression/expansion device of a recording/reproducing apparatus which separates and outputs the two types of information signals in parallel by branching into two, one of the two types of information signals and the reproduction sequential signal is selected respectively to two transmission paths. a first switching means for outputting;
A set includes two signals for each transmission path in which the signals received through the two transmission paths are written by the switching means based on the clock pulse of the first frequency and then read out based on the clock pulse of the second frequency. A time base conversion circuit having a total of two sets of analog delay elements each having a delay time of 1/2 horizontal scanning period, and a readout output signal of the one of the two analog delay elements in each set that is performing a readout operation. a second switching means for selectively outputting a signal; a third switching means for switching and outputting an output signal of the second switching means; and a signal synthesized in time series from the second or third switching means. is taken out, the input signal or output signal of one of the two sets of analog delay elements is set to 1 relative to the input signal or output signal of the other set of analog delay elements.
/2 horizontal scanning period delay circuit, and during recording, the first switching means selectively outputs the two types of information signals and changes the second frequency to n of the first frequency.
The time axis of the two types of information signals is compressed by 1/n times by the third switching means, and are synthesized alternately in time series every 1/2 horizontal scanning period. The sequential signal is taken out, and during reproduction, the first switching means selects and outputs the sequential signal, and the second frequency is selected to be 1/2 of the first frequency, and the second switching means selects and outputs the sequential signal. A time axis compression/expansion device for a recording/reproducing apparatus, characterized in that the two types of information signals returned to the original time axis are output separately.