JPH066674A - Image pickup device - Google Patents

Abstract

PURPOSE:To obtain the image pickup device which is small in circuit scale and has maximum resolution at the time of normal photography. CONSTITUTION:A subject image is passed through an image pickup optical system 1 and a stop 2, formed on the photodetection surface of an image pickup element 3, and photoelectrically, and the signal becomes a continuous image pickup signal through a sample holding circuit 4 and is amplified by an AGC 5 to a reference voltage, clamped by a clamping circuit 6 to a reference voltage, and converted by an ADC 7 from digital to analog; and the signal is digitally processed by a process circuit 8 into a digital video signal, which is converted by a DAC 9 from digital to analog, and outputted as a video signal from an output terminal 10 to external equipment. Part of the output of the ADC 7 which correspond to a pixel part (OB) optically shielded on a CCD is integrated by an OB integration circuit 12 and compared by an OB control circuit 13 with a reference value to generate a voltage for performing control so that an OB signal level becomes constant, and the voltage is converted by a DAC 14 from analog to digital and inputted as the reference voltage to the clamping circuit 6.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image pickup device, and more particularly, to an image pickup device for digital signal processing.

[0002]

2. Description of the Related Art Image pickup devices have been made smaller and lighter with the progress of electronic technology in recent years. Among them,
With the progress of semiconductor technology, a high-speed analog-digital converter (hereinafter referred to as AD converter) digital-analog converter (hereinafter referred to as DA converter) has been put into practical use, and using this, a digitalized video signal is converted into a digital signal. A processing method is also proposed. These are the imaging signals
It is D-converted, digitally processed, DA-converted and output. The AD converters used in these devices are required to operate at high speed with a conversion time of 0.1 μs or less, and compare the input signal with a reference voltage applied to each by a comparator for resolution to digitally convert it. Conventionally, a flash type AD converter has been proposed. For example, in a device having a resolution of 8 bits, 127 comparators are used.

[0003]

However, these conventionally proposed image pickup devices have a drawback that the circuit scale of the AD converter becomes very large as the resolution increases.

[0004]

The image pickup device according to the present invention comprises:
An image pickup device; a clamp for fixing the output of the image pickup device to a reference voltage; an AD converter for converting the output of the clamp into an analog to digital form; a process for digitally processing the output of the AD converter to obtain a digital video signal;
Of the output of the converter, OB integration for extracting and integrating the signal of the optical black portion formed on the image pickup surface of the image pickup device, and OB control for comparing the output with a predetermined reference value to generate the reference voltage of the clamp. And have.

[0005]

With the configuration of the present invention, the resolution of the AD converter is the minimum value in the vicinity of the reference voltage of the clamp, and is a predetermined value smaller than the reference charge of the clamp and a voltage larger than the reference charge. Is configured to be larger than the above-mentioned minimum value, so that the circuit scale can be made extremely small.

[0006]

1 is a block diagram of an embodiment of an image pickup apparatus of the present invention. In FIG. 1, 1 is an image pickup optical system, 2 is a diaphragm, 3 is a CCD which is a solid-state image pickup device, 4 is a sample-and-hold circuit for converting an output signal of the CCD into a continuous signal, 5 is a variable gain amplifier, and an output An AGC that has a control system that controls the variable gain amplifier by integrating the level and keeps the output signal constant regardless of changes in the input signal, 6 is a clamp that fixes the black level of the input signal to the reference input voltage, Reference numeral 7 is an AD converter (ADC) for converting an input signal into an analog signal, and 8 is color separation, gamma, white clip, black clip, color modulation, by digital signal processing.
A process circuit for adding synchronization, 9 is a DA converter (DAC) for performing digital-analog conversion, 10 is an output terminal, and 11 is a diaphragm 2 for keeping the integral value of the input signal constant.
Automatic exposure (AE) circuit for controlling the
An OB control circuit that compares the B signal level with the reference voltage level and controls the OB signal level to be constant, 14 is a DA
It is a converter.

A subject image (not shown) is formed on the light-receiving surface of the image pickup device 3 through the image pickup optical system 1 and the diaphragm 2, is photoelectrically converted, and becomes a continuous image pickup signal by the sample and hold circuit 4. The AGC 5 Is amplified to a predetermined level by the clamp circuit 6, clamped to a reference voltage described later by the clamp circuit 6, analog-digital converted by the ADC 7, and digitally processed by the process circuit 8 including at least a gamma correction circuit to be a digital video signal. , DAC 9 performs digital-to-analog conversion, and the output terminal 10 outputs the video signal to an external device (not shown). On the other hand, ADC7
Of the output of the above, the optically shielded pixel portion (OB) on the CCD is integrated by the OB integration circuit 12 and compared with the reference value by the OB control circuit 13 so that the OB signal level becomes constant. A voltage to be controlled is generated, digital-analog converted by the DAC 14, and input to the clamp circuit 6 as a reference voltage.

On the other hand, the output of the sample and hold 4 is integrated by the AE circuit 11 and compared with the reference voltage. The AE circuit 11 generates a diaphragm drive signal according to the comparison result and controls the diaphragm 2. This allows the CCD
The amount of light incident on the light source 3 becomes a constant value.

FIG. 2 shows the AD of the first embodiment of the present invention.
It is a detailed view of C7.

Reference numeral 101 denotes an input terminal for inputting an input signal, 1
Reference numerals 02 to 112 are resistors, 113 to 122 are comparators, 123 is a logic circuit, and 124 is an output terminal. The voltage of the analog signal input from the input terminal 101 is connected to one input terminal of each of the comparators 113 to 122.

The other input terminals of the comparators 113 to 122 are connected to the voltages between the resistors 102 to 112 for dividing the predetermined reference voltages VREF1 and VREF2, respectively. When the predetermined resistance value is R, the resistors 102 to 11
Of 2, 102-104 are 4R values, 105-107
Is the value of 2R, 108-110 is the value of R, 111-112
Has a value of 2R. The comparators 113 to 122 include
Each voltage divided by these is input.

The logic circuit 123 generates output data according to the input of each comparator. At this time, of the resistors connected to the input terminals of the connected comparators, when the value of the resistor connected to the lower side (VREF2 side) is R, the comparator is inverted. 2R so that the output increases by 1
It is configured to increase by 2 when 4 and increase by 4 when 4R. This output is output from the output terminal 124 through the process 8 described above.
And OB integration 12.

In this ADC, the apparent total number of divisions of the input signal is represented by the sum of the resistance values. In FIG. 2, the number is set to 25 for simplification of description, but in actual application, the voltage dividing resistor and the comparator are combined such that the required resolution can be obtained, for example, if the resolution is 10 bit, the total value of each resistance value is set. To be 1023R.

FIG. 3 is a diagram for explaining the operation of the present invention.

FIG. 3A shows an input waveform of the ADC 7 during normal operation. The vertical axis is the input voltage, and the lower end is the above-mentioned AD.
The reference voltage VREF2 of C7 and the reference voltage VREF1 of the ADC7 are shown at the upper end. Here, the resolution of section A is 2
The section (2R) and B has a resolution of 1 (R), the section C has a resolution of 2 (2R), and the section D has a resolution of 4 (4R). Each section of A, B, C and D is shown in FIG.
111, 110-108, 107-105, 104-1
Corresponds to 02.

E is a clamp reference voltage. The horizontal axis is the time axis, a is one horizontal section, b is an OB section, and c is C.
A non-operating section of the CD, d is a video section, and e is a high-luminance section on the screen. As described above, the OB control 13 causes the OB
The section is fixed to the reference voltage of E, and the section except the high-luminance e in the video section d is in the range of B and is AD-converted with resolution 1.

The high-luminance section of e corresponds to the period when a high-luminance subject is photographed, and is gamma-processed and compressed by the process circuit 8 to be described later.
AD conversion is performed in the C section 2 or the D section 4. Further, as shown in the figure, the noise in the video section d and the OB section b does not exceed the range of the section B in the normal state.

In FIG. 3B, the amount of incident light decreases and AE
11 shows the input waveform of the ADC 7 when the diaphragm 2 is opened by 11 and the gain of the AGC 5 further increases. As shown in the figure, the noise in the OB section b is amplified and reaches the A level beyond the B section. However, since the voltage of this portion is integrated by the OB integration 12 which will be described later, sufficient accuracy is maintained even with the resolution 2.

FIG. 3C shows the conversion characteristic of the ADC.
In this example, the resolution is 10 bits. As shown in the figure, 0 to 96 are A of resolution 2 in the output code.
Section, 96 to 512 is B section with resolution 1 and 512 to 76
8 is set to the C section of resolution 2, and 768 to 1020 is set to the D section of resolution 4. At this time, if the resolution is 2,
The output code is every two, for example, 512, 514, 516.
・ ・ It becomes like.

[0020]

As described above, according to the present invention, even when an ADC having a small number of comparators is used, the maximum resolution can be obtained during normal imaging, and necessary information can be obtained even when high brightness and noise increase. Therefore, the dynamic range of the image pickup signal is increased and the circuit scale is reduced. Therefore, there are great effects in improving performance, reducing costs, and downsizing the device.

[Brief description of drawings]

FIG. 1 is a diagram showing a configuration of an image pickup apparatus as an embodiment of the present invention.

FIG. 2 is a diagram showing a detailed configuration of an ADC in the image pickup apparatus of FIG.

FIG. 3 is a diagram for explaining the operation of the image pickup apparatus in FIG.

[Explanation of symbols]

 3 CCD 5 AGC 6 Clamp Circuit 7 ADC 8 Process Circuit 12 OB Integration Circuit 13 OB Control Circuit 14 DAC

Claims (1)

[Claims] 1. An image sensor, a clamp circuit for fixing the output of the image sensor to a reference voltage, an analog-digital converter for converting the output of the clamp circuit into an analog-digital converter, and an output of the analog-digital converter for a digital signal. A process circuit for processing to obtain a digital video signal, an optical black integrating circuit for taking out and integrating a signal of an optical black portion formed on the image pickup surface of the image pickup device among outputs of the analog-digital converter, and its output And an optical black control for generating a reference voltage of the clamp circuit by comparing the reference voltage with a predetermined reference value, wherein the resolution of the analog-digital converter is a minimum value in the vicinity of the reference voltage of the clamp circuit. And a voltage smaller than the reference voltage of the clamp circuit by a predetermined value. An imaging device, which is configured to be larger than the above-mentioned minimum value at a pressure and a voltage larger by a predetermined value.