JPH0662466A - Data transmitting/receiving method and its system - Google Patents

Abstract

PURPOSE:To attain a self-diagnostic operation at the side of a slave station by producing the data at the side of the slave station in response to the instruction codes and sending these data to a master station together with the normal or abnormal state of transmission, the connection state of the slave station, and the number of connected slave stations. CONSTITUTION:An output unit 11 of a master station 10 sends the data on the 1st pulse to a host device via the shift registers 16 and 17. An output unit 12 outputs the data on the 2nd pulse to the host device via the shift registers 18 and 19. An input unit 13 inputs the data on the 1st pulse and then outputs the data to a transmission line 28 via a shift register 20. An input unit 14 inputs an instruction pulse and outputs it to the line 28 and at the same time controls the operation of a controller 22. An input unit 15 inputs the total number of slave stations through the host device in response to an instruction code and controls the value of a counter 23 via a coincidence circuit 24. Then a controller 22 decides whether the slave stations are identical with the output or input units.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of transmitting and receiving data consisting of ON / OFF signals and its system, and more particularly to its diagnostic function.

[0002]

2. Description of the Related Art There are various methods for transmitting and receiving data, and for example, various methods for transmitting an ON / OFF signal of a sensor or an output unit are used as a very rolling communication method. Proposed. In that case, the system is composed of a master station connected to the host model and a slave station including an input unit (sensor) or an output unit. The communication method between the master station and the slave station includes, for example, a daisy chain method, a shift register method, and a slave station address method. The communication speeds of these methods have the following relative relationships. (Dizzy chain method) = (Shift register method) <
<(Slave station address system) By the way, when a slave station is added midway in such a communication system, the "daisy chain system" and the "shift register system" are all slave stations subsequent to the added slave station. It is necessary to reassign the address for
It is also necessary to change the program of the higher model. Of course, the addition of a slave station of the "slave station address method" may be done by wiring with a new address, so that the processing is easy.

Further, in any of the systems, it has been impossible to superimpose and transmit power supply and data communication such as sensors and output elements connected to the slave station including the slave station on the same line. That is,
In the "slave station address system", the power supply and the data communication path are basically constructed by separate lines. In the "daisy chain method" and the "shift register method", it is possible to superimpose and transmit a power supply and data communication on one line, but a timing line is required. Further, in the "slave station addressing method", even if the data signal is FM-modulated and superposed and transmitted with the power supply, the circuit becomes complicated, and the fundamental wave of FM-modulation has the maximum line pulse width, so that the data communication speed becomes more and more. Become slow.

[0004] In view of such a situation, the applicant has a PCT
/ JP91 / 01120, it has high communication speed of daisy chain method and shift register method and easy additional setting of slave station address method. Furthermore, transmission from the master station is connected to the slave station and slave station. In addition, a data transmission / reception method and a system thereof were proposed in which power supply for sensors, output elements and the like and data communication can be performed by two transmission lines (same line). However, in the system according to this proposal, the functions of checking transmission / reception, checking the output and input settings of the slave station, checking the connection of the slave station, and error functions of the slave station are not considered.

The present invention has been made in view of the above circumstances, and an object thereof is to provide a data transmission / reception method in which a diagnostic function and the like are added to the system proposed in PCT / JP91 / 01120, and the system. And

[0006]

In a data transmitting / receiving method and system according to one aspect of the present invention, a master station has a start pulse of a predetermined width, an instruction code following the instruction pulse, and a rear portion of the instruction code. Followed by a pulse of a first voltage level followed by at least one or more first
The voltage level pulse and the clock voltage that makes one set corresponding to each slave station are sent out through the two transmission lines,
When transmitting the pulse of the first voltage level, the first
It sends out through the constant current circuit of. The slave station counts the clock voltage signal of the transmission line, and when the count value corresponds to the address of its own station, the second constant current circuit (however, connected in parallel to the transmission line according to the data of the slave station (however, Constant current value of first constant current circuit <constant current value of second constant current circuit)
Is driven, and then the second constant current circuit is driven based on the data corresponding to the instruction code. By the operation of this slave station, the master station side takes in the first clock voltage of the corresponding address among the terminal voltages of the transmission line as input data, and the data after the next clock voltage corresponds to the instruction code from the slave station side. Take in as. For example, when the input data is "1", the second constant current circuit is driven. At this time, the constant current value of the first constant current circuit <the constant current value of the second constant current circuit is set. The voltage across the transmission line becomes the first voltage level → 0 V, and the master station side can recognize the data from the slave station side. When the input data is “0”, the second constant current circuit is not driven,
Since the voltage across the transmission line does not change, the master station side can grasp the data from the slave station side.

In the data transmission / reception method and system according to another aspect of the present invention, the master station outputs a start pulse of a predetermined width, an instruction code following the instruction pulse, and an output data following the instruction code. Depending on the slave station, a clock voltage having a first voltage level pulse or 0V pulse and at least one or more subsequent first voltage level pulses as one set corresponding to each slave station is provided over two transmission lines. When the pulse of the first voltage level is transmitted, it is transmitted through the first constant current circuit. The slave station counts the clock voltage signal of the transmission line, and when the count value corresponds to its own address, it outputs ON or OFF based on the first clock voltage of the corresponding address, and then the instruction code A second constant current circuit connected in parallel to the transmission line based on the data corresponding to
The constant current value of the constant current circuit of <the constant current value of the second constant current circuit) is driven. Therefore, depending on the data, the voltage across the transmission line may change from the first voltage level to 0 V, or may remain unchanged. By the operation on the slave station side, the master station side takes in the second and subsequent clock voltages of the corresponding address among the terminal voltages of the transmission line as data corresponding to the instruction code from the slave station side.

FIG. 15 is a timing chart showing the general relationship between the start pulse, the instruction code and the clock voltage after that. In FIG. 16, the instruction code is “0,0”
3 is a timing chart showing a case of normal operation of FIG.
In the example shown in the figure, after the command pulse continues, the ON signal (0V) is sent to the slave station output unit at address 1 and the OFF signal (12V) is received from the slave station input unit at address 2. There is. In this instruction code, the clock voltage corresponds to the slave station at each address by one pulse. Besides this command code, the clock voltage corresponds to the slave station of each address by 2 pulses.

FIG. 17 is a timing chart showing a case where the safe transmission of the instruction code "0, 1" is confirmed. In the illustrated example, when the ON signal (0V) is sent to the slave station output unit at the address 1, it is the inverted signal OFF.
The signal is being sent back to the master station. When the OFF signal is input from the slave station input unit at address 2, that is, when the slave station input unit is inputting the OFF signal, the ON signal which is the inverted signal thereof is returned to the master station. By these operations, the connection between the master station and the slave station is properly made, and the slave station is functioning normally. In FIG. 18, the instruction code is "1,
It is a timing chart which shows the case where the connection confirmation of the slave station of "0" is performed. In the illustrated example, the first pulse at address 1 confirms that the slave station is connected, and the first pulse at address 2 confirms that the slave station is connected. Further, the first pulse (H) and the second pulse (L) at the address 1 indicate that the slave station is the input unit, and the first pulse (H) and the second pulse (H) at the address 2 are recognized. ) Confirms that the slave station is an output unit. By such an operation, when the number of installed slave stations is not known in advance, the number of connected slave stations is known. It is also possible to recognize whether the connected slave station is an input unit or an output unit. Further, the maximum address of the slave station can be grasped.
Therefore, since it is sufficient to scan up to the maximum address, when the number of slave stations is small, it is not necessary to scan up to the maximum number of slave stations electrically set in the master station, and the scanning time is shortened. FIG. 19
Is a timing chart when the slave station side of the instruction code "1, 1" sends a message indicating a defect to the master station side, for example. When a defect occurs on the slave station side, the defect message is transmitted from the slave station to the master station side as a 2-pulse 1-station correspondence. When the master station sends this message to the host model, the master model can perform appropriate control.

Further, in the data transmitting / receiving system according to another aspect of the present invention, the master station has an output buffer, an input buffer, a first storage means and a second storage means. The output buffer has a start pulse of a predetermined width, an instruction code that follows the instruction pulse, and a pulse of a first voltage level followed by a pulse of at least one or more first voltage levels that follows the instruction code. Corresponding to 1
The clock voltage to be set is sent out through two transmission lines, and when sending the clock voltage of the first voltage level, it is sent out through the first constant current circuit. The input buffer takes in the terminal voltage of the transmission line as input data. The first storage means stores the first clock voltage of the corresponding address among the clock voltages from the input buffer according to the instruction code as input data or data corresponding to the instruction code. In the second storage means, among the clock voltages from the input buffer, the second and subsequent clock voltages of the corresponding address are stored as data corresponding to the instruction code.

In the data transmission / reception system according to another aspect of the present invention, the slave station includes a smoothing circuit, a counter, a local station address signal detection circuit, a second constant current circuit, a switch element, a storage means and a control unit. Have means. The smoothing circuit consists of a start pulse of a specified width, the instruction code following it,
And, following the instruction code, transmitting two clock voltages, each of which is a pair of a first voltage level pulse and at least one or more subsequent first voltage level pulses corresponding to each slave station. Sent from the master station via the line,
These voltages are rectified via the directional element and used as the power source for the slave station. The counter counts the voltage signals of the two transmission lines. The local station address signal detection circuit detects whether or not the count value of the counter matches the preset address of the local station, and outputs a coincidence signal when they match.
The second constant current circuit has a current capacity larger than the current capacity of the clock voltage of the first voltage level at the address of the own station sent from the master station via the transmission line, and is connected in parallel to the transmission line. To be done. The switch element is connected in series with the second constant current circuit. The storage means stores the instruction code. The control means inputs a local address signal, a sensor output and an instruction code, generates data based on the instruction code, and outputs the sensor output and the data, or the switch element based on the data according to a mode of the instruction code. To drive.

In a data transmission / reception system according to still another aspect of the present invention, the slave station includes a smoothing circuit, a counter, a local station address signal detection circuit, a second constant current circuit, a switch element, a storage means and It has a control means. The control means inputs the clock voltage of the transmission line, the coincidence signal and the instruction code, generates data based on the instruction code, and sets the initial clock voltage when the coincidence signal is input according to the mode of the instruction code. The switch element is driven based on the data after being output to the load via the storage means, or the switch element is driven based on the data without being output to the load.

As described above, the data is transmitted to the master station side through the transmission line by driving the switch element on the slave station side based on the data.

[0014]

1 is a block diagram showing a configuration of a master station of a system according to an embodiment of the present invention, FIG. 2 is a block diagram showing a configuration of a slave station input unit, and FIG. 3 is a block diagram of a slave station output unit. It is a block diagram which shows a structure. In the system shown in FIGS. 1, 2 and 3, the master station 10 is connected to the slave station input unit 30 and the slave station output unit 50 via two transmission lines 28, and these slave stations 30, 50 is connected in parallel to the master station 10. Before describing the details of the present embodiment, an outline of the master station 10 and the slave stations 30 and 50 will be described.

The master station 10 basically performs the following processing. 1) A power source and data are superimposed on a clock voltage to drive two transmission lines and send them to a slave station. 2) The data is superimposed on the clock voltage. 3) For example, when sending a clock and data "0", a voltage of 50% of the power supply voltage is sent. Clock and data "1"
When sending and, send the voltage of 0V of the power supply. 4) Send a voltage (start pulse) of 100% power supply voltage for several clocks to reset the address management counter of the slave station. 5) After sending several clocks of this power supply voltage, an instruction code consisting of two clocks is output. The instruction code includes, for example, "normal operation", "confirmation of safe transmission", "confirmation of connection of slave station", "message of trouble", and the like. Then, when a signal corresponding to this command code is transmitted from the slave station, the signal is processed and transmitted to the host model. 6) Count the clock after the transmission of the instruction code and make it correspond to the address of the slave station.

The slave stations 30 and 50 basically perform the following processing. 1) When a voltage of 100% of the power supply voltage of the reset signal is received for several clocks, the internal counter for managing the own station address is reset and then counting of clocks is started. Next, it receives the instruction code and analyzes it. 2) When the count value of the address management counter of the own station reaches the address count value of the own station, it is determined as the own address. 3) When the slave station is the input unit, the clock voltage or "0" is sent as the data at the corresponding address. Since 50% of the power supply voltage is input, for example, 0 V is sent if the input of the input unit is active during that period, and it remains unchanged (50% of the power supply voltage) if it is inactive.
And The master station determines the reply signal of the slave station during the clock period, and determines whether the input is active or inactive. 4) When the slave station is an output unit, when the master station activates the output, the master station sends the voltage of 0V of the power supply during the clock period, and the output of the output unit becomes active. When making it inactive, the master station sends a voltage of 50% of the power supply voltage during the clock period, and the output of the output unit becomes inactive. 5) Regardless of whether the slave station is an input unit or an output unit, it performs processing according to the instruction code and transmits it to the master station.

Next, the configuration of the master station 10 shown in FIG. 1 will be described.
The master station 10 is provided with output units 11 and 12 and input units 13 to 15 for exchanging data with a higher model. The output unit 11 sends the data of the first pulse corresponding to the address of the transmission pulse to the host model via the shift registers 16 and 17. The output unit 12 outputs the data of the second pulse corresponding to the address of the transmission pulse to the host model via the shift registers 18 and 19. The input unit 13 inputs the data of the first pulse corresponding to the address via the host model and outputs it to the transmission line via the shift register 20. The input unit 14 inputs a command Paelus from a host model, outputs it to a transmission line, and controls the operation of the controller 22. The input unit 15 inputs the total number of points of the slave station from the upper model corresponding to the instruction code, and controls the counter value of the counter 23 via the coincidence circuit 24. It is assumed that the controller 22 can set whether the slave station is an output unit or an input unit by an appropriate means. Now, assuming that up to 32 slave stations can be connected, the shift registers 17-20 have 3
It has the capacity to store two points.

The output data from the output unit 11 corresponds to the contents of the shift register 17, and each bit corresponds to the data of the slave station. The shift register 17 stores the contents of the shift register 16 at the timing when the signal e from the controller 22 is input. Shift register 1
6 sequentially stores the ON / OFF signal g from the input buffer 25 at the timing when the signal k from the controller 22 is input. Similarly, the output data from the output unit 12 corresponds to the contents of the shift register 19, and each bit corresponds to the data according to the instruction code of the slave station. The shift register 19 stores the contents of the shift register 18 at the timing when the signal e from the controller 22 is input. The shift register 18 sequentially stores the ON / OFF signal g from the input buffer 25 at the timing when the signal ka from the controller 22 is input.

In the data input to the input units 13 and 14, the signal f from the controller 22 is the shift register 2
0 and 21 are stored at the timing of input, and the command pulse of the shift register 21 is sequentially sent to the controller 22 at the timing of the signal f, and the data i of the shift register 20 is sequentially sent to the controller 22 via the shift register 21. Sent out. Further, only the data (command pulse) input to the input unit 14 is directly supplied to the controller 22 as a control signal. When the controller 22 transmits the timing for one slave station, the synchronization signal q
To the counter 23, and the counter 23 counts this synchronization signal. The count value of the counter 23 is the input unit 15
When the predetermined set value input to is reached, the matching circuit 24
Sends a synchronization signal q to the controller 22. Upon receiving the synchronization signal q, the controller 22 sends a reset signal for the slave station and resets the counter 23. The signals m, n, and o from the controller 22 are output to the output buffer 2
6 is a signal for driving 6.

The output buffer 26 is, as shown in FIG. 4, a switch SW composed of a constant current circuit 27 and a semiconductor.
1, SW2, SW3 and Zener diode ZD (for example, Zener voltage 12V) are equivalently configured. The relationship between the potential when the output buffer 26 sends a signal to the transmission line 28 and the m, n, o signals and SW1, SW2, SW3 is as follows. m ... SW1 n ... SW2 o ... SW3 24V transmission ON ON OFF OFF OFF OFF OFF OFF 12V transmission OFF OFF OFF OFF OFF ON ON 0V transmission OFF OFF OFF ON ON OFF OFF OFF

Next, the configuration of the slave station input unit 30 shown in FIG. 2 will be described. Since the voltage supplied via the transmission line 28 has a complicated waveform as described later, it is smoothed by the diode D and the capacitor C1 to obtain a stable DC voltage in order to secure a DC circuit voltage. Therefore, the smoothed DC voltage serves as the drive power source for the sensor 31 and the circuit power source for the slave station input unit 30. A series circuit including a constant current circuit 32 and a transistor Q1 is connected in parallel to the transmission line 28. The constant current value of the constant current circuit 32 is set so that the constant current circuit 27 (see FIG. 4) <the constant current circuit 32. The constant current circuit 32 may be composed of a constant current circuit including the transistor Q1 as shown in FIGS. The comparator 33 is the transmission line 2
It is a circuit for generating a clock signal Za from a voltage signal of 8, and its threshold value is set near the middle of 12V and 24V. The comparator 34 is a circuit that generates the clock signal Zb from the voltage signal of the transmission line 28, and sets the threshold value near the middle of 0V and 12V.

The reset circuit 35 measures the pulse width and outputs a reset signal w when it exceeds a predetermined width. That is, the reset circuit 35 detects the start pulse and outputs the reset signal w. The counter 36 is reset by the reset signal w, counts two command pulses immediately after the start pulse, and stores the signal from the comparator 34, that is, two command pulse data in the shift register 37. When the shift register 37 stores data for two command pulses, it outputs control signals uu and cc according to the stored values. Control signal u
u is sent to the 1/1/2 switching circuit 38. The control signal cc is sent to the control circuit A42. The 1/1/2 switching circuit 38 uses the control signal cc from the shift register 37 to output the clock signal za from the comparator 33 or 1 /
2 pulses are sent to the counter 39.

The counter 39 has a 1/1/2 switching circuit 38.
The clock signal Za input via is counted. The count value v is sent to the matching circuit 40. Address circuit 41
Is set to the address of the slave station input unit 30, and is constituted by, for example, a DIP switch, a ROM, a RAM and the like. The set value u is sent to the matching circuit 40.
The coincidence circuit 40 compares the value of u with the value of v, and when they coincide with each other, sequentially outputs coincidence signals t and t'to the control circuit A42 in synchronization with the clock signal 1a. The output of the sensor 31 is the load 45
Is stored in the memory 46 via the, and the signal of the memory 46 is input to the control circuit A42. The memory 46 is reset by the reset signal w and fetches the signal of the sensor 31 thereafter. The control circuit A42 is composed of the circuit shown in FIG. 7, and its details will be described later.

Next, the configuration of the slave station output unit 50 shown in FIG. 3 will be described. The slave station output unit 50 basically has the same configuration as the slave station input unit 30, and the differences will be mainly described below. A series circuit including a load 51 and a transistor 52 is connected in parallel to the capacitor C1. The auxiliary power supply 53 is connected as the auxiliary power supply when the load 51 cannot be driven by the current capacity of the transmission line 28. The control circuit B54 drives the transistors 52 and Q1. The control circuit B54 is composed of the circuit shown in FIG. 8, and its details will be described later.

Next, the operation of this system when the instruction code is "0,0" will be described. 9 is a timing chart showing the operation of the master station 10, and FIG. 10 is a slave station input unit 3
11 is a timing chart showing the operation of 0, and FIG. 11 is a timing chart showing the operation of the slave station output unit 50.

Pulses are sequentially generated from the controller 22 of the master station 10, and as shown in the figure, a start pulse section T1 having a potential of 24 V and wider than other pulse widths, and two pulses (0 pulse) of the instruction code. , 0) in a section T2, sections T3 and T5 for receiving data from the slave station input unit, and a section T4 for transmitting data to the slave station output unit, the transmission voltage Z as shown in the figure is applied to the transmission line 28 by the output buffer 26. To be done. In the sections T3 and T5 for fetching data from the slave station input unit 30, a voltage of 12V is transmitted, and in the section T4 for transmitting data to the slave station output unit, 0V and OFF are used for ON output.
When outputting, 12V is transmitted. In the illustrated example, the section T4 outputs ON. Under this instruction code, the clock voltage is 1 pulse / station.

In the master station 10, the input unit 14 inputs an instruction code from a host model, and here, "0,0".
Enter. Similarly, the input unit 13 inputs the ON / OFF data to be sent from the host model to the slave station output unit. In addition, the input unit 15 inputs data for determining the maximum number of pulses to be transmitted from the host model. Also,
The output unit 11 outputs ON / OFF data from the slave station unit to the host model. The output unit 12 outputs the ON / OFF data of the second pulse from the slave station unit to the upper model.

The set value h'signal (instruction code) of the input unit 14 is sent to the controller 22, and the controller 22 performs the operation corresponding to the instruction code "0,0". That is, the controller 22 and the counter 23 sequentially generate necessary pulses, and when the number of pulses set in the input unit 15 is sent from the output buffer 26, the pulse is repeated again from the start pulse.

A pulse e is generated from the controller 22 during the period T1 of the start pulse, and at that timing, the data in the shift registers 16 and 18 are latched in the shift registers 17 and 19, respectively. This data is the data stored in the shift registers 16 and 18 immediately before the generation of the start pulse. Further, the data input to the input units 13 and 14 at the timing of the pulse e is latched in the shift registers 20 and 21. This data is the data to be sent to the slave station output unit. Also, the controller 2
2 turns on / off SW1 and SW3 of the output buffer 26
Output signals m and n to generate the transmission voltage Z in the illustrated sections T1 and T2. The signals f and k are output at the same timing as the signal n.

The count value of the counter 23 is the input unit 15
When it becomes the same value as the set value of, the coincidence circuit 24 resets the counter 23, and then sends the synchronization signal p to the controller 22. The controller 22 generates a start pulse (outputs a signal m) by inputting this synchronizing signal p. The signal f output from the controller 22 is a timing signal for shifting the shift registers 20 and 21, and the signal k is a timing signal for shifting the shift register 2. When the instruction code is "0,0", the signal k'is not generated, and the shift register 18 does not operate.

The data in the shift register 20 is shifted and a signal i'is generated at the timing of transmitting the data to the slave station output unit. When the signal is generated, a signal o synchronized with it is generated. The signal o is the SW of the output buffer 26
Turn on 2. As a result, the voltage of the output buffer 26 becomes 0V. At this time, the voltage of the transmission line 28 becomes 0V, and the output of the input buffer 25 becomes "1". This output is stored in the shift register 16 at the timing of the signal k. Similarly, when the signal o is not generated and the slave station input unit generates an ON signal, the transmission line 2
The voltage of 8 becomes 0V (this point will be described later), and the output of the input buffer 25 becomes "1". This output is also stored in the shift register 16 at the timing of the signal k.

For this reason, the output signal of the output unit 11 contains the data of the input unit 13 and the data from the slave station input unit, but the relationship between the address and the slave station input unit or the slave station output unit is preset. Since it is fixed, you can read ON / OFF of the slave station input unit. Also,
If a filter for extracting data of only the slave station input unit is provided by utilizing the fact that the relationship between the address and the slave station input unit is predetermined, the O of the slave station input unit can be set.
N / OFF can be read automatically.

Next, the operation of the slave station input unit at this time will be described. As shown in the timing chart of FIG. 10, the output voltage Z of the output buffer 26 of the master station 10 is the transmission line 2
It is also applied to the slave station input unit via 8, and the comparators 33 and 34 waveform-shape the transmission voltage based on the respective threshold values to generate the clock signals Za and Zb. The reset circuit 35 inputs the clock signal Za, detects a start pulse, generates a reset signal w, resets the counter 36 and the shift register 37, and sets the contents of the memory 46 based on ON / OFF of the sensor 31 at that time. The signal S is generated by rewriting. When the counter 36 is reset, the reset signal W ′ is sent to the counter 39, and the counter 39 is reset. When the section T1 of the start pulse ends and enters the section T2, the counter 36 counts the pulses of the instruction code and stores the instruction code in the period in the shift register 37. Shift register 3
7 is a control signal cc corresponding to the value of the instruction code at this time
Is sent.

FIG. 7 is a circuit showing the details of the circuit A42. The control signal cc from the shift register 37 is converted by the conversion table 100. The relationship between the input and output at this time is as follows. (Input) (Output) A B Y0 Y1 Y2 Y3 a) 0 0 0 1 1 1 1 b) 1 0 1 0 1 1 1 c) 0 1 1 1 0 1 1 d) 1 1 1 1 1 0 Control signal at this time cc is "0,0", and the output of the conversion table 100 is "0,1,1,1". This output is input to the AND gates 102, 107, 109 and 113 as a gate control signal via the inverters 114 to 117, and only the AND gate 102 is opened here. Further, the signal t from the coincidence circuit 40 is the AND gate 1
01 as a gate control signal, and while this signal t is being input, the signal S is sent out via the AND gates 101 and 102 and the OR gate 103. If the sensor 31 is ON at the timing of the signal t, the signal S is "1" and the transistor Q1 is ON. If the sensor 31 is OFF, the signal S is "0" and the transistor Q1 is OFF.

Now, returning to FIG. 2, the 1/1/2 switching circuit 38 inputs the switching signal corresponding to the instruction code from the shift register 37 and passes it as it is or 1
It is instructed whether to divide the frequency by two. Here, the instruction code is "0, 0", and the input signal is passed as it is. The address counter 39 counts up in synchronization with the v signal, and when the address of the address circuit 41 and the counter value match, the match circuit 40 generates the match signal t in synchronization with the clock signal, and at the next timing. generate t '. The coincidence signals t and t'are input to the control circuit A42, and as described above, when the signal S is "1", the transistor Q1 is turned on. As a result, the following operation is performed.

When the transistor Q1 is turned on, the current of the transmission line 28 tends to flow up to the set value of the constant current circuit 32. Since the constant current value of the constant current circuit 27 <the constant current value of the constant current circuit 38 as described above, the transistor Q
While 1 is ON and the master station 10 is transmitting 12V, the constant current circuit 32 tries to flow a current equal to or larger than the current value of the constant current circuit 27, and as a result, the transmission line 28 The voltage Z becomes 0V (a value close to 0V). For example, if the slave station input unit 30 has an address of 3, then T5
12V in the section is 0V as shown by the broken line.

In the master station 10, since the voltage Z across the transmission line 28 becomes 0V, the slave station input unit 30 outputs 0.
It is input to the input buffer 25 as V, that is, data "1" is transmitted. The waveform at this time is observed as a broken line at the solid line. At this time, the controller 2
2 sends the signal k to the shift register 16 and stores the signal g from the input buffer 25.

On the other hand, in the slave station input unit 30,
When the master station 10 subsequently starts transmitting 24V, the constant current circuit 27 of the output buffer 26 is short-circuited by the switch SW1 and does not function, so there is no current limitation, and the current capacity of 24V> the constant current value of the constant current circuit 32 is satisfied. So transmission line 2
The voltage across 8 remains 24V. As described above, the slave station input unit 30 has the sensor 31 ON / OF.
When the number of pulses corresponding to the address of the own station is counted, F can be superimposed on the clock voltage from the master station 10 and transmitted.

Next, the operation of the slave station output unit 50 will be described. The figure is a flow chart showing the operation at this time. The operation of the slave station output unit 50 is basically the same as that of the slave station input unit, but after the instruction code is stored in the shift register 37, the control signal cc is sent to the control circuit B5.
It sends to 4.

FIG. 8 is a circuit showing the details of the control circuit B54. The control signal cc from the shift register 37 is converted by the conversion table 120. The relationship between the input and the output at this time is the same as that of the conversion table 100. In this case, the instruction code is "0, 0" and its output is "0,
It becomes 1,1,1 ". This output “1,1,1” is supplied to the AND gate 12 via inverters 138 to 140, respectively.
Input as a gate control signal to 3,131,135 to close all the AND gates. Then, the conversion table 12
The output Y0 of 0 is input as a gate control signal to the AND gate 125 via the inverter 137 and the OR circuit 136, and this AND gate is opened. The coincidence signal t is input to the AND gate 126 via the AND gate 125 as a gate control signal to open the AND gate 126. As a result, the signal Zb from the comparator 34 is transferred to the memory 1
27 is written. The written signal y is supplied to the base of the transistor 52. Therefore, the signal y is O
When the signal is N, the transistor 52 turns on and the load 51
Is driven. Further, when the signal y is the OFF signal, the transistor 52 is turned off and the load 51 is not driven.

Next, the operation of this system when the instruction code is "0, 1" will be described. 12 is a timing chart showing the operation of the master station at this time, FIG. 13 is a timing chart showing the operation of the slave station input unit 30, and FIG. 14 is a timing chart showing the operation of the slave station output unit. The basic operation of the master station 10, slave station input unit 30 and slave station output unit 50 is the instruction code "0,
Since it is the same as "0", the difference will be mainly described.

Pulses are sequentially generated from the controller 22 of the master station 10, and as shown in the figure, a start pulse section T
1, a transmission voltage as shown in the figure is output buffer 26 in a section T2 of two pulses (0, 1) of the instruction code, a section T3 for fetching data from the slave station input unit and a section T4 for sending data to the slave station output unit. Is applied to the transmission line 28. The second pulse in the sections T3 and T4 is the return voltage from the slave station side.

The instruction code "0, 1" is input to the input unit 14 from the higher model, which is similar to the above case.
It is set in the control unit 22. The control unit 22 operates corresponding to this instruction code "0, 1". The output unit 11, the input unit 13, the input unit 15, and the shift register 1 attached to the output unit 11.
The operations of 6, 17, and 20 are the same as in the case of the instruction code “0, 0” described above. The output unit 12 outputs ON / OFF data of the second pulse from the slave station (described later).
The signal f generated from the controller 22 is the timing for shifting the shift registers 20 and 21, and two consecutive pulses for transmitting the data of the shift register 21 for transmitting the instruction code immediately after the generation of the start pulse and the shift of the slave station data. The data of the register 20 is sent out, but here it is generated at the timing corresponding to the first pulse of the two pulses corresponding to the slave station address. Signal k is shift register 2
The ON / OFF signal g from the slave station, which is generated at the timing corresponding to the first pulse of the two pulses corresponding to the slave station address and is synchronized with the first pulse, is stored. The signal k'is generated in the shift register 18 at the timing corresponding to the second pulse of the two pulses corresponding to the slave station address, and stores the ON / OFF signal g from the slave station synchronized with the second pulse.

Therefore, the first pulse of the input buffer 25 is output from the output unit 11, and the output unit 12 outputs the first pulse.
Since the second pulse is output from, the transmission failure of the slave station can be confirmed by checking the relationship between the two. For example, in the normal state, the signals of the same address are opposite between the output unit 11 and the output unit 12, but if an abnormality occurs, the relationship is broken.

Further, in the case of the instruction code "1,0",
In the slave station input unit 30, the AND gate 109 of the control circuit A42 is opened by the output of the conversion table 100. Further, the AND gate 108 opens at the timing of the coincidence signal t. Therefore, the H signal reaches the OR gate 103 via the AND gates 108 and 109 to turn on the transistor Q1 and set the voltage Z of the transmission line 28 to 0V. The master station 10 detects this voltage and recognizes that the input unit is connected to the corresponding address.

In the output unit 50 of the slave station, the AND gate 128 opens at the timing of the coincidence signal t of the circuit B54,
Further, the AND gate 131 is opened by the output of the conversion table 120. Therefore, the H signal reaches the OR gate 124 via the AND gate 128 and the OR gate 130 to turn on the transistor Q1 and set the voltage of the transmission line 28 to 0V. Further, the AND gate 129 opens at the timing of the coincidence signal t ′, and therefore the H signal reaches the OR gate 124 via the AND gate 129 and the OR gate 130 to turn on the transistor Q1 and set the voltage Z of the transmission line 28 to 0V. The master station 10 detects this voltage and confirms that the output unit is connected to the corresponding address. Therefore, this instruction code "1,0" is mainly used when the system is started up.

Further, in the case of the instruction code "1,1",
In the slave station input unit 30, the AND gate 1 of the circuit A42
13 is opened by the output of the conversion table 100, and the AND gate 110 is opened at the timing of the coincidence signal t.
The H signal reaches the OR gate 103 via the AND gate 110, the OR gate 112, and the AND gate 113 to drive the transistor Q1, and transmits the message 1 to the transmission line 28.
Tell. As the message 1, for example, if the state of the load 45 is detected by a detection circuit (not shown) and the load is driven, "1" information is transmitted as the message 1 to the master station 10 side. Similarly, the coincidence signal t ′
AND gate 111 opens at the timing of
The signal reaches the OR gate 103 through the AND gate 111, the OR gate 112, and the AND gate 113 to drive the transistor Q1, and the message 2 is transmitted to the transmission line 28. In this way, the messages 1 and 2 from the corresponding slave station input unit 30 are transmitted to the master station 10 side.

In the case of this instruction code "1,1", in the slave station output unit 50, the AND gate 135 of the circuit B54 is opened by the output of the conversion table 120, and the AND gate 132 is opened at the timing of the coincidence signal t. Therefore, the H signal reaches the OR gate 124 via the AND gate 132, the OR gate 134, and the AND gate 135 to drive the transistor Q1, and transmits the message 1 to the transmission line 28. Similarly, the AND gate 133 is opened at the timing of the coincidence signal t ′, so that the H signal reaches the OR gate 124 via the AND gate 132, the OR gate 134, and the AND gate 135 to drive the transistor Q1, and the message 2 is transmitted. It is transmitted to the transmission line 28. In this way, the corresponding slave station output unit 50
Messages 1 and 2 are transmitted to the master station 10 side.

By properly combining the instruction codes as described above, the master station 10 can grasp the state of the slave station. A specific example will be described below. a) At the beginning of operation or at an appropriate time, the master station side confirms the connection of the slave station with the instruction code "1,0", grasps the maximum address to which the slave station is connected, and then the normal slave station. The apparent scan time can be shortened by performing the ON / OFF operation to the maximum address for which the connection is confirmed. For example, in a system having addresses up to 50, if the maximum address of the slave station actually connected is 30, it is sufficient to scan up to 30, so compared to the case of scanning up to 50. Time is reduced. b) Similarly, it is possible to know whether the slave station is set as the output unit or the input unit.
An output can be sent to the input unit, input from the output unit can be prevented, or a warning can be issued. c) 1 station / 1 station, 2 pulses / 1
By using a station, the processing speed (scanning) can be increased. d) The service to the slave station can be increased by increasing the pulse number of the instruction code from 2 pulses to several pulses. e) In addition, the number of pulses per slave station is set to several, and the number of corresponding pulses is increased or decreased according to the instruction code, so that high-speed processing to fine-grained processing can be performed.

[0050]

As described above, according to the present invention, not only the ON / OFF data is exchanged between the master station and the slave station via the two transmission lines, but also the command code is transmitted on the slave station side. Since it generates data according to, and sends it to the master station, the transmission line is normal or abnormal, the connection status of the slave station, the number of connected slave stations, the slave station is an input unit or an output unit. It is possible to transmit various kinds of information such as a failure message of the slave station to the master station. Therefore, the self-diagnosis function on the side of the slave station can be fulfilled, and of course, various fine processing can be performed by the data.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a master station of a system according to an embodiment of the present invention.

FIG. 2 is a block diagram showing a configuration of a slave station input unit of the system.

FIG. 3 is a block diagram showing a configuration of a slave station output unit of the system.

FIG. 4 is a circuit diagram showing a configuration of an output buffer of the master station.

FIG. 5 is a circuit diagram showing a royal government of a constant current circuit of the slave station input unit.

FIG. 6 is a circuit diagram showing another configuration example of the constant current circuit.

FIG. 7 is a circuit diagram showing a configuration of a control circuit A of the slave station input unit.

FIG. 8 is a circuit diagram showing a configuration of a control circuit B of the slave station output unit.

FIG. 9 is a timing chart showing the operation of the master station when the instruction code is “0,0”.

FIG. 10 is a timing chart showing the operation of the slave station input unit when the instruction code is “0,0”.

FIG. 11 is a timing chart showing the operation of the slave station output unit when the instruction code is “0,0”.

FIG. 12 is a timing chart showing the operation of the master station when the instruction code is “0, 1”.

FIG. 13 is a timing chart showing the operation of the slave station input unit when the instruction code is “0, 1”.

FIG. 14 is a timing chart showing the operation of the slave station output unit when the instruction code is “0, 1”.

FIG. 15 is a timing chart showing a general relationship between a start pulse, an instruction code, and a clock voltage following the start pulse of the present invention.

FIG. 16 is a timing chart showing a normal operation of the instruction code “0,0”.

FIG. 17 is a timing chart showing a case where the safe transmission of the instruction code “0, 1” is confirmed.

FIG. 18 is a timing chart showing a case where connection of a slave station with an instruction code “1,0” is confirmed.

FIG. 19 is a timing chart when the slave station side of the instruction code “1,1” sends a message indicating a defect to the master station side.

Claims (11)

[Claims] 1. The master station includes a start pulse having a predetermined width, a command code following the command pulse, and a pulse having a first voltage level, followed by a pulse having a first voltage level and a pulse having at least one or more first voltage levels following the command pulse. 1 for each slave station
The clock voltage to be set is sent out through two transmission lines, and when the pulse of the first voltage level is sent out, it is sent out through the first constant current circuit. And when the count value corresponds to the address of the local station, the second constant current circuit connected in parallel to the transmission line based on the data of the slave station (however, the constant current value of the first constant current circuit is <Constant current value of second constant current circuit) is driven, and then the second constant current circuit is driven based on the data corresponding to the instruction code. Capture the first clock voltage of the corresponding address as input data,
A data transmission / reception method characterized in that the next clock voltage and subsequent voltages are fetched as data corresponding to the instruction code from the slave station. 2. The master station follows a start pulse of a predetermined width, a subsequent instruction code, and a trailing edge of the instruction code, and a pulse of a first voltage level or a pulse of 0V and at least one or more subsequent pulses according to output data. Of the first voltage level of the pulse and the slave station are transmitted as a set of clock voltages via two transmission lines, and when the pulse of the first voltage level is transmitted, Transmitted via the constant current circuit, the slave station counts the voltage signal of the transmission line, and when the count value corresponds to the address of its own station, it outputs on or off based on the first clock voltage of the corresponding address. Then, based on the data corresponding to the instruction code, a second constant current circuit connected in parallel to the transmission line (where the constant current value of the first constant current circuit <the constant current value of the second constant current circuit Current value
The method of transmitting and receiving data is characterized in that the master station side takes in the second and subsequent clock voltages of the corresponding address among the terminal voltages of the transmission line as data corresponding to the instruction code from the slave station side. . 3. The slave station side returns a voltage signal having a signal level different from the first clock voltage of the corresponding address to the master station side when the instruction code is for confirming safe transmission. Alternatively, the data transmission / reception method described in 2. 4. The master station has a start pulse of a predetermined width, a command code following the command pulse, and a pulse of a first voltage level following the command code, followed by a pulse of at least one or more first voltage levels. 1 for each slave station
The clock voltage to be set is sent out through two transmission lines, and when the pulse of the first voltage level is sent out, it is sent out through the first constant current circuit. And when the count value corresponds to the address of the own station, the second constant current circuit connected in parallel to the transmission line based on the data corresponding to the command code (however, the constant current circuit of the first constant current circuit Current value <constant current value of second constant current circuit) is driven, and the master station takes in the clock voltage of the corresponding address among the terminal voltages of the transmission line as the data corresponding to the instruction code from the slave station. A method of transmitting and receiving data, which is characterized by the following. 5. The data corresponding to the instruction code is made different between the child station input unit and the child station output unit when the instruction code is for confirming the connection state of the child station. The method of transmitting and receiving data described in 4. 6. The data transmitting / receiving method according to claim 5, wherein when the instruction code is a predetermined instruction, a specific message of the corresponding slave station is transmitted from the slave station side to the master station side. 7. A slave station having a start pulse of a predetermined width, an instruction code following the instruction code, a pulse of a first voltage level following the instruction code, and a pulse of at least one or more first voltage levels following it. The clock voltage to be set as one set is sent out through two transmission lines to
An output buffer for sending out the clock voltage of the voltage level of 1 through the first constant current circuit, an input buffer for taking in the terminal voltage of the transmission line as input data, and a clock voltage from the input buffer. First storage means for storing the first clock voltage of an address to be input as input data, and second and subsequent clock voltages of the corresponding address among the clock voltages from the input buffer as data corresponding to the instruction code. And a second storage means for storing the master station. 8. A start pulse having a predetermined width, an instruction code following the instruction pulse, and a pulse having a first voltage level following the instruction code and at least one or more first pulses following the pulse.
A clock voltage that corresponds to each slave station with a pulse of the voltage level of is transmitted from the master station via two transmission lines, rectifies these voltages via a directional element,
A smoothing circuit used as the power source of the slave station, a counter for counting the voltage signals of the two transmission lines, and detection of whether the count value of the counter matches a preset address of the own station, The local address signal detection circuit that outputs a coincidence signal and the current capacity larger than the current capacity of the clock voltage of the first voltage level at the address of the local station sent from the master station via the transmission line. A second constant current circuit having a parallel connection to the transmission line, a switch element connected in series to the second constant current circuit, and a storage unit for storing the instruction code, the coincidence signal, the sensor An output and an instruction code are input, data is generated based on the instruction code, and the sensor output and the data, or the switch element based on the data, according to the aspect of the instruction code. The slave station input unit, characterized in that it comprises a dynamic control unit. 9. A reset circuit is provided which, when the voltage signals of the two transmission lines exceed a predetermined width, judges that it is a start pulse and sends a reset signal to the counter and the storage means. The slave station input unit according to claim 7, which is characterized in that. 10. A start pulse having a predetermined width, an instruction code following the instruction pulse, and a pulse of a first voltage level following the instruction code and a pulse of a first voltage level followed by at least one or more first pulses.
A clock voltage that corresponds to each slave station with a pulse of the voltage level of is transmitted from the master station via two transmission lines, rectifies these voltages via a directional element,
A smoothing circuit used as a power source for the slave station, a counter for counting the voltage signals of the two transmission lines, and detection of whether or not the count value of the counter matches a preset address of the own station, The local address signal detection circuit that outputs a coincidence signal and the current capacity larger than the current capacity of the clock voltage of the first voltage level at the address of the local station sent from the master station via the transmission line. A second constant current circuit having a parallel connection to the transmission line, a switch element connected in series to the second constant current circuit, a storage unit for storing the instruction code, and a clock voltage of the transmission line; The match signal and the instruction code are input, data is generated based on the instruction code, and the first clock voltage when the match signal is input is set according to the aspect of the instruction code. And a control means for driving the switch element based on the data after being output to the load via the storage means, or for driving the switch element based on an instruction code based on the data. Station output unit. 11. A reset circuit is provided which, when the voltage signals of the two transmission lines exceed a predetermined width, determines that it is a start pulse and sends a reset signal to the counter. The slave station output unit according to claim 9.