JPH066224A - ヒステリシス不感性の単一コンパレータ式の逐次近似型アナログ−デジタル・コンバータ - Google Patents
ヒステリシス不感性の単一コンパレータ式の逐次近似型アナログ−デジタル・コンバータInfo
- Publication number
- JPH066224A JPH066224A JP5045488A JP4548893A JPH066224A JP H066224 A JPH066224 A JP H066224A JP 5045488 A JP5045488 A JP 5045488A JP 4548893 A JP4548893 A JP 4548893A JP H066224 A JPH066224 A JP H066224A
- Authority
- JP
- Japan
- Prior art keywords
- amplifier
- input
- mosfet
- capacitor
- significant bit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000003990 capacitor Substances 0.000 claims abstract description 122
- 239000004020 conductor Substances 0.000 claims abstract description 84
- 238000012360 testing method Methods 0.000 claims abstract description 75
- 238000006243 chemical reaction Methods 0.000 claims abstract description 19
- 238000000034 method Methods 0.000 claims description 12
- 230000002265 prevention Effects 0.000 claims 5
- 230000008878 coupling Effects 0.000 claims 2
- 238000010168 coupling process Methods 0.000 claims 2
- 238000005859 coupling reaction Methods 0.000 claims 2
- UDQDXYKYBHKBTI-IZDIIYJESA-N 2-[4-[4-[bis(2-chloroethyl)amino]phenyl]butanoyloxy]ethyl (2e,4e,6e,8e,10e,12e)-docosa-2,4,6,8,10,12-hexaenoate Chemical compound CCCCCCCCC\C=C\C=C\C=C\C=C\C=C\C=C\C(=O)OCCOC(=O)CCCC1=CC=C(N(CCCl)CCCl)C=C1 UDQDXYKYBHKBTI-IZDIIYJESA-N 0.000 description 19
- 238000010586 diagram Methods 0.000 description 4
- 238000003491 array Methods 0.000 description 3
- 238000005070 sampling Methods 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- 238000002347 injection Methods 0.000 description 2
- 239000007924 injection Substances 0.000 description 2
- 241001388118 Anisotremus taeniatus Species 0.000 description 1
- 230000003321 amplification Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/34—Analogue value compared with reference values
- H03M1/38—Analogue value compared with reference values sequentially only, e.g. successive approximation type
- H03M1/46—Analogue value compared with reference values sequentially only, e.g. successive approximation type with digital/analogue converter for supplying reference values to converter
- H03M1/466—Analogue value compared with reference values sequentially only, e.g. successive approximation type with digital/analogue converter for supplying reference values to converter using switched capacitors
- H03M1/468—Analogue value compared with reference values sequentially only, e.g. successive approximation type with digital/analogue converter for supplying reference values to converter using switched capacitors in which the input S/H circuit is merged with the feedback DAC array
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/66—Digital/analogue converters
- H03M1/74—Simultaneous conversion
- H03M1/80—Simultaneous conversion using weighted impedances
- H03M1/802—Simultaneous conversion using weighted impedances using capacitors, e.g. neuron-mos transistors, charge coupled devices
- H03M1/804—Simultaneous conversion using weighted impedances using capacitors, e.g. neuron-mos transistors, charge coupled devices with charge redistribution
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Analogue/Digital Conversion (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US846670 | 1986-03-31 | ||
| US07/846,670 US5235333A (en) | 1992-03-05 | 1992-03-05 | Hysteresis-insensitive single-comparator successive approximation analog-to-digital converter |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH066224A true JPH066224A (ja) | 1994-01-14 |
Family
ID=25298605
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5045488A Pending JPH066224A (ja) | 1992-03-05 | 1993-03-05 | ヒステリシス不感性の単一コンパレータ式の逐次近似型アナログ−デジタル・コンバータ |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US5235333A (enExample) |
| JP (1) | JPH066224A (enExample) |
| DE (1) | DE4307021C2 (enExample) |
| GB (1) | GB2264831A (enExample) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007531408A (ja) * | 2004-03-24 | 2007-11-01 | アナログ・デバイシズ・インコーポレーテッド | プログラマブル入力レンジadc |
Families Citing this family (27)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3103657B2 (ja) * | 1992-03-23 | 2000-10-30 | 松下電器産業株式会社 | 電圧保持回路及び容量結合網を有するa/d変換器 |
| US5600275A (en) * | 1994-04-29 | 1997-02-04 | Analog Devices, Inc. | Low-voltage CMOS comparator with offset cancellation |
| WO1995030279A1 (en) * | 1994-04-29 | 1995-11-09 | Analog Devices, Inc. | Charge redistribution analog-to-digital converter with system calibration |
| US5600322A (en) * | 1994-04-29 | 1997-02-04 | Analog Devices, Inc. | Low-voltage CMOS analog-to-digital converter |
| US5589832A (en) * | 1994-12-02 | 1996-12-31 | Lucent Technologies Inc. | Low noise non-sampled successive approximation |
| US5638072A (en) * | 1994-12-07 | 1997-06-10 | Sipex Corporation | Multiple channel analog to digital converter |
| US5668551A (en) * | 1995-01-18 | 1997-09-16 | Analog Devices, Inc. | Power-up calibration of charge redistribution analog-to-digital converter |
| US5621409A (en) * | 1995-02-15 | 1997-04-15 | Analog Devices, Inc. | Analog-to-digital conversion with multiple charge balance conversions |
| US5675340A (en) * | 1995-04-07 | 1997-10-07 | Iowa State University Research Foundation, Inc. | Charge-redistribution analog-to-digital converter with reduced comparator-hysteresis effects |
| US5920275A (en) * | 1996-09-09 | 1999-07-06 | Iowa State University Research Foundation, Inc. | Analog-to-digital converter using weighted capacitor array and interpolating comparator |
| FR2784193B1 (fr) * | 1998-10-05 | 2001-01-05 | Texas Instruments France | Mecanisme integre permettant une detection de defaillances par test automatique en temps reel pour un convertisseur analogique/numerique |
| JP4489914B2 (ja) * | 2000-07-27 | 2010-06-23 | 浜松ホトニクス株式会社 | A/d変換装置および固体撮像装置 |
| US6384760B1 (en) * | 2001-05-30 | 2002-05-07 | Agilent Technologies, Inc. | Analog-to-digital converter |
| US7271755B2 (en) * | 2002-05-24 | 2007-09-18 | Broadcom Corporation | Resistor ladder interpolation for PGA and DAC |
| US7190298B2 (en) * | 2002-05-24 | 2007-03-13 | Broadcom Corporation | Resistor ladder interpolation for subranging ADC |
| US6950052B2 (en) * | 2003-06-03 | 2005-09-27 | Silicon Labs Cp, Inc. | Noise cancellation in a single ended SAR converter |
| US6977607B2 (en) * | 2003-06-03 | 2005-12-20 | Silicon Labs Cp, Inc. | SAR with partial capacitor sampling to reduce parasitic capacitance |
| US7336214B2 (en) * | 2005-12-16 | 2008-02-26 | Alexander Krymski | Analog to digital converter circuit with offset reduction and image sensor using the same |
| AT503742B8 (de) * | 2006-05-15 | 2011-08-15 | Arc Austrian Res Centers Gmbh | Elektronische biosensoranordnung |
| US7511645B1 (en) * | 2007-03-27 | 2009-03-31 | National Semiconductor Corporation | Apparatus and method for auto-zeroing a sampled comparator |
| US7928744B2 (en) * | 2008-12-02 | 2011-04-19 | Analog Devices, Inc. | Monitoring circuit having a self test function |
| US8378864B2 (en) | 2011-03-16 | 2013-02-19 | Integrated Device Technology, Inc. | Apparatuses and methods for reducing errors in analog to digital converters |
| US8477052B2 (en) * | 2011-04-05 | 2013-07-02 | Freescale Semiconductor, Inc. | Method and apparatus for self-test of successive approximation register (SAR) A/D converter |
| EP2555432B1 (en) * | 2011-08-03 | 2014-07-23 | Nxp B.V. | Successive approximation register ADC circuits and methods |
| JP2015109422A (ja) * | 2013-10-22 | 2015-06-11 | 株式会社半導体エネルギー研究所 | 半導体装置の評価方法 |
| US10200041B2 (en) * | 2016-11-01 | 2019-02-05 | Analog Devices Global | Analog multiplexer |
| WO2019229678A1 (en) * | 2018-05-30 | 2019-12-05 | King Abdullah University Of Science And Technology | Successive approximation register (sar) analog to digital converter (adc) |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4138666A (en) * | 1977-11-17 | 1979-02-06 | General Electric Company | Charge transfer circuit with threshold voltage compensating means |
| US4348658A (en) * | 1980-05-09 | 1982-09-07 | Motorola, Inc. | Analog-to-digital converter using half range technique |
| US4620179A (en) * | 1983-08-29 | 1986-10-28 | Harris Corporation | Method for successive approximation A/D conversion |
| US4940981A (en) * | 1989-02-08 | 1990-07-10 | Burr-Brown Corporation | Dual analog-to-digital converter with single successive approximation register |
| US4975700A (en) * | 1989-05-24 | 1990-12-04 | Texas Instruments, Incorporated | Analog-to-digital converter with non-linear error correction |
| US4947169A (en) * | 1989-10-24 | 1990-08-07 | Burr-Brown Corporation | Dummy/trim DAC for capacitor digital-to-analog converter |
| US5006853A (en) * | 1990-02-12 | 1991-04-09 | Texas Instruments Incorporated | Hysteresis insensitive analog to digital converter system using a coarse comparator and a fine comparator |
-
1992
- 1992-03-05 US US07/846,670 patent/US5235333A/en not_active Expired - Lifetime
-
1993
- 1993-02-25 GB GB9303872A patent/GB2264831A/en not_active Withdrawn
- 1993-03-05 JP JP5045488A patent/JPH066224A/ja active Pending
- 1993-03-05 DE DE4307021A patent/DE4307021C2/de not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007531408A (ja) * | 2004-03-24 | 2007-11-01 | アナログ・デバイシズ・インコーポレーテッド | プログラマブル入力レンジadc |
Also Published As
| Publication number | Publication date |
|---|---|
| DE4307021A1 (enExample) | 1993-09-09 |
| DE4307021C2 (de) | 2002-11-14 |
| GB9303872D0 (en) | 1993-04-14 |
| GB2264831A (en) | 1993-09-08 |
| US5235333A (en) | 1993-08-10 |
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