JPH0662057A - Asynchronous data transmission system - Google Patents

Abstract

PURPOSE:To receive a set of generated data even when data access is asynchronously executed in the reception side in the system transmitting the generated data being a set of plural data by several times. CONSTITUTION:The generated data a1-a4 bein a set of plural data generated at an information generation circuit 1 are temporarily held in a memory 2, and the reception side is informed of the generation of transmitting data. While receiving this information, a reception control circuit 3 outputs a transmission request for each pair of data and outputs an instruction to a selection circuit 3 so as to successively send the respective data and when a pair of data are completely transmitted, data to be newly transmitted are read out of the memory 2. These transmitted data are processed by one set unit in a received data processing circuit to obtain a normal data.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an asynchronous data transmission system, and more particularly to a system for reading a predetermined number of sets of data a plurality of times by a plurality of asynchronous accesses from a receiving side.

[0002]

2. Description of the Related Art FIG. 3 is a block diagram of a conventional asynchronous data transmission system. 11 is an information generation circuit, 12 is a selection circuit, 13 is a reception data processing circuit, and 14 is a reception control circuit.

Referring to this figure, there is shown a case where four sets of data a11, a12, a13, a14 are generated in the information generating circuit 11 in units of 8 bits. These data are guided to the selection circuit 12 via the parallel transmission path. The selection circuit 12 inputs data (parallel data)
Is converted into transmission data b1 which is serial data and sequentially output to the serial transmission line (data transfer means). The reception data processing circuit 13 receives the transmission data b1 and performs data identification processing (determination). Further, the reception control circuit 14
Transmission data selection signal c1, reception data acquisition signal e1,
The transmission / reception of the transmission data b1 is controlled by the data reception confirmation signal d1.

Next, using the above method, the information generating circuit 11
Four kinds of data a11, a12, a which occur at any time in
A case of sequentially reading 13 and a14 will be described.

When the reception data processing circuit 13 needs to read data, the reception control circuit 14 outputs a transmission data selection signal c1 to the selection circuit 12. Selection circuit 1
In 2, the data is selected based on the transmission data selection signal c1 and is sent as the transmission data b1. At the same time, the reception data processing circuit 13 outputs the reception data acquisition signal e1 to acquire the transmission data b1.

In the reception data processing circuit 13, when the first transmission data b1 is fetched, a data reception confirmation signal d1 is generated and sent to the reception control circuit 14. In the reception control circuit 14,
Next, the transmission data selection signal c1 is output to the selection circuit 12 to select the data to be read, and the procedure of transmitting the data again is repeated. According to the example of FIG. 3, data generated at an arbitrary time is repeatedly read in the order of a11, a12, a13, and a14 and transferred to the reception data processing circuit 13.

[0007]

Such an asynchronous data transmission method is characterized in that the access to the generated data from the receiving side is performed asynchronously. Therefore, when the data generated by the information generating circuit 11 is meaningful as a plurality of combinations, that is, a set of data determined by the number of parallel transmission lines, the following problems occur.

That is, depending on the data read timing, when the reading is completed as a regular set of data,
In some cases, new data is generated in the information generating circuit 11 during reading of a plurality of data, and two sets of data having different generation times or data up to the number of sets of new data are mixedly read. , There were cases where the receiving side could not guarantee the data as a legitimate set of data.

An object of the present invention is to provide an asynchronous data transmission system which can solve the above problems.

[0010]

The structure of the present invention for achieving the above object uses an information generating circuit for asynchronously generating a plurality of data at an arbitrary time and a parallel transmission line for the generated data. In an asynchronous data transmission system having a data transfer means for sequentially transferring to a receiving side, a data classification means for classifying the generation of the plurality of data into groups of a number determined by the number of the transmission paths, and each classified group Memory for temporarily holding the data of the above, an information generation notifying means for notifying the receiving side of the data generation for each set, and the data transfer means for transferring the data in the memory based on the instruction from the receiving side which has received the notification And a memory control circuit leading to the memory.

The configuration of the present invention further comprises: a reception control circuit which sends an instruction to the memory control means to allow the reception side to receive the data of the set when the reception side receives the data generation notification; And a reception data processing circuit for taking in the received data and recognizing it as the set of data.

In the above structure, the data transfer means has a selection circuit for converting a set of data sent from the parallel transmission path into a serial data string having a predetermined arrangement.

[0013]

A plurality of data generated at an arbitrary time in the information generating circuit are classified into a set by the data classifying means and temporarily stored in the memory. At the same time, the reception side is notified of the data generation and prompts the preparation for reception. Then, based on an instruction from the receiving side, the memory control circuit sequentially guides the data held in the memory to the data transfer means for each set. As a result, the data is sequentially transferred to the receiving side. When the data transfer of the set is completed, the data transfer is performed in the same procedure based on the data generation notification of the next set.

[0014]

Embodiments of the present invention will now be described with reference to the drawings.

FIG. 1 is a block diagram of an asynchronous data transmission system according to an embodiment of the present invention, and FIG. 2 shows signal waveforms of respective parts. In the block diagram of FIG. 1, 1 is an information generation circuit, 2
Is a memory, 3 is a selection circuit, 4 is a received data processing circuit, 5
Is a reception control circuit, and 6 is a memory control circuit.

A case will be described below in which four types of sequentially generated data a1, a2, a3, and a4 are sequentially accessed from the receiving side as one set, as in the conventional case.

When data is generated in the information generation circuit 11, an information generation notification signal d is sent to the memory control circuit 6. Specifically, the information generation notification signal d is a trigger signal that rises at the data string cycle of each set, as shown in FIG. Therefore, the signal d classifies the data for each set (data classifying means). The memory control circuit 6 receives the information generation notification signal d to generate a data write signal e having the timing waveform of FIG. As a result, the data a1, a2, a3, a4 are sequentially written in the memory 2 and temporarily stored therein.

When the data to be transmitted to the reception data processing circuit 4 is stored in the memory 2 in this way,
The memory control circuit 6 sends a transmission data generation notification signal 1 to the reception control circuit 5 to notify that effect (information generation notification means). This transmission data occurrence notification signal 1 is shown in FIG.
As shown in, the signal has the same timing as the information generation notification signal d, and the reception control circuit 5 that has received this signal prepares for reception and sends a data transfer instruction to the memory control circuit. Specifically, a read request signal j generated at a slightly sent timing is transmitted to the memory control circuit 6 to generate a data read control signal f, and the data a1, a2, a
Read data b1, b2, b3, b4 corresponding to 3, a4
Are sequentially read from the memory 2.

If the first data b1 of the read data b1, b2, b3, b4 is the data D11 to be transmitted first, a transmission data selection signal g for transmitting this data D11 is received from the reception control circuit 5. The data D11 is output to the selection circuit 3 and is set so as to be sent to the serial transmission line. At this time, the reception control circuit 5 gives a reception data acquisition signal h to the reception data processing circuit 4 to instruct the data reception, and the data D11 converted into the transmission data c through the selection circuit 3 is received data processing. It is received by the circuit 4. When the data reception is completed, the reception data processing circuit 4 transmits the data reception confirmation signal m to the reception control circuit 5.

When the reception control circuit 5 recognizes the completion of reception of the first data D11 by the data reception confirmation signal m, it controls the second data b2 (D21) read. That is, each unit is made to perform the same procedure as above. After that,
The same procedure is performed for the remaining data b3 and b4 (D31, D41), and the data read completion signal k is sent when the last data b4 (D41) is read. This completes the reading of the set of read data b1 to b4 (D11 to D41), and the address of the data read from the memory 2 is updated by the data read control signal f. At this point, if the transmission data generation notification signal 1 determined by the memory control circuit 6 is in the generation state, the process proceeds to the process of transmitting new read data b1 to b4 (D12 to D42) from the updated address.

In this embodiment, four kinds of data a1,
The case where a2, a3, and a4 are set as one set of data has been described, but the number of data may be arbitrary and is not limited to this embodiment.

[0022]

As is apparent from the above description, according to the present invention, when a plurality of data are generated, the data are classified into sets and temporarily stored in the memory, and the reception side is notified of the fact. Since the data transfer is performed for each set based on the instruction from the receiving side, the content as one set of data is guaranteed even if the data read request is made asynchronously.

The receiving side sends a command when receiving a data generation notification to allow the reception of the data of the set, and a reception control circuit for fetching the received data and recognizing it as a set of data. Since it has a reception data processing circuit, there is an effect that one set of generated data can be processed as a regular one on the receiving side.

With such a configuration, even if one set of data sent from the parallel transmission path is converted into a serial data string having a predetermined arrangement by the selection circuit and then transmitted, data mixing with other sets is effective. Therefore, the conventional problems can be solved.

[Brief description of drawings]

FIG. 1 is a block diagram of an asynchronous data transmission system according to an embodiment of the present invention.

FIG. 2 is a diagram showing a signal waveform of each part in the block diagram.

FIG. 3 is a block diagram of a conventional asynchronous data transmission system.

[Explanation of symbols]

 1, 11 Information generation circuit 2 Memory 3, 12 Selection circuit 4, 13 Reception data processing circuit 5, 14 Reception control circuit 6 Memory control circuit a1, a2, a3, a4 Generation data b1, b2, b3, b4 Read data c Transmission Data d Information generation signal e Data write control signal f Data read control signal g Transmission data selection signal h Received data acquisition signal j Read request signal k Data read completion signal l Transmission data generation notification signal m Data reception confirmation signal

Claims (3)

[Claims] 1. An asynchronous data transmission system comprising an information generating circuit for asynchronously generating a plurality of data at an arbitrary time and a data transfer means for sequentially transferring the generated data to a receiving side using a parallel transmission path. , A data classification means for classifying the generation of the plurality of data into sets of a number determined by the number of the transmission lines, a memory for temporarily holding the data of each classified set, and a data generation for each set Asynchronous data transmission characterized by including an information generation notifying means for notifying the data transfer side, and a memory control circuit for guiding the data in the memory to the data transfer means based on an instruction from the receiving side which has received the notification. method. 2. The asynchronous data transmission system according to claim 1, wherein the receiving side sends an instruction to the memory control means when the data generation notification is received, and allows reception of the data of the set. An asynchronous data transfer system comprising a control circuit and a received data processing circuit for taking in received data and recognizing it as the set of data. 3. The data transfer means has a selection circuit for converting a set of data sent from a parallel transmission line into a serial data string of a predetermined arrangement. Asynchronous data transmission method.