JPH065724A - Vessel for semiconductor device - Google Patents

Vessel for semiconductor device

Info

Publication number
JPH065724A
JPH065724A JP16235692A JP16235692A JPH065724A JP H065724 A JPH065724 A JP H065724A JP 16235692 A JP16235692 A JP 16235692A JP 16235692 A JP16235692 A JP 16235692A JP H065724 A JPH065724 A JP H065724A
Authority
JP
Japan
Prior art keywords
side wall
ceramic
semiconductor device
metal
sidewall
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP16235692A
Other languages
Japanese (ja)
Other versions
JP2773549B2 (en
Inventor
Kiyoshi Handa
清 半田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=15753012&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=JPH065724(A) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP4162356A priority Critical patent/JP2773549B2/en
Publication of JPH065724A publication Critical patent/JPH065724A/en
Application granted granted Critical
Publication of JP2773549B2 publication Critical patent/JP2773549B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Abstract

PURPOSE:To provide a vessel for a semiconductor device in which a crack of a ceramic sidewall disposed in a cutout of a metal sidewall for constituting a cavity is prevented. CONSTITUTION:Ceramic sidewall for supporting outer leads 6 are fixed to cutouts 4 formed on a metal sidewall 1 for constituting a cavity 2 for placing a semiconductor element by Ag brazing material 7. A structure of the ceramic sidewall 5 is formed in an H-shaped or recess section thereby to alleviate influence of a thermal stress, a mechanical stress to the ceramic side, thereby preventing the ceramic sidewall from cracking.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、半導体装置用容器に関
し、特に気密封止用の金属で構成された半導体装置用容
器に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device container, and more particularly to a semiconductor device container made of a metal for hermetically sealing.

【0002】[0002]

【従来の技術】従来の半導体素子を気密封止する半導体
装置用の容器は図3(a)及び(b)にそれぞれ平面図
及び正面図を示すように、金属材を加工した金属側壁1
で囲まれるキャビティ2を構成し、このキャビティ内に
半導体素子を搭載するようにしている。この金属側壁1
の外側には放熱板3が一体に設けられる。又、金属側壁
1の一部は切り欠かれてい切欠部4が設けられこの切欠
部にセラミック側壁5が配置され、このセラミック側壁
5の周囲の全体においてAgロー材7により金属側壁1
に一体化されている。このセラミック側壁5に外部導出
リード6がキャビティ2の内外にわたって貫通支持され
ており、キャビティ2内に搭載される半導体素子に電気
接続される。
2. Description of the Related Art A conventional container for a semiconductor device for hermetically sealing a semiconductor element has a metal side wall 1 formed by processing a metal material, as shown in a plan view and a front view in FIGS. 3 (a) and 3 (b), respectively.
A cavity 2 surrounded by is formed, and a semiconductor element is mounted in this cavity. This metal side wall 1
A heat dissipation plate 3 is integrally provided on the outer side of the. Further, a part of the metal side wall 1 is notched so that a notch portion 4 is provided, and a ceramic side wall 5 is arranged in this notch portion.
Is integrated into. External lead-outs 6 are penetratingly supported on the ceramic side wall 5 inside and outside the cavity 2, and are electrically connected to a semiconductor element mounted in the cavity 2.

【0003】[0003]

【発明が解決しようとする課題】このような従来の半導
体装置用容器では、セラミック側壁5の周囲全面におい
て金属側壁5の熱膨張率が相違することから、半導体素
子の搭載時における金属側壁1の熱収縮によりセラミッ
クス側壁5に熱応力が加わり、セラミックス側壁5にク
ラックが生じるという問題がある。又、電気特性検査時
において金属側壁1及び放熱板3を検査治具で固定した
場合に、これらを構成する金属部材に加わる圧力により
セラミックス側壁5に応力が加わって同様にクラックが
生じるという問題がある。
In such a conventional semiconductor device container, the coefficient of thermal expansion of the metal side wall 5 is different over the entire peripheral surface of the ceramic side wall 5, so that the metal side wall 1 is mounted when the semiconductor element is mounted. There is a problem that a thermal stress is applied to the ceramic side wall 5 due to the thermal contraction and a crack is generated on the ceramic side wall 5. In addition, when the metal side wall 1 and the heat sink 3 are fixed by an inspection jig during the electrical characteristic inspection, stress is applied to the ceramic side wall 5 due to the pressure applied to the metal members forming these, and similarly cracks occur. is there.

【0004】本発明の目的はセラミックス側壁のクラッ
クを防止した半導体装置用容器を提供することにある。
An object of the present invention is to provide a container for a semiconductor device in which a side wall of a ceramic is prevented from cracking.

【0005】[0005]

【課題を解決するための手段】本発明の半導体装置用容
器は、セラミックス側壁を外部導出リード取付部と内部
結線部の一方又は両方がくぼんだ直方体とした構造とし
ている。本発明によれば、セラミックス側壁の金属側壁
に接触している側の面積が多くなり、金属側壁に生じた
応力を分散させることができ、セラミックス側壁のセラ
ミックのクラックが防止される。
The container for a semiconductor device of the present invention has a structure in which the side wall of the ceramic is a rectangular parallelepiped in which one or both of the external lead-out lead mounting portion and the internal connecting portion are recessed. According to the present invention, the area of the side wall of the ceramic which is in contact with the metal side wall is increased, the stress generated in the metal side wall can be dispersed, and the crack of the ceramic on the side wall of the ceramic is prevented.

【0006】[0006]

【実施例】次に本発明について図面を参照して説明す
る。図1は本発明の半導体装置用容器の第1の実施例を
示し、同図(a)は平面図,同図(b)は正面図であ
る。これまでと同様に金属を加工した側壁1を形成し、
内部に半導体素子を搭載するためのキャビティ2を形成
する。金属側壁1の外側には放熱板3が一体形成され
る。又、金属側壁の内面、内底面等はMo−Mn等での
メタライズが施されている。更に、金属側壁1の一部は
切り欠かれて切欠部4が設けられ、ここにセラミックス
側壁5が配設され、外部導出リード6を支持している。
このセラミックス側壁5は金属側壁1にAgロー材7で
接続されている。このセラミックス側壁5は、リード導
出部の上の面の断面はH形をしている。このように本実
施例では図3の従来のものに比べてAgロー付けされて
いる側面が広なっているので半導体搭載時の熱応力が広
い面に分散されるのでクラックが生じずらい。
The present invention will be described below with reference to the drawings. 1A and 1B show a first embodiment of a container for a semiconductor device of the present invention. FIG. 1A is a plan view and FIG. 1B is a front view. Form the side wall 1 made of metal as before,
A cavity 2 for mounting a semiconductor element is formed inside. A heat dissipation plate 3 is integrally formed on the outer side of the metal side wall 1. Further, the inner surface, inner bottom surface, etc. of the metal side wall are metallized with Mo-Mn or the like. Further, a part of the metal side wall 1 is cut out to form a cutout portion 4, and a ceramic side wall 5 is arranged therein to support the external lead-out 6.
The ceramic side wall 5 is connected to the metal side wall 1 by an Ag brazing material 7. The ceramic side wall 5 has an H-shaped cross section on the surface above the lead-out portion. As described above, in this embodiment, since the side surface to which Ag brazing is applied is wider than that of the conventional one shown in FIG. 3, the thermal stress at the time of mounting the semiconductor is dispersed to the wider surface, and thus cracks are less likely to occur.

【0007】次に、本発明の第2の実施例について図2
を参照して説明する。図2(a)は平面図、(b)は正
面図である。なお、図1と同一部分には同一符号を付し
てある。この実施例では、セラミックス側壁5は、リー
ド導出部の上の面の断面はキャビティの外に向って凹状
になっている。この実施例でもAgロー付けされる側面
が大きいので耐クラック性が向上する。
Next, a second embodiment of the present invention will be described with reference to FIG.
Will be described with reference to. 2A is a plan view and FIG. 2B is a front view. The same parts as those in FIG. 1 are designated by the same reference numerals. In this embodiment, the ceramic side wall 5 has a concave cross-section on the surface above the lead lead-out portion toward the outside of the cavity. Also in this embodiment, since the side surface to which Ag brazing is applied is large, the crack resistance is improved.

【0008】[0008]

【発明の効果】以上説明したように本発明によれば、セ
ラミック側壁の金属側壁とAgロー付けされている側面
は、従来の容器にくらべて10〜30%広くなるので、
半導体素子搭載時に熱応力あるいは電気特性検査時の治
具固定時の機械的応力が側壁1に生じても応力が分散さ
れるのでセラミック側壁5の耐クラック性は向上する。
図に、第1の実施例の半導体装置用容器によれば、ある
条件下での半導体素子搭載時のセラミック側壁のクラッ
クは従来容器の3個/20個発生に対し、0個/20個
と良好な結果を得ている。
As described above, according to the present invention, the side wall of the side wall of the ceramic side wall and Ag brazed is 10 to 30% wider than the conventional container.
Even if the side wall 1 is subjected to thermal stress when mounting a semiconductor element or mechanical stress at the time of fixing a jig during electrical characteristic inspection, the stress is dispersed, so that the crack resistance of the ceramic side wall 5 improves.
In the figure, according to the semiconductor device container of the first embodiment, the number of cracks on the ceramic side wall when mounting a semiconductor element under certain conditions is 0/20, compared with 3/20 in the conventional container. Good results have been obtained.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の第1の実施例を示す図で、(a)は平
面図、(b)は正面図である。
FIG. 1 is a diagram showing a first embodiment of the present invention, in which (a) is a plan view and (b) is a front view.

【図2】本発明の第2の実施例を示す図で、(a)は平
面図、(b)は正面図である。
FIG. 2 is a diagram showing a second embodiment of the present invention, in which (a) is a plan view and (b) is a front view.

【図3】従来の半導体装置用容器を示す図で、(a)は
平面図、(b)は正面図である。
3A and 3B are diagrams showing a conventional semiconductor device container, in which FIG. 3A is a plan view and FIG. 3B is a front view.

【符号の説明】[Explanation of symbols]

1 金属側壁 2 キャビティ 3 放熱板 4 切欠部 5 セラミックス側壁 6 外部導出リード 7 Agロー材 1 Metal Side Wall 2 Cavity 3 Heat Sink 4 Notch 5 Ceramic Side Wall 6 External Lead 7 Ag Brazing Material

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 金属側壁で囲まれて内部に半導体素子を
収納するキャビティを有し、この金属側壁の一部に設け
た切欠部をセラミックス側壁で構成して成る半導体装置
用容器において、前記セラミックスの形状が外部導出用
リード取付け部と内部結線部のどちらか又は両方がくぼ
んだ直方体であることを特徴とする半導体装置用容器。
1. A container for a semiconductor device, comprising a cavity surrounded by a metal side wall for accommodating a semiconductor element therein, and a notch formed in a part of the metal side wall is constituted by a ceramic side wall. Is a rectangular parallelepiped in which either or both of the lead-out portion for external lead-out and the internal wire connecting portion are recessed.
JP4162356A 1992-06-22 1992-06-22 Container for semiconductor device Expired - Lifetime JP2773549B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4162356A JP2773549B2 (en) 1992-06-22 1992-06-22 Container for semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4162356A JP2773549B2 (en) 1992-06-22 1992-06-22 Container for semiconductor device

Publications (2)

Publication Number Publication Date
JPH065724A true JPH065724A (en) 1994-01-14
JP2773549B2 JP2773549B2 (en) 1998-07-09

Family

ID=15753012

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4162356A Expired - Lifetime JP2773549B2 (en) 1992-06-22 1992-06-22 Container for semiconductor device

Country Status (1)

Country Link
JP (1) JP2773549B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4961121A (en) * 1987-09-22 1990-10-02 International Business Machines Corporation Air bearing slider rail design with trumpet-shaped rail portion
WO2007039614A1 (en) 2005-10-03 2007-04-12 Mettler-Toledo Ag Dosing device for powdery or pasty substances

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04287950A (en) * 1991-02-28 1992-10-13 Mitsubishi Electric Corp Package for semiconductor device
JPH05183065A (en) * 1991-12-27 1993-07-23 Shinko Electric Ind Co Ltd Metal package for semiconductor

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04287950A (en) * 1991-02-28 1992-10-13 Mitsubishi Electric Corp Package for semiconductor device
JPH05183065A (en) * 1991-12-27 1993-07-23 Shinko Electric Ind Co Ltd Metal package for semiconductor

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4961121A (en) * 1987-09-22 1990-10-02 International Business Machines Corporation Air bearing slider rail design with trumpet-shaped rail portion
WO2007039614A1 (en) 2005-10-03 2007-04-12 Mettler-Toledo Ag Dosing device for powdery or pasty substances

Also Published As

Publication number Publication date
JP2773549B2 (en) 1998-07-09

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Legal Events

Date Code Title Description
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 19980324