JPH0654853B2 - Automatic zero adjustment circuit - Google Patents

Description

TECHNICAL FIELD The present invention relates to an automatic zero adjustment circuit used in a field requiring a wide range zero correction function in a high performance measuring instrument.

(B) Prior Art A simple zero point correction in a general amplifier is to charge a capacitor with a shift (offset) voltage from the zero point, always store the voltage, and feed it back to an input circuit. However, although this method is simple, it is impossible to constantly correct the offset voltage for a long time because the capacitor is discharged.

Therefore, conventionally, as shown in FIG. 2, the output of the amplifier 1 in which an offset occurs is converted into a digital signal by the A / D converter 2, and further converted into an analog signal by the D / A converter 3, which is then amplified. It was supposed to feed back to the input side of 1. This zero-point adjustment circuit can prevent long-term drift. The comparator 4 is provided to operate the A / D converter 2 and the D / A converter 3 when the offset output of the amplifier 1 is a predetermined value or more.

(C) Problem to be Solved by the Invention In the above-described conventional automatic zero-point adjusting circuit, the comparator 4 checks whether the output of the amplifier 1 is within a certain range, and the A / D converter is included until it is within the range. 2 and the D / A converter 3 operate, and the correction operation by feedback continues.

By the way, some amplifiers that perform zero point correction have a low-pass filter, which becomes a delay element. On the other hand, if the field capability of the A / D converter is set to the limit of the comparator range in order to reduce the cost of the circuit, the delay time of the delay element of the above-mentioned amplifier is effective, and as shown in FIG.
The correction value hunts and is not stable forever. To eliminate this hatching, the A / D conversion speed may be slowed down, but if the zero point is greatly deviated, it will take a long time to complete the correction.

The present invention was made in view of the above problems, and by making the conversion speed continuous according to the magnitude of the offset value, even if the offset value is large,
It is an object of the present invention to provide an automatic zero point adjustment circuit that can be corrected in a short time.

(D) Means and Actions for Solving the Problem An automatic zero point adjusting circuit of the present invention includes an amplifier whose zero point is adjusted, an absolute value detecting circuit for deriving an absolute value of the output of the amplifier, and an output of the absolute value detecting circuit. A voltage / frequency conversion circuit for converting a voltage into a frequency signal, and a positive / negative determination circuit for determining whether the deviation of the output of the amplifier with respect to a reference level is a predetermined value or more and whether the deviation is toward a positive side or a negative side. A reversible count for down-counting or up-counting the frequency signal from the voltage / frequency converter, a D / A converter for converting the reversible counter output into an analog value, according to the positive / negative discrimination result. And a feedback circuit for feeding back the output of the D / A converter to the input side of the amplifier so as to correct the zero point shift of the amplifier.

In this automatic zero point adjustment circuit, the absolute value of the output of the amplifier is derived from the absolute value detection circuit, and the frequency signal corresponding to the shift of the zero point is input to the reversible counter in the voltage / frequency conversion circuit. Further, when the output of the amplifier exceeds the predetermined value and there is a regular deviation, a signal indicating positive is output from the positive / negative discrimination circuit, and conversely, when the deviation is on the negative side, it indicates negative. The signal is output. In the reversible counter, the frequency signal (pulse signal) from the voltage / frequency conversion circuit is down-counted in response to the positive signal, and conversely, the frequency signal is up-counted in response to the negative signal. The count value of the reversible counter is converted into an analog signal by the D / A converter, fed back to the amplifier 1 by the feedback circuit, and is corrected so that the zero point shift becomes a predetermined value or less.

(E) Examples Hereinafter, the present invention will be described in more detail with reference to Examples.

FIG. 1 is a circuit diagram of an automatic zero point adjusting circuit showing an embodiment of the present invention. In the circuit of this embodiment, the output of the detector 11 is amplified by the amplifier 12 and output via the resistor R ₁ . A low-pass filter including a resistor R and a capacitor C connected in parallel is connected to the output terminal and the input terminal of the amplifier 12. The output terminal of the amplifier 12 has an absolute value detection circuit 13
Is connected to the input terminal of the positive / negative comparator 14.
The absolute value detection circuit 13 outputs the absolute value of the DC component regardless of whether the output of the amplifier 12 is positive or negative. In the positive / negative comparator 14, the output of the amplifier 12 is a zero point ± V _0.
The function to determine whether it is outside the range of, and the zero point ±
When V ₀ is exceeded, it has a function of determining whether it is on the positive side or the negative side of the zero point, and the positive determination signal and the negative determination signal are applied to the input ends of the AND gates 16 and 17. It is supposed to be added. The output of the absolute value detection circuit 13 is connected to the input of the voltage / frequency converter 14. The voltage / frequency converter 14 outputs a pulse signal (frequency signal) having a frequency corresponding to the input voltage value, and is applied to the other input ends of the AND gates 16 and 17. The output end of the AND gate 16 is the UP input end of the reversible counter 18, and the output end of the AND gate 17 is the reversible counter 1.
8 is connected to the DOWN input terminal. Reversible counter 1
The output of 3 is connected to the input of the D / A converter 19,
The output of the A converter 19 is connected to the input terminal of the amplifier 12 via the resistor R _3, and the output of the D / A converter 19 is fed back to the amplifier 12.

Next, the operation of the embodiment automatic zero-point adjusting circuit configured as described above will be described.

Now, when the detection signal input from the detector 11 is not output to the amplifier 12 and the output of the amplifier 12 is smaller than the predetermined ± V ₀ value, the output of the amplifier 12 is the absolute value detection circuit 13 Although the absolute value is derived as it is, the positive / negative comparator 14 determines that it is within ± V ₀ , and outputs neither the positive determination signal nor the negative determination signal. Therefore, the pulse signal derived from the absolute value detection circuit 13 and converted into the frequency signal by the voltage / frequency converter 15 is not derived via the AND gates 16 and 17,
The reversible counter 18 does not count up or down. Therefore, the feedback signal from the D / A converter 19 is zero, and zero correction is not performed.

However, when the output of the amplifier 12, that is, the zero point greatly deviates beyond ± V ₀ , for example, when the offset value becomes large as shown in FIG. 3, this large offset value, that is, the amplifier 12 The output value of is the absolute value detection circuit 13
Is converted into a pulse signal having a large frequency by the voltage / frequency converter 15 and input to the input terminals of the AND gates 16 and 17. On the other hand, the positive / negative comparator 14 inputs the positive determination signal to the AND gate 17 because it determines that the input signal exceeds ± V ₀ and is positive.
As a result, the frequency signal of the voltage / frequency converter 15 is applied to the DOWN input terminal of the reversible counter 18 via the AND gate 17, and the reversible counter down-counts the input pulse signal. The count value is converted into an analog signal by a D / A converter 19, via a resistor R _3, the feedback is fed back to the amplifier 12, since the contents of the reversible Kauta 18 is counting down, the offset value until it Is input in the direction so as to greatly reduce the offset value, the offset value sharply decreases as shown in FIG. However, as a result, the output of the amplifier 12 is corrected, and when the offset value becomes considerably small, the positive / negative comparator 14 still outputs a positive signal when the offset value is ± V ₀ or more. 17 remains open. However,
Since the output of the amplifier 12 is greatly reduced, the voltage signal derived from the absolute value detection circuit 13 is reduced, and accordingly, the output of the voltage / frequency converter 15, that is, the number of pulses of the frequency signal is reduced, The count value down-counted by the reversible counter 18 is greatly reduced, and therefore D /
The signal voltage fed back from the A converter 19 also becomes small, and the tendency of correction becomes gentle. That is, as the correction progresses and the offset value decreases, the pulse signal output from the voltage / frequency converter 15 also decreases, and the correction degree decreases.

Therefore, in the circuit of this embodiment, unlike the conventional example shown in FIG. 4, there is no possibility that the offset value fluctuates plus or minus and hunting occurs. It will stabilize early.

If the output of the amplifier 12 is shifted to the negative side,
Negative discrimination is made by the positive / negative comparator 14, the deviation value is derived by the tax-value detection circuit 13, and converted by the voltage / frequency converter 15 into a frequency signal in the same manner as described above. Is input to the up counter of the reversible counter 18 via the AND gate 16, so that the reversible counter 18 counts up the pulse signal, and the count value is passed through the resistor R ₃ in the D / A converter 19 to
It is fed back to the amplifier 12. In this case, the feedback is performed so that the offset value on the negative side of 0 is smaller.

(F) Effects of the Invention According to the present invention, the output of the amplifier is derived through the absolute value detection circuit, converted into a frequency signal by the voltage / frequency converter, and at a large frequency when the offset value is large, In other words, at high speed, the offset is corrected to zero,
On the contrary, if the offset value becomes small, the output frequency of the voltage / frequency converter becomes small and the correction is performed slowly. Therefore, when the offset value is large,
It is possible to make a large correction at high speed, and when the zero point is relatively approached, it is minutely changed following the zero point, so that the zero point can be adjusted in a minimum time without causing hunting.

Therefore, the use of the automatic zero-point adjusting circuit of the present invention makes it possible to automatically correct the offset adjustment of a FID or the like having a wide dynamic range of a gas chromatograph at high speed and with high stability, which is extremely convenient.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing an automatic zero-point adjusting circuit showing an embodiment of the present invention, FIG. 2 is a circuit diagram showing a conventional automatic zero-point adjusting circuit, and FIG. 3 is a book shown in FIG. FIG. 4 is a waveform diagram for explaining the operation of the embodiment of the invention, and FIG. 4 is a waveform diagram for explaining the operation of the conventional automatic zero point adjustment. 12: amplifier, 13: the absolute value detection circuit, 14: positive and negative comparators, 15: voltage / frequency converter, 18: reversible counter, 19: D / A converter, R _3: resistor for feedback.

Claims (1)

[Claims] 1. A zero-adjusted amplifier, an absolute value detection circuit for deriving an absolute value of the output of the amplifier, a voltage / frequency conversion circuit for converting an output voltage of the absolute value detection circuit into a frequency signal, and the amplifier. A positive / negative discriminating circuit that discriminates whether the deviation of the output with respect to the reference level is a predetermined value or more and the deviation to the positive side or the negative side, and the voltage / frequency conversion according to the positive / negative judgment result. A reversible counter that down-counts or up-counts the frequency signal from the instrument,
An automatic D / A converter that converts the output of the reversible counter into an analog value and a feedback circuit that feeds back the output of the D / A converter to the input side of the amplifier so as to correct the zero point shift of the amplifier. Zero adjustment circuit.