JPH0654529A - Voltage resonance type switching regulator - Google Patents

Abstract

PURPOSE:To provide a voltage resonance type switching regulator which facilitates the increase of a load current increasing the size of a converter transformer. CONSTITUTION:A saturable reactor L2 is connected in series to an ON-ON winding N3 on the secondary side of a converter transformer T1 as a switching means. The required reset of the saturable reactor L2 is obtained by a current flowing through a resistor R1. With this constitution, during a required period while a resonance current is flowing from a capacitor C1 to a power supply Vin, a voltage application to a rectifying diode D1 is blocked by the saturable reactor L2 and the interference of the ON-ON winding current to the resonance current can be eliminated, so that a resonance waveform can be close to a sine wave, zero-cross conditions can be maintained and a load current can be increased.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a voltage resonance type switching regulator suitable for copying machines, printers and the like.

[0002]

2. Description of the Related Art Conventionally, a voltage resonance type switching regulator has been widely used as a device for generating a high voltage such as a charger of a copying machine or a horizontal deflection voltage of a CRT. Most of such devices as shown in FIG.
The application of electric power to the secondary winding is interrupted by switching means such as a transistor to generate a voltage according to the winding ratio on the secondary side.

[0003]

However, when the load current from the ON / ON winding (N3) on the secondary side in FIG. 8 is increased, the zero cross condition of the voltage is gradually not satisfied and the power cannot be taken. There is a problem.

The present invention has been made to solve this problem, without increasing the size of the converter transformer.
An object of the present invention is to provide a voltage resonance type switching regulator capable of increasing a load current.

[0005]

In order to achieve the above-mentioned object, the present invention provides a voltage resonance type regulator having the following (1),
Configure as in (2).

(1) A voltage resonance type switching regulator that takes a load current from an on-on winding on the secondary side of a converter transformer, and switch means connected in series to the on-on winding, and this switch means. And a control means for controlling so that the resonance voltage pulse is turned off for a required period at the beginning and / or a required period at the end of each resonant voltage pulse.

(2) The voltage resonance type switching regulator according to (1), wherein the switch means is a saturable reactor having a reset means.

[0008]

With the configurations (1) and (2) described above, the current in the on-on winding on the secondary side of the converter transformer is cut off only during the required period at the beginning and / or the end of each voltage resonance pulse, and the voltage The zero cross condition is satisfied.

[0009]

The present invention will be described in detail with reference to the following examples.

(Embodiment 1) FIG. 1 is a circuit diagram of a "voltage resonance type switching regulator" which is Embodiment 1.

In the figure, T1 is a converter transformer. One end of the primary winding N1 of the converter transformer T1 is connected to the power supply voltage Vin, and the other end is connected to the drain of an FET (field effect transistor) Q1 which is a switching element. The source of the FET Q1 is grounded. By switching the FET Q1, a voltage corresponding to the winding ratio is generated in the secondary windings N2 and N3. Two
One end of the next winding N3 is connected to the anode of the rectifier diode D1 through the saturable reactor L2, and the other end is connected to the COM potential point. The cathode of the rectifier diode D1 is connected to the cathode of the flywheel diode D2 and one end of the choke coil L1. The other end of the choke coil L1 is connected to one end of the output capacitor C2. The other ends of the flywheel diode D2 and the capacitor C2 are connected to the COM potential point. Anode of rectifier diode D1 and V
Between one output terminal, a diode D4 and a resistor R1 are connected in series so that the saturable reactor L2 can be reset. The winding N2 is the secondary side main winding and rectifies its output.
The PWM (pulse width modulation) control circuit 1 is used to change the switching duty of the FET Q1 in order to make the smoothed voltage a constant voltage.

The circuit operation will be described below. If saturable reactor L2 is shorted, diode D4, resistor R1
If the circuit of is open, the resonance voltage (between Q1 and D-S)
As shown in FIG. 2, as the load on the winding N3 side is increased, zero crossing does not occur and power cannot be transmitted.

The cause is that the forward side diode D1 of the on-on side output is provided during the period when the resonance voltage is equal to or lower than Vin.
Is turned on, and there are the following two periods.

Q1 is off and the resonance voltage VDS (Q1.D
-Between S) <Vin and the period when the resonance voltage flows from C1 to Vin (period A in FIG. 2) The resonance current I (RES) flows from the capacitor C1 to Vin. On the other hand, the on-on side current Ip (on / o
n) (converted value on the primary side) has a magnitude of Io * (Ns / Np) and tends to flow from Vin to the capacitor C1. Therefore, the resonance current (direction flowing from the capacitor C1 to Vin) is apparently small, the decrease in the voltage of the capacitor C1 is slowed down, and the zero crossing is difficult to occur.

Q1 is off and the resonance voltage VDS (Q1.D
-Between S) <Vin and period during which resonance current flows from Vin to capacitor C1 (period B in FIG. 2) Resonance current I (RES) and load current Ip (on / on of on-on side winding (N3)) ) Are strengthened in the direction in which they both flow into the capacitor C1, and the rising slope of the resonance voltage VDS becomes tight.

As described above, the resonance voltage VDS deviates from the sine wave as the load current is taken from the on-on side winding (N3), and finally the zero crossing does not occur.

As measures against this, the following methods (1) and (2) can be considered, and the present invention employs the method (2).

(1) The resonance current I (RES) is increased to relatively reduce Ip (on / on). Specifically, the resonance capacitor C1 is increased or the inductance of the converter transformer T1 is decreased. However, in this case, the resonance frequency is lowered, the exciting current of the converter transformer T1 is increased, the load of the FET Q1 and the like is increased, and the converter transformer T1 is easily magnetically saturated.
It is not the most suitable method because it leads to a larger transformer.

(2) The Ip (on / on) of the period A, the period B, or both of them is stopped.

That is, in this embodiment, the saturable reactor (switch means) L2, the diode D4 and the resistor R1 are used to prevent Ip (on / on) from flowing during the period A.

Next, the operation of this embodiment will be described with reference to the circuit diagram of FIG. 1 and the timing chart of FIG.

In FIG. 3, Vx is the N3 winding (ON-
On-winding) voltage, and an approximately isosceles trapezoidal voltage appears on the positive side. Therefore, when the saturable reactor L2 is appropriately reset by the resistor R1, the anode voltage Vy of the rectifying diode D1 has a waveform that blocks the Y region in FIG.
(N3) That is, the current flowing through the rectifier diode D1 becomes 0 as shown in the figure in the period A. Therefore, the on / on winding current Ip (on / on) and the resonance current I (RE
S) no longer interferes in period A. Thereby, F
The voltage waveform of ET · Q1 approaches a sine wave (strictly, it is necessary to block the period B as well), but the zero-cross condition can be secured even if a load current several times that of the conventional one is taken.

(Second Embodiment) FIG. 4 is a circuit diagram of the second embodiment. It can also be implemented by blocking the period A, the period B, or both using the switch Q2 as shown. FIG. 5 is this timing chart. As shown in the figure, the pulse width is controlled by the PWM control circuit 4 so as to prevent both the A and B periods and also serve as the regulator of the output V1. Note that the output from the PWM control circuit 1 is synchronized via the synchronization detection circuit 3 so that control can be performed at the required timing. In this case, the resonance voltage is a perfect sine wave.

(Third Embodiment) FIG. 6 is a circuit diagram of the third embodiment. As shown in the figure, by placing the saturable reactor L2 on the low voltage side, the reset current of the saturable reactor L2 due to the resistor R1 is prevented from flowing through the N3 winding, and the converter transformer T1 is prevented from being demagnetized and the resistor R1 It also reduces losses.

(Fourth Embodiment) FIG. 7 is a circuit diagram of the fourth embodiment. It is also possible to configure as shown and implement the switching means by an N-channel FET Q4. Currently, N-channel FETs have more product types than P-channel FETs.
Since it is excellent in terms of price, on-resistance, etc., using an N-channel FET has advantages in improving efficiency of power supply, downsizing, and cost reduction. In addition, P channel FE
At T, the loss of the gate drive circuit is large, but this can also be improved.

[0026]

As described above, according to the present invention, switch means (saturable reactor, semiconductor switch, etc.)
By using, the capacity of the voltage resonance type power supply can be increased without increasing the resonance current, the loss of the resonance switch and the converter transformer becomes relatively small, and the device can be downsized.

[Brief description of drawings]

FIG. 1 is a circuit diagram of a first embodiment.

FIG. 2 is an operation explanatory diagram of the first embodiment.

FIG. 3 is a timing chart of the first embodiment.

FIG. 4 is a circuit diagram of a second embodiment.

FIG. 5 is a timing chart of the second embodiment.

FIG. 6 is a circuit diagram of a third embodiment.

FIG. 7 is a circuit diagram of a fourth embodiment.

FIG. 8 is a circuit diagram of a conventional example.

[Explanation of symbols]

 L2 Saturable reactor N3 ON-ON winding R1 resistance T1 converter transformer

Claims (2)

[Claims] 1. A voltage resonance type switching regulator which takes a load current from an on-on winding on a secondary side of a converter transformer, and a switch means connected in series to the on-on winding, and the switch means. And a control means for controlling the resonance voltage pulse to be turned off only during a required period at the beginning and / or a required period at the end of each resonant voltage pulse. 2. The voltage resonance type switching regulator according to claim 1, wherein the switch means is a saturable reactor having a reset means.