JPH0654341A - Video signal processing circuit - Google Patents

Abstract

PURPOSE:To accurately recognize white balance by the electronic view finder of a camera incorporated type VTR, for instance, without being accompanied by the increase of equipments. CONSTITUTION:By a vector coordinate transformation circuit 17, a vector coordinate signal SBR for being at a high level 'H' at a position corresponding to the synthetic vector value of color difference signals B-Y and R-Y and being at a low level 'L' at other positions is obtained and the vector coordinate signal SBR is supplied through a vector display switch 18 to an adding circuit 16. Since the vector coordinate signal SBR is inverted and added to a video signal SV' by turning the switch 18 ON, a part indicating the synthetic vector value of the color difference signals B-Y and R-Y along with pictures by the video signal SV' are displayed with high brightness on the screen of a cathode- ray tube 11. Similarly to a vector scope, the color difference signals B-Y and R-Y are vector-displayed on the screen of the cathode-ray tube 11.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION This invention is, for example, an ENG (Elec
tronic News Gathering) Camera integrated VT
It is applied to R and relates to a video signal processing circuit.

[0002]

2. Description of the Related Art In FIG. 8, reference numeral 1 denotes an ENG camera, which is composed of a camera head section and a VTR section. In outdoor imaging, the white balance (W / B) set switch 1b can be operated to achieve white balance, but the optimum white balance is not always achieved. This is because, for example, it is difficult to faithfully reproduce the color temperatures of a plurality of light sources with white balance by illuminating a plurality of light sources.

Therefore, for example, by capturing an image of a color bar, a color video signal SC output from the ENG camera 1
V is supplied to the vector scope 2, each color component is vector-displayed in biaxial coordinates, color reproducibility is recognized, and white balance is adjusted. In addition, the color video signal SCV output from the ENG camera 1 is supplied to the color sub-monitor 3 or the color electronic viewfinder (color EVF) 1a to recognize the white balance of the displayed color image and adjust the white balance. Is being carried out.

[0004]

According to the one using the vectorscope 2 for the white balance adjustment, the adjustment can be made with high accuracy, but there is a problem that the number of equipment is increased. Further, according to the one using the color sub-monitor 3, there is a problem that the number of equipment is increased and the variation due to the visual adjustment occurs. Furthermore, color EVF1
According to the method using a, there is a problem that variation occurs due to the adjustment of the visual sense.

Therefore, the present invention provides a video signal processing circuit for allowing an electronic viewfinder to accurately recognize a white balance without increasing the number of equipment.

[0006]

According to the present invention, there is provided a conversion circuit for converting a color difference signal forming a color video signal into a vector coordinate signal, and an addition circuit for adding the vector coordinate signal output from the conversion circuit to a video signal. It is equipped with and.

[0007]

For example, when the present invention is applied to an electronic viewfinder of a camera-integrated VTR, the color difference signals of the respective color components are vector-displayed on the electronic viewfinder when the color bar is imaged, as in the case where a vector scope is used.
Therefore, the user can accurately recognize the white balance of the output video signal by displaying the electronic viewfinder.

[0008]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

First, the vector display of the color bar will be described. FIG. 9A shows a color bar screen, and when this pattern is shown by the blue color difference signal BY and the red color difference signal RY, it becomes as shown in FIG. The numerical value is a value when the white level of the luminance signal Y is 1.00.

In the vector scope, the color difference signals B-Y and R-Y of each color component are combined in two-axis coordinates of the B-Y axis and the R-Y axis and displayed as a vector, so that the vector display of the color bar is the same. As shown in FIG.

Next, the basic structure of the cathode ray tube will be described with reference to FIG. In the figure, a monochrome video signal S
V (shown in FIG. 11C) is a sync separation and video amplifier circuit 7.
Is supplied to. Horizontal sync signal H separated by this circuit 7
P (shown in FIG. 11A) is supplied to the horizontal deflection circuit 4, and the horizontal deflection current IH (shown in FIG. 11B) output from this horizontal deflection circuit 4 is supplied to the horizontal deflection coil 12 of the cathode ray tube 11.

The vertical synchronizing signal V separated by the circuit 7
P (shown in FIG. 11E) is supplied to the vertical deflection circuit 5, and the vertical deflection current IV (shown in FIG. 11F) output from this vertical deflection circuit 5 is supplied to the vertical deflection coil 13 of the cathode ray tube 11.

The circuit 7 outputs a video signal SV '(shown in FIG. 11D) in which the sync signal is removed and the polarity is inverted. The video signal SV' is output from the cathode ray tube 1.
1 to the grid 10. A predetermined bias voltage is applied to the cathode 9 of the cathode ray tube 11 from the cathode vice circuit 6, and a high voltage is applied to the anode terminal 14 of the cathode ray tube 11 from the high voltage circuit 8.

By passing the above-mentioned horizontal deflection current IH through the horizontal deflection coil 12, the electron beam is deflected in the left-right direction, while by passing the vertical deflection current IV through the vertical deflection coil 13, the electron beam is deflected in the vertical direction. Figure 1
Scan as shown in FIG. Further, by supplying the video signal SV ′ to the grid 10 of the cathode ray tube 11, the electron beam is density-modulated by the video signal SV ′. As a result, the image of the video signal SV 'is displayed on the screen of the cathode ray tube 11.

FIG. 1 shows the configuration of the embodiment. Figure 1
In FIG. 10, parts corresponding to those in FIG.
Detailed description thereof will be omitted.

In FIG. 1, a cathode ray tube 11 is a black and white cathode ray tube which constitutes an electronic viewfinder of a camera-integrated VTR such as an ENG camera. Coordinate axes (see FIG. 7) similar to those of the vector scope are previously displayed on the tube surface of the cathode ray tube 11.

The video signal SV 'output from the sync separation / video amplifier circuit 7 is supplied to the adder circuit 16. The output signal of the adding circuit 16 is the cathode ray tube 1.
1 to the grid 10.

Further, the red color difference signal RY and the blue color difference signal BY outputted from the camera section are respectively supplied to the vector coordinate conversion circuit 17, and the vector coordinate signal SBR outputted from this conversion circuit 17 is displayed as a vector. Switch 18
The polarity is inverted and supplied to the adder circuit 16 via. Although not shown, the vector display switch 18 is provided on the outer surface of the camera-integrated VTR main body, for example.

FIG. 2 shows the configuration of the vector coordinate conversion circuit 17. In the figure, the signal BY is converted into a 1-sample 8-bit digital signal by the A / D converter 21 and supplied to the H-side fixed terminal of the changeover switch 22.
Here, the positive side of the signal BY is set to correspond to the quantized values of "128" to "255", and the negative side thereof is set to correspond to the quantized values of "127" to "0" (FIG. 3). reference). Signal BY
The digital signal of is in the X direction (column direction) as described later.
Is used as a write address signal of.

On the other hand, the red color difference signal RY is sent to the A / D converter 2
At 3, the signal is converted into an 8-bit digital signal for one sample and supplied to the fixed terminal on the L side of the changeover switch 22. Here, the positive side of the signal RY is set to correspond to the quantized values of "127" to "0", and the negative side thereof is set to correspond to the quantized values of "128" to "255" (FIG. 3). reference). The digital signal of the signal RY is used as a write address signal in the Y direction (row direction) as described later.

The write address signal WAD output from the changeover switch 22 is supplied to the fixed terminal on the H side of the changeover switch 24. The read address signal RAD in the X and Y directions is supplied from the memory controller 25 to the fixed terminal on the L side of the changeover switch 24. The controller 25 includes a horizontal synchronizing signal HP and a vertical synchronizing signal VP.
Is supplied as a synchronization reference signal from the circuit 7 (see FIG. 1).

The address signal AD output from the changeover switch 24 is supplied to the memory 26. The memory 26 receives an X address strobe signal (XAS
Bar), Y address strobe signal (YAS bar), read / write control signal (RW bar), and refresh control signal RC. In addition, the memory 26 always receives a high level “H” signal as input data Din.
The memory 26 outputs the output data Dout as the vector coordinate signal SBR.

FIG. 4 shows a specific structure of the memory 26. In the figure, reference numeral 261 denotes 256 × 256 × 1 having addresses 0 to 255 in the X direction and 0 to 255 in the Y direction.
For example, it is a DRAM memory cell having a bit storage capacity. 262 is an address signal AD [A0-A
7] is supplied to the address buffer, and the address signals in the X direction and the Y direction output from the address buffer 262 are supplied to the X decoder (column decoder) 2 respectively.
63 and a Y decoder (row decoder) 264. The address buffer 262 has the X address strobe signal (XAS bar), the Y address strobe signal (YAS bar), and the refresh control signal R described above.
C is supplied.

A data buffer 265 supplies the input data Din as write data to the memory cell 261 via the data buffer 265, and the read data from the memory cell 261 via the data buffer 265. It is derived as output data Dout. In the data buffer 265, the read
A light control signal (RW bar) is supplied.

As described above, the structure of the memory 26 is the same as the structure known in the related art, and therefore the other details are omitted.

The writing of the input data Din to the memory 26 and the reading of the output data Dout from the memory 26 are alternately performed in a predetermined cycle under the control of the memory controller 25.

FIG. 5 is a timing chart showing the read / write operation of the memory 26. A in the figure shows a Y address strobe signal (YAS bar), and B in the figure shows an address signal A.
D and C in the figure are X address strobe signals (XAS bar), and D in the figure are read / write control signals (RW).
(E) shows input data Din, and FIG. F shows output data Dout.

Returning to FIG. 2, the changeover switches 22 and 24 are supplied with changeover control signals SW1 and SW2 from the memory controller 25 (shown in FIGS. 5G and H). The change-over switches 22 and 24 have change-over control signals SW1 and SW1, respectively.
When SW2 is at the high level "H", it is connected to the H side, while when it is at the low level "L", it is connected to the L side.

During the write address period, the switching control signal S
W2 is set to the high level "H", the write address signal WAD is supplied to the memory 26, and the switching control signal S
W1 is changed from the low level "L" to the high level "H", and the write address signals in the Y direction and the X direction are sequentially supplied to the memory 26.

As a result, the memory cell 26 of the memory 26 is
In 1, the input data Din is written at the address designated by the write address signal WAD. As described above, since the address signals in the X direction and the Y direction that form the write address signal WAD are digital conversions of the color difference signals BY and RY, respectively, the memory cell 261
The input data Din is written into the address corresponding to the combined vector value of the color difference signals BY and RY.

Next, during the read address period, the switching control signal SW2 is set to the low level "L" and the read address signal RAD is supplied to the memory 26. Although not described above, the read address signal RAD is made to correspond to the scanning position of the electron beam of the cathode ray tube 11. By this. Memory 2
The memory contents of the memory cells 261 of No. 6 are sequentially read out in correspondence with the scanning position of the electron beam of the cathode ray tube 11. As will be described later, the line refresh operation causes the memory cell 261 to be in a state in which the low level “L” is written in addition to the address corresponding to the combined vector value of the color difference signals BY and RY. Therefore, the output data Dout output from the memory 26 is the color difference signals BY and RY.
The high level becomes "H" at the position corresponding to the combined vector value of, and the low level becomes "L" at other positions.

FIG. 6 is a timing chart showing the line refresh operation of the memory 26. A in the figure is a horizontal blanking signal HBLK, B in the figure is an address signal AD,
C in the figure is an X address strobe signal (XAS bar), D in the figure is a read / write control signal (RW bar),
In the figure E, the input data Din, and in the figure F the output data Dout,
FIG. 7G shows the refresh control signal RC.

In the horizontal blanking period, the refresh control signal RC becomes high level "H", the line refresh operation is performed in this horizontal blanking period, and the address of the memory cell 261 read in the Y direction in the Y direction. All X-direction addresses 0 to
A low level “L” is written in 255.

Returning to FIG. 1, as described above, from the vector coordinate conversion circuit 17, it becomes a high level "H" at a position corresponding to the combined vector value of the color difference signals BY and RY, and at other positions. The vector coordinate signal SBR that becomes the low level "H" is output. Therefore, by turning on the vector display switch 18, the polarity of the vector coordinate signal SBR is inverted and supplied to the adding circuit 16 to be added to the video signal SV '. Therefore, the cathode ray tube 11
On the screen, the position showing the combined vector value of the color difference signals BY and RY is displayed with high brightness in an overlapping manner with the image by the video signal SV '.

Therefore, when the vector display switch 18 is turned on, the color difference signals B-Y and R-Y are vector-displayed on the screen of the cathode ray tube 11 in two-axis coordinates, as in the vector scope. For example, when a color bar (see FIG. 9A) is imaged in a full field, the position indicated by “●” in FIG. 7 is displayed with high brightness when the white balance is optimum, and when the position is shifted in the R direction, In the figure, the position indicated by "x" is displayed with high brightness.

Therefore, according to this example, by turning on the vector display switch 18, the user can accurately recognize the white balance of the output video signal by the display of the electronic viewfinder, and the white balance can be adjusted accurately. it can. Further, according to this example, since the vector scope or the like is not used, the inconvenience such as the increase of the equipment is eliminated.

When adjusting the white balance, it is also possible to take an image of a single color, for example, a white chart, without taking an image of the color bar as described above, and make an adjustment so as to correct the positional deviation. is there.

Further, in the above-mentioned embodiment, the vector coordinate signal SBR is added to the video signal SV 'by the vector display switch 18, and the image by the video signal SV' is added together with the composite vector of the color difference signals BY and RY. Although the value is displayed, it is also possible to display only the combined vector value by switching the signal.

Further, in the above embodiment, the cathode ray tube 1
Although the coordinate axes similar to those of the vector scope are previously displayed on the first tube surface, the coordinate axes may be displayed by the video signal SV 'from the circuit 7.

Further, although the above-mentioned embodiment applies the present invention to the electronic viewfinder of the VTR with a built-in camera, it can also be applied to other devices. For example, when applied to a video editing machine, it is possible to accurately adjust color balance and the like without increasing the number of equipment.

Further, in the above embodiment, the vector coordinate signal SBR is added to the black-and-white video signal SV 'to display the vector position with high brightness, but it is possible to display the cathode ray tube in color. For example, the vector position can be displayed in a predetermined color. In that case, the vector coordinate signal SBR is converted into a predetermined color signal to drive the cathode ray tube.

[0042]

According to the present invention, it is possible to convert a color difference signal forming a color video signal into a vector coordinate signal and add the vector coordinate signal to the video signal. Therefore, for example, in an electronic viewfinder of a camera-integrated VTR. Since the color difference signals can be displayed in vector as in the case of using the vector scope, white balance adjustment can be performed accurately without increasing the number of equipment such as the vector scope. Further, for example, when it is used for an editing machine, color balance adjustment can be accurately performed without increasing the number of equipment.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of an embodiment.

FIG. 2 is a block diagram showing a configuration of a vector coordinate conversion circuit.

FIG. 3 is a diagram for explaining formation of write address signals in an X direction and a Y direction.

FIG. 4 is a block diagram showing a configuration of a memory.

FIG. 5 is a timing chart showing a read / write operation of the memory.

FIG. 6 is a timing chart showing a line refresh operation of the memory.

FIG. 7 is a diagram showing an example of a vector display on a screen of a cathode ray tube.

FIG. 8 is a diagram for explaining confirmation of conventional white balance.

FIG. 9 is a diagram for explaining color vector display.

FIG. 10 is a block diagram showing a basic configuration of a cathode ray tube.

11 is a diagram showing a signal waveform of each part in the example of FIG.

FIG. 12 is a diagram for explaining the scanning principle of the cathode ray tube.

[Explanation of symbols]

 1 ENG Camera 4 Horizontal Deflection Circuit 5 Vertical Deflection Circuit 6 Cathode Bias Circuit 7 Synchronous Separation and Video Amplification Circuit 8 High Voltage Circuit 11 Cathode Ray Tube 17 Vector Coordinate Conversion Circuit 18 Vector Display Switch 21, 23 A / D Converter 22, 24 Changeover Switch 25 memory controller 26 memory

Claims (1)

[Claims] 1. A video signal processing comprising: a conversion circuit for converting a color difference signal forming a color video signal into a vector coordinate signal; and an addition circuit for adding the vector coordinate signal output from the conversion circuit to the video signal. circuit.