JPH0653758A - Semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To obtain the semiconductor integrated circuit provided with a buffer able to stably drive a device with a large capacity such as a personal computer or the like. CONSTITUTION:A constant current source M2 is provided to a drain of an input MOSFETM1 whose source receives an input voltage. A drain output of the input MOSFETM1 is fed to a gate of a source follower output MOSFETM3, an output voltage is obtained from the source and a constant current source M4 is provided to the source of the output MOSFETM3. Thus, the level shift quantity is set to zero based on a ratio of the size between the input MOSFETM1 and the output MOSFETM3 and a device with a large capacity such as a personal computer or the like is stably driven.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor integrated circuit, for example, a large capacity drive circuit, an impedance conversion circuit,
The present invention relates to a technique effectively used for an AC grounded output buffer in an analog / digital mixed semiconductor integrated circuit such as a level conversion circuit.

[0002]

2. Description of the Related Art Conventional AC grounding used in an analog / digital mixed type semiconductor integrated circuit or the like is supplied to the inside and outside of the integrated circuit from a voltage source through a buffer of an operational amplifier when it is generated inside the integrated circuit.

[0003]

In order to prevent crosstalk between circuit blocks when the AC ground level is generated inside the integrated circuit, a buffer amplifier is used for each block. Therefore, since the number of buffer amplifiers used increases, the power consumption of the integrated circuit and the chip area increase.
Therefore, the inventor of the present application has studied means for preventing crosstalk between blocks by adding a bypass capacitor outside the integrated circuit without using a buffer amplifier for each circuit block. This method requires only one buffer, but if a normal operational amplifier is used, it may oscillate due to the capacitance value of the decap.

An object of the present invention is to provide a semiconductor integrated circuit having a buffer capable of stably driving a large capacity such as a decap. The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

[0005]

The outline of a typical one of the inventions disclosed in the present application will be briefly described as follows. That is, a constant current source is provided in the drain of the input MOSFET whose source is supplied with the input voltage, the drain output of the input MOSFET is supplied to the gate of the source follower output MOSFET, the output voltage is obtained from the source, and the output MOSFET is A constant current source is provided for the source.

[0006]

According to the above-mentioned means, the level shift amount can be set to zero by the size ratio of the input MOSFET and the output MOSFET, and a large capacity such as a bypass capacitor can be driven stably.

[0007]

1 is a circuit diagram of an embodiment of an output buffer circuit according to the present invention. Each circuit element in the figure is formed on one semiconductor substrate such as single crystal silicon by a known semiconductor integrated circuit manufacturing technique.

The input voltage Vin is a P channel type input MO.
It is supplied to the source of SFET M1. This input MOSF
The ETM1 has a diode configuration in which a gate and a drain are commonly connected. The drain of the input MOSFET M1 has an N-channel MOSFET M2 as a constant current source.
Is provided.

The drain output of the input MOSFET M1 is supplied to the gate of the P-channel type output MOSFET M3. A constant current source Io is provided between the source of the output MOSFET M3 and the power supply voltage VDD and operates as a source follower circuit. Output MOSFET M above
The source of 3 is connected to the output terminal Vout.

In this embodiment, although not particularly limited, the drain of the output MOSFET M3 is provided with a diode type N-channel MOSFET M4. This M
The OSFET M4 and the MOSFET M2 as a constant current source and a current mirror form are formed. This current mirror circuit converts the current flowing through the output MOSFET M3 into the input MOSFET M1.
Since it forms the operating current of, it forms a kind of current feedback loop.

The input MOSFETs M1 and M3 are formed in independent well regions, and the well regions are formed in the input MOSFET M1 and the output MOSF.
The sources of ETM3 are respectively connected.

Input MOSFET M1 and output MOSFET
Since the gate is commonly connected to M3, and each of the MOSFETs M1 is an input and the source of the MOSFET M3 is an output, a stable level shift amount can be obtained without being influenced by the threshold voltage of the MOSFET.

Input MOSFET M1 and output MOSFET
Since the well region and the source of M3 have the same potential, the level shift amount can be stabilized regardless of the output voltage without receiving the substrate bias effect. M
Since the current feedback loop formed by the OSFETs M2 and M4 is provided, it is possible to prevent the level shift amount from fluctuating due to an increase or decrease in the output current.

That is, it can be realized by a source follower circuit as a buffer for driving a large capacity. However, if a normal source follower is used, (1) the input voltage is level-shifted. (2) There is a problem that the output voltage depends on the threshold voltage of the transistor and the output current. On the contrary,
As in the above embodiment, a diode-connected input MOS
A circuit composed of the FET M1 and the current source MOSFET M2 is provided as an input circuit, the source of the input MOSFET M1 is used as an input, and the drain output thereof is the source follower output MO.
It is supplied to the gate of SFET M3.

FIG. 2 is a block diagram of an embodiment of an AC ground generating circuit to which the present invention is applied. This circuit is composed of a voltage generation source VG, a gain adjustment circuit VGA, and an output buffer circuit OB according to the present invention. The gain adjusting circuit VGA is mainly composed of an operational amplifier and a non-inverting amplifier circuit using a resistor. The voltage generator VG generates a stable voltage, and the gain adjusting circuit VGA adjusts it to a desired AC ground voltage. The AC ground level is supplied to the inside and outside of the integrated circuit through the output buffer circuit OB.

At this time, the decapacitor C1 is provided outside the integrated circuit.
Connect C2. By configuring the AC ground generation circuit as described above, crosstalk between adjacent blocks and noise can be reduced by the bypass capacitor without providing a buffer amplifier for each circuit block, and low power consumption and AC grounding in a small chip area Can be supplied.

FIG. 3 shows a block diagram of another embodiment of an AC ground generating circuit to which the present invention is applied.
This circuit is a level shift circuit, and the buffer amplifier B
A, a level shift circuit LS according to the present invention. The buffer amplifier BA is a level shift circuit L according to the present invention.
Since the input impedance of S is relatively low, it is provided for the purpose of impedance conversion, but the buffer amplifier BA may be omitted if the input voltage does not cause this problem. The level shift circuit LS according to the present invention can obtain an arbitrary level shift amount and can obtain stable operation.

The effects obtained from the above embodiment are as follows. That is, (1) The input MOSFET whose input voltage is supplied to the source
A constant current source is provided at the drain of T, and the input MOSFET is
The drain output of is supplied to the gate of the source follower output MOSFET, the output voltage is obtained from the source, and the source of the output MOSFET is provided with a constant current source, so that the level shift amount is adjusted by the size ratio of the input MOSFET and the output MOSFET. Can be set to zero and a large capacity such as a bypass capacitor can be stably driven.

(2) Input MOSFET and output MO
By forming the SFET in the well region and connecting the source and the well region to the same potential, it is possible to obtain a stable output voltage without receiving the substrate bias effect.

(3) By providing a current mirror circuit composed of an input MOSFET and a MOSFET of a conductivity type opposite to that of the output MOSFET at the drain of the output MOSFET, when the output current changes, the input MOSFET M
The current of 1 also changes in the same manner, feedback is applied so that the output voltage becomes constant, and a stable output voltage can be obtained without being affected by the output current.

Although the invention made by the present inventor has been specifically described based on the embodiments, the invention of the present application is not limited to the embodiments and various modifications can be made without departing from the scope of the invention. Needless to say. For example, in FIG.
In, the P-channel type MOSFET and the N-channel type MOSFET may be configured in reverse. MOSFET
May be replaced with a bipolar transistor.

[0022]

The effects obtained by the typical ones of the inventions disclosed in the present application will be briefly described as follows. That is, a constant current source is provided in the drain of the input MOSFET whose source is supplied with the input voltage, the drain output of the input MOSFET is supplied to the gate of the source follower output MOSFET, the output voltage is obtained from the source, and the output MOSFET is By providing a constant current source at the source of, the level shift amount can be set to zero by the size ratio of the input MOSFET and the output MOSFET, and a large capacity such as a decap can be stably driven.

[Brief description of drawings]

FIG. 1 is a circuit diagram of an embodiment showing an output buffer circuit according to the present invention.

FIG. 2 is a block diagram showing an embodiment of an AC ground generation circuit to which the present invention is applied.

FIG. 3 is a block diagram showing another embodiment of an AC ground generation circuit to which the present invention is applied.

[Explanation of symbols]

M1 to M4 ... MOSFET, Io ... Constant current source, VG ... Voltage generating circuit, VGA ... Gain adjusting circuit, OB ... Output buffer, BA ... Buffer amplifier, LS ... Level shift circuit.

Claims (3)

[Claims] 1. An input transistor whose source is supplied with an input voltage, a constant current source provided in the drain of the input transistor, and an output transistor which receives the drain output of the input transistor to obtain an output voltage from the source. A semiconductor integrated circuit, comprising: a constant current source provided at the source of the output transistor. 2. The semiconductor integrated circuit according to claim 1, wherein the transistor is a MOSFET, the input MOSFET and the output MOSFET are formed in a well region, and the source and the well region are connected to each other. 3. A current mirror circuit comprising an input MOSFET and a MOSFET of a conductivity type opposite to that of the input MOSFET is provided at the drain of the output MOSFET, and the output side MOSFET of the current mirror circuit is the input MOSF.
3. The semiconductor integrated circuit according to claim 2, which is used as a constant current source provided in the drain of ET.