JPH065226U - Analog / digital converter - Google Patents

Abstract

(57) [Abstract] [Purpose] A / D converter with simple configuration and easy operation.
Provide data. [Structure] The input terminal of an operational amplifier 6 is connected to a power supply 1 via an input resistor 2 and to a switch 3 and a switch 4 via an input resistor 5, respectively. Switch 3 is C
Input resistor 5 and reference voltage V _A according to an instruction signal from PU 10.
The switch 4 connects the input resistor 5 and the reference voltage V _B by an inversion instruction signal obtained by inverting the instruction signal of the CPU 10 by the inverter 9. The output terminal of the operational amplifier 6 is connected to the input terminal of the comparator 8,
Is connected to the signal input terminal of the CPU 10.
The data bus 15 of the CPU 10 is connected to the data output terminals of the registers 13 and 14, and the data input terminals of the registers 13 and 14 are connected to the data output terminal of the counter 12, respectively.

Description

[Detailed description of the device]

[0001]

[Industrial applications]

 The present invention relates to an analog / digital converter (hereinafter referred to as an A / D converter).

[0002]

[Prior art]

FIG. 7 is a circuit diagram showing a conventional example of an A / D converter. The non-inverting input terminal of the operational amplifier 114 is connected to a power source (not shown) of -4V. Inverting input of the operational amplifier 114, the input resistor 113 and via a switch 112 voltage _{V in (-4V <V in <} + 4V) Power 111 as an analog signal source for outputting an input resistor 120 and a switch The reference voltage source (not shown) that outputs the reference voltage V _{ref of} −8 V via 119 is connected to the ground via the input resistor 122 and the switch 121, respectively. The input resistor 113, the operational amplifier 114, and the feedback capacitor 115 constitute an integrator. The output terminal of the operational amplifier 114 is connected to the inverting input terminal of the operational amplifier 114 via the feedback capacitor 115 and the non-inverting input terminal of the comparator 116. The inverting input terminal of the comparator 116 is grounded. The output terminal of the comparator 116 is connected to the inverting input terminal of the operational amplifier 114 via the feedback resistor 118 and the switch 117, and is also connected to the signal input terminal of the CPU 123. The data bus 126 of the CPU 123 is connected to the data output terminal of the counter 125 that counts the clock signal of the oscillator 124. The switches 112, 117, 119 and 121 are independently controlled by the CPU 123.

The operation of this conventional example will be described. In the initial state, the switch 117 is on and the switches 112, 119 and 121 are off. From this state, the CPU 123 turns off the switch 117 and turns on the switch 112, and the operational amplifier 114 integrates the voltage V _in of the power supply 111. After a fixed time, if the output value of the operational amplifier 114 is positive, the CPU 123 stops the entire operation. If the output value of the operational amplifier 114 is negative, the CPU 123 turns on the switch 119, applies the reference voltage V _{ref of} −8V until the output value of the operational amplifier 114 is inverted to positive, and turns on the switch 119. Measure the time taken. At the same time as this reversal, the CPU 123 turns off the switch 119, turns on the switch 119 again after the fixed time, and measures the time until the output value of the operational amplifier 114 is reversed. The polarity of the output value of the operational amplifier 114 is determined by the output of the comparator 116 connected to the output terminal of the operational amplifier 114. The CPU 123 repeats the control for turning on / off the switch 119 over a predetermined input integration time, and turns off the switch 112 when the input integration time ends. Further, the switch 119 is turned on until the polarity of the output of the operational amplifier 114 is inverted to a positive value, and the integration operation by the on / off control ends. The CPU 123 sets the total time during which the switch 119 is on as time T ₂ . The output of the operational amplifier 114 goes a little too positive due to the time lag of the CPU 123 and the counter 125. The CPU 123 turns on the switch 121 for the time T ₃ until the polarity of the operational amplifier 114 is inverted in order to correct the excessive current with a current of a constant rate (for example, 1/100) of the current flowing in the operational amplifier 114. Then, the current of the constant magnification is integrated.

A / D converted data S by this A / D converter is obtained by the following equation using the times T ₂ and T ₃ .

S = {T ₂ − (1/100) · T ₃ } · K where K is a coefficient determined by the circuit. After the integration operation is completed, the switch 117 is turned on and the other switches 112, 119 and 121 are turned off until the next integration of the input voltage V _in or the reference voltage V _ref is started, and the initial state is maintained.

[0006]

[Problems to be solved by the device]

 The above-described conventional A / D converter requires at least four independently controlled switches, which complicates the configuration. It is necessary to calibrate the ratio of each input resistor (for example, 1/1/100) and to correct the A / D conversion result for each integration time, which complicates the operation.

An object of the present invention is to provide an A / D converter that has a simple structure and is easy to operate.

[0008]

[Means for Solving the Problems]

 An A / D converter according to the present invention includes a first reference voltage source that outputs a constant voltage, a second reference voltage source that outputs a constant voltage having a polarity different from that of the first reference voltage source, first and second reference voltage sources. The second switch, the analog signal input terminal to which the analog signal source is connected, the first reference voltage input terminal to which the first reference voltage source is connected via the first switch, and the second switch. After turning on the integrator having the second reference voltage input terminal to which the second reference voltage source is connected via the first switch and the first switch for a certain period of time, the output of the integrator becomes a predetermined voltage. Up to the control unit for turning on the second switch, and a measurement unit for measuring the on time of the first and second switches and digitally outputting the measurement result. After turning on the switch for a certain period of time, wait until the output of the integrator reaches the specified voltage. Also of performing repeated on / off control to turn on the second switch, the measurement unit is for measuring the period of the on / off control.

[0009]

[Action]

 The first switch is turned on for a certain period of time to integrate the output of the first reference voltage source with the output of the analog signal source, and then the second switch is turned on until the output of the operational amplifier reaches a predetermined voltage. The output of the reference voltage source of 2 is integrated with the output of the analog signal source. When one cycle of the above operation is regarded as one cycle, the time required for this cycle (hereinafter referred to as cycle time) has a value corresponding to the output of the analog signal source. Therefore, if this cycle time is measured digitally, the A / D Can be converted. At this time, since the analog signal source and the operational amplifier are not separated, there is no switch, and since it is not necessary to provide each input resistor independently, it is not necessary to calibrate the ratio.

[0010]

Embodiment Next, an embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a circuit diagram showing a measuring device as a first embodiment of the present invention, FIG. 2 is a timing chart showing the operation of this embodiment, and FIG. 3 is a relationship between time and voltage at the time of zero calibration of this embodiment. FIG. 4 is an explanatory diagram showing the relationship between time and voltage during full-scale calibration of this embodiment, and FIG. 5 is an explanatory diagram showing the relationship between time and voltage during measurement of this embodiment.

The non-inverting input terminal of the operational amplifier 6 is grounded, and the inverting input terminal of the operational amplifier 6 outputs the input voltage V _in (−4V <V _in <+ 4V) via the input resistor 2. A power source 1 as an analog signal source (measurement target) is connected to a switch 3 and a switch 4 via an input resistor 5, respectively. The switch 3 connects the input resistor 5 to a first reference voltage source (not shown) that outputs a reference voltage V _A of + 4V in response to an instruction signal from the CPU 10, and the switch 4 inverts the instruction signal from the CPU 10 by an inverter 9. The input resistor 5 is connected to a second reference voltage source (not shown) that outputs the reference voltage V _{B of} -4V according to the instruction signal. The output terminal of the operational amplifier 6 is connected to the inverting input terminal of the operational amplifier 6 via the feedback capacitor 7 and also to the non-inverting input terminal of the comparator 8 composed of an operational amplifier. The inverting input terminal of 8 is grounded. The output terminal of the comparator 8 is connected to the signal input terminal of the CPU 10, and the data bus 15 of the CPU 10 is connected to the respective data output terminals of the registers 13 and 14. The data input terminals of the registers 13 and 14 are connected to the data output terminals of the counter 12 that counts the clock signal of the oscillator 11, respectively.

Next, the operation of this embodiment will be described. First, the CPU 10 turns on the switch 3 and integrates the voltage obtained by adding the input voltage V _in and the reference voltage V _A (voltage at the point Y) by the operational amplifier 6 for a certain time T _S. After that, the switch 3 is turned off, the switch 4 is turned on at the same time, and the voltage obtained by adding the input voltage V _in and the reference voltage V _B (voltage at the Y point) is zero at the output voltage (voltage at the X point) of the operational amplifier 6. Operation is performed until it becomes the value. This one operation is referred to as one cycle operation (time T _X ). This cycle operation is repeated for the set time, and after the set time has elapsed, the integration operation is finished when the voltage at the point A first becomes zero. The counter 12 counts the start time t ₁ and the end time t ₂ of the integration and stores the respective values in the registers 13 and 14, respectively. The CPU 10 also determines the output of the comparator 8 and counts the number of cycles during the integration time (t ₂ −t ₁ ). The CPU 10 digitally outputs the display value or the calculation data using the calibration data at the time of zero full scale input set at the time of calibration as a reference value.

In this embodiment, the resolution can be increased by increasing the number of cycles. Also, the resolution can be increased by increasing the integration time. In this embodiment, the reference voltages V _A and V _B are input to the inverting input terminal of the operational amplifier 6, but they are input to the non-inverting input terminal of the operational amplifier 6 as shown in FIG. Good.

Next, a calibration and measurement method in this embodiment will be described. 1. Zero calibration input voltage V_inTo zero. Turn switch 3 on (switch 4 off) for time T_S Only integrate. Next, the switch 4 is turned on (the switch 3 is turned off) to integrate until the output voltage of the operational amplifier 6 becomes zero, and the one cycle operation is completed. 1 cycle operating time T_O Is the integration time (t₂ -T₁ ) And the number of cycle operations. From the relationship between time and voltage (charge amount) shown in FIG. 3, the reference voltage V_A And reference voltage V _B The ratio k is calculated as shown in the following equation.

V _A · T _S = V _B · (T _O −T _S ) _VA / V _B = (T _O −T _S ) / T _S ≡k V _A = k · V _B 2. Full-scale calibration The input voltage V _{in is set} to full-scale (V _S ). Integrate like zero calibration. The 1-cycle operation time T _FS is obtained by the integration time (t ₂ −t ₁ ) and the number of cycle operations. From the relationship between the time and the voltage (charge amount) shown in FIG. 4, the reference voltage V _B is obtained as shown in the following equation.

V _S · T _FS + V _A · T _S = V _B · (T _FS −T _S ) V _S = {V _B · (T _FS −T _S ) −V _A · T _S } / T _FS = { V _B · (T _FS −T _S ) −k · V _B · T _S } / T _FS = V _B · {T _FS −T _S · (1 + k)} / T _FS V _B = {T _FS −T _S · (1 + k)} / (T _FS · V _S ) 3. Measurement Performs integration operation as in full-scale calibration. The one-cycle operation time T _X is obtained by the integration time (t ₂ −t ₁ ) and the number of cycle operations. From the relationship between the time and the voltage (charge amount) shown in FIG. 5, the input voltage Vin is obtained as shown _{in the} following equation.

V _in · T _X + V _A · T _S = V _B (T _X −T _S ) V _in = {V _B · (T _X −T _S ) −V _A · T _S } / T _X = V _B − (V _B + V _A ) · (T _S / T _X ) = V _B · {1- (1 + k) · (T _S / T _X )}

[0018]

[Effect of device]

 As described above, according to the present invention, by integrating each output of the first reference voltage source and the second reference voltage source together with the output of the analog signal source and measuring the cycle operation time, the following effects can be obtained. is there. 1. There are few switches and the configuration is simple. 2. There is no need to calibrate the ratio of each input resistor. 3. The A / D conversion value can be obtained without correcting each integration time, and the operation becomes easy. 4. By repeating the cycle operation, it is possible to reduce the influence of noise or the like, so that more accurate A / D conversion can be performed.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing a first embodiment of an A / D converter of the present invention.

FIG. 2 is a timing chart showing the operation of the first embodiment.

FIG. 3 is an explanatory diagram showing a relationship between time and voltage during zero calibration according to the first embodiment.

FIG. 4 is an explanatory diagram showing the relationship between time and voltage during full-scale calibration according to the first embodiment.

FIG. 5 is an explanatory diagram showing a relationship between time and voltage during measurement according to the first embodiment.

FIG. 6 is a circuit diagram showing a second embodiment of the A / D converter of the present invention.

FIG. 7 is a circuit diagram showing a conventional example of an A / D converter.

[Explanation of symbols]

 1 Power Supply 2, 5 Resistor 3, 4 Switch 6 Operational Amplifier 7 Capacitor 8 Comparator 9 Inverter 10 CPU 11 Oscillator 12 Counter 13, 14 Register

Claims (1)

[Scope of utility model registration request] 1. A first reference voltage source that outputs a constant voltage, and a second reference voltage source that outputs a constant voltage having a polarity different from that of the first reference voltage source.
A reference voltage source, first and second switches, an analog signal input terminal to which the analog signal source is connected, a first
A first reference voltage source connected via a switch
Through the reference voltage input terminal of the
And an integrator having a second reference voltage input terminal to which the reference voltage source is connected, and after turning on the first switch for a certain period of time, the second switch is turned on until the output of the integrator reaches a predetermined voltage. A control unit for turning on and a measurement unit for measuring the on time of the first and second switches and digitally outputting the measurement result are provided, and the control unit turns on the first switch for a certain period of time. The on / off control of turning on the second switch is repeatedly performed until the output of the integrator reaches a predetermined voltage, and the measuring unit sets the cycle of the on / off control for a predetermined period. An analog / digital converter that is measured by.