JPH0650312U - High Frequency Multilayer Ceramic Inductor - Google Patents

High Frequency Multilayer Ceramic Inductor

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Publication number
JPH0650312U
JPH0650312U JP9055992U JP9055992U JPH0650312U JP H0650312 U JPH0650312 U JP H0650312U JP 9055992 U JP9055992 U JP 9055992U JP 9055992 U JP9055992 U JP 9055992U JP H0650312 U JPH0650312 U JP H0650312U
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Japan
Prior art keywords
coil conductor
coil
external electrode
high frequency
hole
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JP9055992U
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Japanese (ja)
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JP2584531Y2 (en
Inventor
俊一 大野
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Taiyo Yuden Co Ltd
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Taiyo Yuden Co Ltd
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Priority to JP1992090559U priority Critical patent/JP2584531Y2/en
Publication of JPH0650312U publication Critical patent/JPH0650312U/en
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Abstract

(57)【要約】 【目的】 コイル導体と外部電極端子との接続を確実に
するとともに、共振周波数をできるだけ高く維持するた
めにコイル導体と外部電極との間に発生する浮遊容量の
低減を計った高周波用積層セラミックインダクタの提
供。 【構成】 スルーホール4をグリーンシート1上に設け
る際、裁断後のチップ素体の端面に設けられる外部電極
間の中点になるように位置決めし、このスルーホール4
の位置に応じたコイル導体3のパターンを印刷して形成
し、かつ外部電極への引きだし端部6の形状を、コイル
巻線部から遠のく方向に屈曲して設けたことを特徴とす
る。
(57) [Abstract] [Purpose] To secure the connection between the coil conductor and the external electrode terminal, and to reduce the stray capacitance generated between the coil conductor and the external electrode in order to maintain the resonance frequency as high as possible. Providing high frequency monolithic ceramic inductors. When the through hole 4 is provided on the green sheet 1, the through hole 4 is positioned so as to be a midpoint between the external electrodes provided on the end surface of the chip body after cutting.
It is characterized in that a pattern of the coil conductor 3 corresponding to the position of is formed by printing, and the shape of the lead-out end portion 6 to the external electrode is bent in a direction away from the coil winding portion.

Description

【考案の詳細な説明】[Detailed description of the device]

【0001】[0001]

【産業上の利用分野】[Industrial applications]

本考案は、高周波用積層セラミックインダクタに関する。 The present invention relates to a high frequency monolithic ceramic inductor.

【0002】[0002]

【従来の技術】[Prior art]

積層セラミックインダクタは、シート法を用いる場合には積層技術を利用して 、コイル導体が形成されたフェライト磁性体のグリーンシートを積層し、該シー トの所定位置に形成されたスルーホール導体を介して層間のコイル導体を接続し てコイルを形成し、コイル導体の始端と終端とがそれぞれ別の外部電極端子に接 続するように一体化したインダクタである。 When using the sheet method, a laminated ceramic inductor uses a lamination technique to laminate a green sheet of a ferrite magnetic material on which a coil conductor is formed, and through a through-hole conductor formed at a predetermined position of the sheet. Is an inductor in which coil conductors between layers are connected to form a coil, and the starting end and the terminating end of the coil conductor are connected to different external electrode terminals, respectively.

【0003】 図2は従来の積層セラミックインダクタのシート法による積層工程例を示す積 層分解斜視図であって、グリーンシート1上に形成された例えばL字状のコイル 導体3のパターンがコイルを形成するようにスルーホール4のスルーホール導体 によって接続され、これらシートの下部および上部には複数枚のグリーンシート からなるカバーーシート2が重ねられる。FIG. 2 is a laminated layer exploded perspective view showing an example of a lamination process of a conventional laminated ceramic inductor by a sheet method. For example, an L-shaped coil conductor 3 pattern formed on the green sheet 1 is a coil. The sheets are connected by the through-hole conductors of the through-holes 4 as they are formed, and the cover sheet 2 composed of a plurality of green sheets is superposed on the lower and upper portions of these sheets.

【0004】 なお、図の白抜き矢印は積層パターンの繰り返しを示している。In addition, the outline arrows in the figure indicate the repetition of the laminated pattern.

【0005】 従来のように、せいぜい数10MHz 帯域で使用されていた場合、コイル導体 が積層される際の接続部分は、上記のようなシート法においてはスルーホール導 体であり、スラリービルド法では導体の印刷重ね部分である。When the coil conductor is used in the band of at most several 10 MHz as in the prior art, the connecting portion when the coil conductors are laminated is the through-hole conductor in the sheet method as described above, and in the slurry build method. It is the printed overlap portion of the conductor.

【0006】 これらは外部電極との接続を形成し易くするために、外部電極寄り、つまりチ ップ素体の端寄りに設けられるのが普通である。These are usually provided near the external electrodes, that is, near the ends of the chip element body in order to facilitate the formation of connection with the external electrodes.

【0007】 また、上記周波数程度の帯域で使用される場合には、図4(a)の透過平面図 に示すように、周回するコイル導体の外部電極への引きだし端部の形状はコイル 導体幅と同じ幅で形成されているが、外部電極との接続を良くするため、図4( b)、または(c)のように、コイル導体端末をチップ素体端面と平行に拡げて 接触面積を大きくしたものもある。Further, when used in a band of the above-mentioned frequency, as shown in the transmission plan view of FIG. 4A, the shape of the lead-out end of the circulating coil conductor to the external electrode is the width of the coil conductor. Although it is formed with the same width as the above, in order to improve the connection with the external electrode, the coil conductor end is expanded in parallel with the end surface of the chip body to improve the contact area, as shown in FIG. Some are larger.

【0008】[0008]

【考案が解決しようとする課題】[Problems to be solved by the device]

積層セラミックインダクタを高周波領域で使用する場合には、該インダクタの 共振周波数f0 を出来るだけ高くする必要があり、コイル導体間、スルーホール 導体と外部電極間等に発生する浮遊容量が無視できなくなる。すなわち、共振周 波数f0 はインダクタンス値をL、浮遊容量をCとすれば以下の式で示され、f 0 を高くするには、L値が製品のアイテムによって決定され不変であるので、浮 遊容量Cを低くする必要があるからである。 When the monolithic ceramic inductor is used in the high frequency range, the resonance frequency f of the inductor is0Is required to be as high as possible, and stray capacitance generated between coil conductors, between through-hole conductors and external electrodes, etc. cannot be ignored. That is, the resonance frequency f0Is represented by the following formula, where L is the inductance value and C is the stray capacitance: 0 This is because the floating capacitance C needs to be lowered because the L value is determined by the product item and is invariable in order to increase.

【0009】[0009]

【数1】 一般に浮遊容量の大きさは導体の対向面積に比例し、距離の二乗に反比例する ことが知られており、高周波領域での使用に当っては従来のパターンではスルー ホール導体と外部電極との距離が近いことから浮遊容量が大きく影響する。[Equation 1] It is generally known that the size of the stray capacitance is proportional to the facing area of the conductor and inversely proportional to the square of the distance.For use in the high frequency region, the distance between the through-hole conductor and the external electrode in the conventional pattern is Is close to each other, stray capacitance has a great influence.

【0010】 また、図4(a)のように、引きだし部の導体幅が十分に得られない場合には 、外部電極との接続が悪化して不良チップの割合が増加してしまうので、図4( b)または(c)のようにすると、外部電極とコイル導体との距離を事実上縮め てしまうことになり、浮遊容量が増し、共振周波数f0 を低くしてしまうという 課題があった。Further, as shown in FIG. 4A, when the conductor width of the lead-out portion cannot be sufficiently obtained, the connection with the external electrode is deteriorated and the ratio of defective chips increases. In the case of 4 (b) or (c), the distance between the external electrode and the coil conductor is effectively shortened, the stray capacitance is increased, and the resonance frequency f 0 is lowered. .

【0011】 したがって本考案の目的は、コイル導体と外部電極端子との接続を確実にする とともに、共振周波数をできるだけ高く維持するためにコイル導体と外部電極と の間に発生する浮遊容量の低減を計った高周波用積層セラミックインダクタを提 供することにある。Therefore, an object of the present invention is to ensure the connection between the coil conductor and the external electrode terminal, and to reduce the stray capacitance generated between the coil conductor and the external electrode in order to maintain the resonance frequency as high as possible. The purpose is to provide a measured high frequency monolithic ceramic inductor.

【0012】[0012]

【課題を解決するための手段】[Means for Solving the Problems]

本考案者は上記目的を達成すべく研究を進めるに当り、浮遊容量はコイル導体 と外部電極との対向面積に比例し、両者の距離の2乗に反比例することから、ま ずコイル導体と外部電極間の浮遊容量を構成する要素中でコイル導体の接続部と 外部電極間に発生する浮遊容量が大きな割合を占めることに着目した。 In order to achieve the above-mentioned object, the present inventor conducted stray capacitance in proportion to the facing area of the coil conductor and the external electrode and in inverse proportion to the square of the distance between them. We paid attention to the fact that the stray capacitance generated between the connection part of the coil conductor and the external electrode occupies a large proportion among the elements that constitute the stray capacitance between the electrodes.

【0013】 コイル導体の接続部は、シート法におけるスルーホール部にしても、スラリー ビルド法の印刷重ね部分にしても、他のコイル導体部分の2倍以上の層厚を有し ており、対向面積も大きいことから、この接続部の層厚を減らせば良いわけであ るが、実際上はその部分だけ別に印刷するなど手間がかかり困難である。The connecting portion of the coil conductor has a layer thickness that is at least twice as large as that of other coil conductor portions regardless of whether it is a through-hole portion in the sheet method or a printed overlapping portion in the slurry build method. Since the area is large, it is only necessary to reduce the layer thickness of this connection part, but in practice it is difficult and time-consuming to print that part separately.

【0014】 しかし、接続部全体の位置を変更して、外部電極との距離を増して行けば浮遊 容量は減少し、接続部の位置が対向する外部電極の中点において最小になること が判明した。However, it has been found that if the position of the entire connecting portion is changed to increase the distance from the external electrode, the stray capacitance decreases, and the position of the connecting portion becomes minimum at the midpoint of the facing external electrode. did.

【0015】 すなわち、図3(a)ないし(c)に示すように、チップ素体におけるスルー ホールの位置による共振周波数f0 の変化を調べた結果、表1に示す通りであっ た。下記表1は5ターンチップ試作例に関するものである。That is, as shown in FIGS. 3A to 3C, as a result of examining the change of the resonance frequency f 0 depending on the position of the through hole in the chip body, it is as shown in Table 1. Table 1 below relates to a prototype of a 5-turn chip.

【0016】[0016]

【表1】 [Table 1]

【0017】 表1の結果から判るように、試作品Bは、スルーホールの位置が外部電極側に ある従来例(試作品A)よりも好ましく、スルーホールの位置が外部電極間の中 点に設けられた試作品Cの方がさらに浮遊容量が小さく、より好ましい。As can be seen from the results in Table 1, the prototype B is preferable to the conventional example (prototype A) in which the position of the through hole is on the external electrode side, and the position of the through hole is at the midpoint between the external electrodes. The provided prototype C has a smaller stray capacitance and is more preferable.

【0018】 従来、コイル導体と外部電極端子との接続を確実にするためにコイル導体端部 をチップ素体端面に両側に平行に拡げて接触面積を大きくすることは知られてい る。Conventionally, in order to ensure the connection between the coil conductor and the external electrode terminal, it is known to expand the end portion of the coil conductor parallel to both sides of the end surface of the chip body to increase the contact area.

【0019】 しかしながら、そのように接触面積を取得すると、コイル導体と外部電極の間 に発生する浮遊容量の増加が避けられなかった点について研究を進め、コイル導 体端部の引きだし方向を逆にして接触面積を確保すれば浮遊容量の増加が避けら れることを見いだした。However, when the contact area was acquired in this way, research was conducted on the fact that an increase in stray capacitance generated between the coil conductor and the external electrode was unavoidable, and the drawing direction of the coil conductor end was reversed. It was found that the increase of stray capacitance can be avoided if the contact area is secured by using this method.

【0020】 そこで本考案は、セラミックと内部コイル導体とを積層して得られるチップ素 体において、積層されたセラミックによってチップ素体の骨格を形成し、セラミ ック上に形成されるコイル導体の接続部を介して該セラミック層間のコイル導体 を接続してチップ素体内を周回するコイルを形成し、その始端と終端とがそれぞ れ別の外部電極端子に接続してなる高周波用積層セラミックインダクタであって 、上記コイル導体の接続部好ましくはスルーホールの位置がチップ素体の端面に 対向して形成される外部電極間の中点であり、かつ、コイル導体引きだし端部が 該端面に平行に、コイル巻線部分から遠のく方向に引きだされていることを特徴 とする高周波用積層セラミックインダクタを提供するものである。In view of the above, the present invention provides a chip body obtained by laminating a ceramic and an internal coil conductor, in which a skeleton of the chip body is formed by the laminated ceramics, and a coil conductor formed on the ceramic is formed. A high frequency monolithic ceramic inductor in which coil conductors between the ceramic layers are connected via a connecting portion to form a coil that circulates in the chip body, and the start end and the end are connected to different external electrode terminals respectively. The connecting portion of the coil conductor, preferably the position of the through hole, is the midpoint between the external electrodes formed facing the end face of the chip element body, and the coil conductor lead-out end is parallel to the end face. In addition, the present invention provides a high frequency monolithic ceramic inductor which is drawn out in a direction away from the coil winding portion.

【0021】[0021]

【作用】[Action]

本考案における作用効果は、第1にコイル導体接続部、例えばスルーホール導 体と外部電極との距離が長いので、この間の浮遊容量が小さいことと、第2にコ イル導体引きだし端部がコイル巻線部分から遠のく方向に引きだされて、外部電 極との接触面積が広くコイル導体と外部電極との接続を確実にしたこととである 。 The effect of the present invention is that, firstly, since the distance between the coil conductor connecting portion, for example, the through-hole conductor and the external electrode is long, the stray capacitance between them is small, and secondly, the coil conductor lead-out end is the coil. It was pulled out in a direction away from the winding part, and the contact area with the external electrode was wide, ensuring the connection between the coil conductor and the external electrode.

【0022】 その結果、浮遊容量を小さく、コイル導体と外部電極との接続を確実にした。As a result, the stray capacitance was reduced, and the connection between the coil conductor and the external electrode was ensured.

【0023】[0023]

【実施例】【Example】

図1は本実施例において用いられた、スルーホールの位置が外部電極間の中点 に設けられ、かつコイル導体引きだし端部がコイル巻線部から遠のく方向に屈曲 して設けられた積層体の積層分解斜視図であって、これらを参照して以下説明す る。 (1)SiO2 、Al2 3 を主成分とし、BaO、CaO等を副成分とし、さ らにB2 3 を添加した原材料をボールミルで15時間混合した後、乾燥した。 (2)得られた混合物を1500℃以上の高温で溶融させたものを冷却後粉砕し 、これをボールミルにてさらに微粉砕した後、乾燥した。 (3)得られた材料粉末に対し、バインダー10〜15重量%、トルエン20重 量%、エタノール20重量%およびブタノール40重量%を添加し、ボールミル にて15時間混合した。 (4)得られたスラリーをドクダーブレード法を用いて膜厚30〜80μmの長 尺なシートとした。 (5)次いで適当な大きさに切断したグリーンシート片の必要な位置にスルーホ ールを設ける際、図1に見られるように、裁断後のチップ素体の端面に設けられ る外部電極間の中点になるように位置決めし、このスルーホール4の位置に応じ たコイル導体3のパターンをAgペーストをスクリーン印刷法を用いて形成した 。なお外部電極への引きだし端部6の形状を、コイル巻線部から遠のく方向に屈 曲して設けた。 (6)得られたコイル導体印刷済みのグリーンシート1を所定枚数積層し、さら にコイル導体が印刷されていない複数枚のシートをカバーシート2として印刷済 みシートの上下に重ね、0.5t/cm2 の圧力で圧着し、積層体とした。 (7)得られた積層体をチップ寸法に従って裁断し、個々のチップ素体とし、こ れを500℃で1時間脱バインダー処理を行った後、900℃で1時間焼成した 。 (8)得られた焼結体の端面を研磨し、これにAgペーストを浸漬法によって塗 布して外部電極とし、150℃にて15分間乾燥後、800℃にて10分間焼付 けを行って積層セラミックインダクタを得た。FIG. 1 shows a laminated body used in this embodiment, in which the position of the through hole is provided at the midpoint between the external electrodes and the coil conductor lead-out end is bent in a direction away from the coil winding part. FIG. 3 is an exploded perspective view of a stack, which will be described below with reference to these. (1) Raw materials containing SiO 2 and Al 2 O 3 as main components, BaO and CaO as auxiliary components, and further added B 2 O 3 were mixed in a ball mill for 15 hours and then dried. (2) The obtained mixture was melted at a high temperature of 1500 ° C. or higher, cooled, pulverized, further pulverized with a ball mill, and then dried. (3) To the obtained material powder, 10 to 15% by weight of a binder, 20% by weight of toluene, 20% by weight of ethanol and 40% by weight of butanol were added and mixed in a ball mill for 15 hours. (4) The obtained slurry was made into a long sheet having a film thickness of 30 to 80 μm by using the docker blade method. (5) Next, when a through hole is provided at a required position of a green sheet piece cut into an appropriate size, as shown in FIG. 1, between the external electrodes provided on the end surface of the chip body after cutting. Positioning was made so as to be at a midpoint, and a pattern of the coil conductor 3 corresponding to the position of the through hole 4 was formed using Ag paste by screen printing. In addition, the shape of the lead-out end 6 to the external electrode was provided so as to be bent in a direction away from the coil winding portion. (6) A predetermined number of the obtained green sheets 1 on which the coil conductor has been printed are laminated, and a plurality of sheets on which no coil conductor is printed are further stacked as the cover sheet 2 on the upper and lower sides of the printed sheet to form 0.5 t. A pressure was applied at a pressure of / cm 2 to obtain a laminate. (7) The obtained laminated body was cut according to the chip size to obtain individual chip bodies, which were subjected to a binder removal treatment at 500 ° C. for 1 hour and then baked at 900 ° C. for 1 hour. (8) The end surface of the obtained sintered body was polished, and Ag paste was applied thereto by an immersion method to form an external electrode. The external electrode was dried at 150 ° C for 15 minutes, and then baked at 800 ° C for 10 minutes. A multilayer ceramic inductor was obtained.

【0024】 得られた5ターンチップ試作品の共振周波数f0 他の性能を調べた結果を表2 に示した。The results of examining the resonance frequency f 0 and other properties of the obtained 5-turn chip prototype are shown in Table 2.

【0025】[0025]

【比較例1】 図5は本比較例に用いられた、スルーホールが外部電極間の中点に設けられ、 かつコイル導体引きだし端部がコイル導体幅と同じである積層体の積層分解斜視 図であって、これをも参照して以下説明する。Comparative Example 1 FIG. 5 is a laminated exploded perspective view of a laminated body used in this comparative example, in which a through hole is provided at a midpoint between external electrodes and a coil conductor lead-out end has the same width as the coil conductor width. However, this will be described below with reference to this also.

【0026】 図5に見られるように、コイル導体引きだし端部6の形状をコイル導体幅と同 じにした以外は、実施例に述べた要領に従って5ターンチップ試作品を作成し、 その性能を表2に示した。As shown in FIG. 5, except that the shape of the coil conductor lead-out end 6 was made the same as the coil conductor width, a 5-turn chip prototype was created according to the procedure described in the example, and its performance was evaluated. The results are shown in Table 2.

【0027】[0027]

【比較例2】 図6は本比較例に用いられた、スルーホールが外部電極間の中点に設けられ、 かつコイル導体引きだし端部をチップ素体端面に平行に拡げた積層体の積層分解 斜視図であって、これをも参照して以下説明する。[Comparative Example 2] FIG. 6 shows a laminated assembly used in this comparative example, in which a through hole is provided at a midpoint between external electrodes, and a coil conductor lead-out end is spread in parallel with an end face of a chip body. FIG. 3 is a perspective view, which will be described below with reference to FIG.

【0028】 図6に見られるように、コイル導体引きだし端部6の形状をチップ素体端面に 平行に拡げた以外は、実施例に述べた要領に従って5ターンチップ試作品を作成 し、その性能を表2に示した。As shown in FIG. 6, a 5-turn chip prototype was prepared in accordance with the procedure described in the example except that the shape of the coil conductor lead-out end 6 was expanded in parallel with the end surface of the chip element body, and its performance was obtained. Is shown in Table 2.

【0029】[0029]

【比較例3】 図7は本比較例に用いられた、スルーホールが外部電極間の中点に設けられ、 かつコイル導体引きだし端部をコイル巻線側に屈曲した積層体の積層分解斜視図 であって、これをも参照して以下説明する。COMPARATIVE EXAMPLE 3 FIG. 7 is a laminated exploded perspective view of a laminated body used in this comparative example, in which a through hole is provided at a midpoint between external electrodes, and a coil conductor lead-out end is bent toward the coil winding side. However, this will be described below with reference to this also.

【0030】 図7に見られるように、コイル導体引きだし端部6の形状をコイル巻線側に屈 曲した以外は、実施例に述べた要領に従って5ターンチップ試作品を作成し、そ の性能を表2に示した。As shown in FIG. 7, a 5-turn chip prototype was prepared in accordance with the procedure described in the example except that the shape of the coil conductor lead-out end 6 was bent to the coil winding side, and its performance was evaluated. Is shown in Table 2.

【0031】[0031]

【表2】 [Table 2]

【0032】 図8(a)、(b)、(c)、および(d)は前記比較例1ないし3および実 施例で作成された各積層体の透過平面図であって、同図(a)はコイル導体引き だし端部の形状をコイル導体幅と同じにしたもの、同図(b)はチップ幅一杯に 拡げたもの、同図(c)はコイル巻線側に屈曲したもの、および同図(d)はコ イル巻線側とは逆方向に屈曲したものを示している。FIGS. 8A, 8B, 8C, and 8D are transmission plan views of the laminates prepared in Comparative Examples 1 to 3 and Example, and FIG. (a) shows the shape of the coil conductor lead-out end that is the same as the coil conductor width, (b) shows the chip width expanded to the full width, (c) shows the coil winding bent, Also, FIG. 3D shows a case where the coil winding is bent in the opposite direction.

【0033】 上記表2の結果から判るように、コイル導体引きだし端部の形状を図8(d) に示された形状にすることによって、高い共振周波数f0 と外部電極への確実な 接続とを両立させうることが確認された。As can be seen from the results in Table 2 above, by making the shape of the coil conductor lead-out end into the shape shown in FIG. 8D, a high resonance frequency f 0 and reliable connection to the external electrode can be obtained. It was confirmed that both can be achieved.

【0034】[0034]

【考案の効果】[Effect of device]

以上説明したように、本考案によれば、共振周波数f0 が高く、かつ内部導体 コイルと外部電極との接続が確実な高周波用積層セラミックインダクタを提供で きる。As described above, according to the present invention, it is possible to provide a high frequency monolithic ceramic inductor having a high resonance frequency f 0 and a reliable connection between the inner conductor coil and the outer electrode.

【提出日】平成4年12月18日[Submission date] December 18, 1992

【手続補正1】[Procedure Amendment 1]

【補正対象書類名】明細書[Document name to be amended] Statement

【補正対象項目名】0016[Correction target item name] 0016

【補正方法】変更[Correction method] Change

【補正内容】[Correction content]

【0016】[0016]

【表1】 [Table 1]

【図面の簡単な説明】[Brief description of drawings]

【図1】本考案の一実施例において用いられた、スルー
ホールの位置が外部電極間の中点に設けられ、かつコイ
ル導体引きだし端部がコイル巻線部から遠のく方向に屈
曲して設けられた積層体の積層分解斜視図である。
FIG. 1 is a perspective view showing a through hole according to an embodiment of the present invention, in which a through hole is provided at a midpoint between external electrodes, and a coil conductor leading end is bent in a direction away from a coil winding portion. FIG. 3 is an exploded perspective view of the laminated body.

【図2】スルーホールの位置がコイル導体の外部電極側
に設けられている従来の積層セラミックインダクタにお
ける積層体の積層分解斜視図である。
FIG. 2 is a laminated exploded perspective view of a laminated body in a conventional laminated ceramic inductor in which a position of a through hole is provided on a side of an outer electrode of a coil conductor.

【図3】チップ素体におけるスルーホールの位置を説明
するための透過平面図であって、同図(a)はコイルの
外部電極側にある場合、同図(b)は同図(a)の場合
よりもコイル長の1/4だけ外部電極より遠ざかった場
合および同図(c)は外部電極間の中点にある場合であ
る。
FIG. 3 is a transparent plan view for explaining the positions of through holes in the chip body, where FIG. 3 (a) is on the external electrode side of the coil, and FIG. 3 (b) is FIG. 3 (a). In this case, the distance from the external electrode is 1/4 of the coil length, and the case (c) in FIG.

【図4】同図(a)ないし(c)は、従来のコイル導体
引きだし端部の形状を示す積層体の透過平面図である。
4A to 4C are transparent plan views of a laminated body showing the shape of a conventional coil conductor lead-out end.

【図5】スルーホールが外部電極間の中点に設けられ、
かつコイル導体引きだし端部がコイル導体幅と同じであ
る積層体の積層分解斜視図である。
FIG. 5 is a through hole provided at a midpoint between external electrodes,
FIG. 9 is a laminated exploded perspective view of a laminated body in which the coil conductor lead-out end has the same width as the coil conductor width.

【図6】スルーホールが外部電極間の中点に設けられ、
かつコイル導体引きだし端部をチップ素体の端面に平行
に広げた積層体の積層分解斜視図である。
FIG. 6 is a through hole provided at a midpoint between external electrodes,
FIG. 5 is a stacking exploded perspective view of a stack in which the coil conductor lead-out end is spread in parallel to the end face of the chip body.

【図7】スルーホールが外部電極間の中点に設けられ、
かつコイル導体引きだし端部をコイル巻線側に屈曲した
積層体の積層分解斜視図である。
FIG. 7 is a through-hole provided at a midpoint between external electrodes,
FIG. 7 is a laminated exploded perspective view of a laminated body in which the coil conductor lead-out end is bent toward the coil winding side.

【図8】同図(a)ないし(d)はそれぞれ、図5、図
6、図7および図1に示した各積層体の透過平面図であ
る。
8A to 8D are transmission plan views of the respective laminates shown in FIGS. 5, 6, 7 and 1. FIG.

【符号の説明】[Explanation of symbols]

1 グリーンシート 2 カバーシート 3 コイル導体 4 スルーホール 5 チップ素体 6 引きだし端部 7 外部電極 1 Green Sheet 2 Cover Sheet 3 Coil Conductor 4 Through Hole 5 Chip Element 6 Lead-out End 7 External Electrode

Claims (2)

【実用新案登録請求の範囲】[Scope of utility model registration request] 【請求項1】 セラミックと内部コイル導体とを積層し
て得られるチップ素体において、積層されたセラミック
によってチップ素体の骨格を形成し、セラミック上に形
成されるコイル導体の接続部を介して該セラミック層間
のコイル導体を接続してチップ素体内を周回するコイル
を形成し、その始端と終端とがそれぞれ別の外部電極端
子に接続してなる高周波用積層セラミックインダクタで
あって、上記コイル導体の接続部の位置がチップ素体の
端面に対向して形成される外部電極間の中点であり、お
よび/または、コイル導体引きだし端部が該端面に平行
に、コイル巻線部分から遠のく方向に引きだされている
ことを特徴とする高周波用積層セラミックインダクタ。
1. A chip element body obtained by laminating a ceramic and an internal coil conductor, wherein a skeleton of the chip element body is formed by the laminated ceramics, and a connecting portion of the coil conductor formed on the ceramic is interposed. A high frequency monolithic ceramic inductor in which coil conductors between the ceramic layers are connected to each other to form a coil that circulates in a chip element body, and a start end and an end thereof are connected to different external electrode terminals, respectively. Is the midpoint between the external electrodes formed facing the end face of the chip body, and / or the coil conductor lead-out end is parallel to the end face and is away from the coil winding portion. Is a high frequency monolithic ceramic inductor.
【請求項2】 前記接続部がスルーホール導体である請
求項1記載の高周波用積層セラミックインダクタ。
2. The high frequency multilayer ceramic inductor according to claim 1, wherein the connecting portion is a through-hole conductor.
JP1992090559U 1992-12-10 1992-12-10 Multilayer ceramic inductor for high frequency Expired - Lifetime JP2584531Y2 (en)

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Application Number Priority Date Filing Date Title
JP1992090559U JP2584531Y2 (en) 1992-12-10 1992-12-10 Multilayer ceramic inductor for high frequency

Publications (2)

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JPH0650312U true JPH0650312U (en) 1994-07-08
JP2584531Y2 JP2584531Y2 (en) 1998-11-05

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005093547A (en) * 2003-09-12 2005-04-07 Murata Mfg Co Ltd High frequency coil and its manufacturing method
JP2008078226A (en) * 2006-09-19 2008-04-03 Tdk Corp Laminated type inductor
WO2010050306A1 (en) * 2008-10-30 2010-05-06 株式会社村田製作所 Electronic part
CN109103001A (en) * 2018-10-10 2018-12-28 深圳市麦捷微电子科技股份有限公司 A kind of new structure laminated chip inductor

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57100209U (en) * 1980-12-09 1982-06-19
JPS6261305A (en) * 1985-09-11 1987-03-18 Murata Mfg Co Ltd Laminated chip coil
JPH03219605A (en) * 1990-01-24 1991-09-27 Murata Mfg Co Ltd Laminated-type inductance element

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57100209U (en) * 1980-12-09 1982-06-19
JPS6261305A (en) * 1985-09-11 1987-03-18 Murata Mfg Co Ltd Laminated chip coil
JPH03219605A (en) * 1990-01-24 1991-09-27 Murata Mfg Co Ltd Laminated-type inductance element

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005093547A (en) * 2003-09-12 2005-04-07 Murata Mfg Co Ltd High frequency coil and its manufacturing method
JP2008078226A (en) * 2006-09-19 2008-04-03 Tdk Corp Laminated type inductor
WO2010050306A1 (en) * 2008-10-30 2010-05-06 株式会社村田製作所 Electronic part
JP2013254977A (en) * 2008-10-30 2013-12-19 Murata Mfg Co Ltd Electronic component
JP5387579B2 (en) * 2008-10-30 2014-01-15 株式会社村田製作所 Electronic components
CN109103001A (en) * 2018-10-10 2018-12-28 深圳市麦捷微电子科技股份有限公司 A kind of new structure laminated chip inductor

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