JPH0643427A - Driving circuit for liquid crystal display device - Google Patents

Abstract

PURPOSE:To prevent a DC component from being applied to a liquid crystal, and to improve reliability and a picture quality of the liquid crystal display device by making an average level of potential of the picture element capacity coincide exactly with a counter electrode voltage of the picture element capacity. CONSTITUTION:The driving circuit is provided with a voltage transition circuit 6 for allowing an auxiliary capacity counter electrode voltage VS applied by a counter electrode power source circuit 5 to fall temporary, when a gate signal VG of a thin film transistor Q rises, and returning this auxiliary capacity counter electrode voltage VS to an original state, when the gate signal VG falls.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a drive circuit for active matrix driving of a liquid crystal display device using thin film transistors.

[0002]

2. Description of the Related Art As shown in FIG. 3, a liquid crystal display device which performs active matrix driving has a structure in which thin film transistors Q are connected in a matrix at intersections of a plurality of orthogonal source lines 11 and gate lines 12. . Further, each thin film transistor Q is connected to a pixel capacitance CP formed between each pixel and a counter electrode via a liquid crystal layer, and an auxiliary capacitance CS for compensating for charges held by the pixel capacitance CP. There is. Further, the pixel capacitor counter electrode voltage Vcom and the auxiliary capacitor counter electrode voltage VS are applied to the counter electrodes of the pixel capacitor CP and the auxiliary capacitor CS, respectively. When the gate signal VG applied to the gate line 12 is activated and the thin film transistor Q becomes conductive, charges are accumulated in the pixel capacitance CP and the auxiliary capacitance CS according to the display signal Vsig sent to the source line 11. .
Therefore, the liquid crystal of the pixel can be driven by this charge.

FIG. 4 shows a conventional drive circuit for driving the above liquid crystal display device.

The pixel capacitance counter electrode voltage Vcom and the auxiliary capacitance counter electrode voltage VS applied to the respective counter electrodes of the pixel capacitance CP and the auxiliary capacitance CS of each pixel in the liquid crystal display device 1 are supplied from the counter electrode power supply circuit 5. To be done. The display signal Vsig sent in serial format is converted into a parallel signal by the shift register 2. The parallel signal is sent to each source line 11 of the liquid crystal display device 1 via the driver circuit 3. The liquid crystal deteriorates when a DC component is contained in the applied voltage, and an afterimage phenomenon or the like occurs. Therefore, the driver circuit 3 alternately switches the positive and negative of the display signal Vsig with respect to the pixel capacitance counter electrode voltage Vcom and sends the display signal Vsig to the source line 11, and only the AC component is applied to the liquid crystal.

Each gate line 12 of the liquid crystal display device 1
A gate signal VG is sent from the scanning circuit 4 to each of the scanning signals. The scanning circuit 4 is a circuit that performs scanning by sequentially activating the gate signal VG of each gate line 12 every time the display signal Vsig is sent for one row. Therefore, by the scanning using the gate signal VG, the display signal Vsig is sequentially input to the pixels in each row of the liquid crystal display device 1, whereby the active matrix driving is performed.

[0006]

The change of each signal waveform on one pixel of the liquid crystal display device shown in FIG. 3 will be described with reference to FIG. The gate signal VG applied to the gate line 12 to which the thin film transistor Q corresponding to the pixel is connected rises once every scanning of all the gate lines 12 and becomes active. While the gate signal VG is active, the pixel capacitance CP and the auxiliary capacitance CS of each pixel in each row are charged, and the potential VP of this pixel capacitance Cp on the side connected to the thin film transistor Q is sent to the source line 11. It rises or falls to the level of the received display signal Vsig. However, when the gate signal VG falls and returns to inactive, the gate capacitance CG shown in FIG. 3 between the gate of the thin film transistor Q and the pixel robs part of the charge accumulated in the pixel capacitance CP and the auxiliary capacitance CS. Be seen. As a result, the potential VP of the pixel capacitance CP decreases. That is, the potential VP of the pixel capacitance CP decreases by the potential difference VPd shown in Expression 1 with respect to the potential difference VGa when the gate signal VG changes from active to inactive.

[0007]

[Equation 1]

Therefore, what is actually applied to the pixel capacitance CP is a voltage which is changed by the potential difference VPd from the display signal Vsig. Therefore, the voltage Vs which is the average level of the display signal Vsig is applied to the respective counter electrodes of the pixel capacitance CP and the auxiliary capacitance CS.
The pixel capacitance common electrode voltage Vcom and the auxiliary capacitance common electrode voltage VS, which are lower than ig_c by the potential difference VPd and are at the same level, are commonly applied.

However, since the capacitance of the pixel capacitance CP changes according to the state of the liquid crystal, the potential VP of the pixel capacitance CP is changed.
The potential difference VPd when the voltage decreases also changes. That is, the potential difference VPd with respect to the maximum value CPH and the minimum value CPL of the pixel capacitance CP is
It fluctuates within the range of the displacement ΔVPd shown in Equation 2.

[0010]

[Equation 2]

Therefore, the counter electrode power supply circuit 5 shown in FIG. 4 has the voltage Vsig_c which is the average level of the display signal Vsig.
Pixel capacitance counter electrode voltage Vco lower than the appropriate potential difference by
Even if m and the auxiliary capacitor counter electrode voltage VS are applied to each counter electrode, if the potential difference VPd changes, the actual pixel capacitance C
The average level of the P potential VP also shifts by that amount, and a DC component is applied to the liquid crystal.

Since the potential difference VPd when the potential VP of the pixel capacitance CP decreases in this way, the drive circuit of the conventional liquid crystal display device cannot accurately apply only the AC component to the liquid crystal, and the liquid crystal. There has been a problem that afterimage phenomenon appears on the display of the display device 1 and the reliability is lowered.

The present invention has been made to solve such a problem and eliminates the decrease in the potential of the pixel capacitance, and since the decrease in the potential is unstable, a direct current component is applied to the liquid crystal. SUMMARY OF THE INVENTION It is an object of the present invention to provide a driving circuit for a liquid crystal display device, which can prevent the occurrence of the problem.

[0014]

A driving circuit of a liquid crystal display device of the present invention comprises a scanning circuit for sending a gate signal which is sequentially activated to each thin film transistor connected in a matrix form, and a scanning circuit connected to each of these thin film transistors. When a gate signal of a thin film transistor becomes active in a drive circuit that includes an opposing electrode power supply circuit that applies a predetermined potential to the opposing electrodes of the liquid crystal pixel capacitance and the auxiliary capacitance, and that performs active matrix driving of the liquid crystal display device. At the same time, the potential of the counter electrode of the auxiliary capacitance applied by the counter electrode power supply circuit is changed in the direction opposite to the direction in which the gate signal becomes active, and when the gate signal returns to inactive,
The auxiliary capacitor counter electrode control circuit for returning the potential of the counter electrode of the auxiliary capacitor to the original is provided, thereby achieving the above object.

[0015]

In the following, the case where the gate signal becomes active when it rises will be described. However, even when the gate signal becomes active when it falls, the operation is the same except that the signal level is reversed.

When the gate signal of the thin film transistor rises and becomes active, the thin film transistor becomes conductive and the pixel capacitance and the auxiliary capacitance of the liquid crystal connected thereto rises or falls to the level of the display signal. However, when the gate signal falls and returns to inactive, the gate capacitance between the gate of the thin film transistor and the pixel robs part of the charge accumulated in the pixel capacitance and the auxiliary capacitance. Conventionally, when the gate signal falls due to this, the potential of the pixel capacitance is lowered.

However, in the present invention, while the gate signal is active, the potential of the counter electrode of the auxiliary capacitor is also opposite to the direction in which the gate signal is activated by the auxiliary capacitor counter electrode control circuit, that is, this direction. In this case, the potential temporarily changes in the direction of decreasing. When the electric charge is accumulated in the state where the potential of the counter electrode changes in this way, the auxiliary capacitor pushes up the potential on the side connected to the thin film transistor when the potential of the counter electrode returns to its original value. Try to supply an electric charge. Therefore, the potential of the pixel capacitance is prevented from lowering as long as the charges taken by the gate capacitance of the thin film transistor and the charges supplied by the auxiliary capacitance cancel each other when the gate signal returns to inactive. can do.

When the potential of the pixel capacitance decreases due to the gate capacitance as in the conventional case, the pixel capacitance changes depending on the state of the liquid crystal, and thus the amount of decrease in the potential also varies. Then, when the positive and negative of the display signal are alternately switched to drive the liquid crystal in an alternating current, the average level of the potential of the pixel capacitance does not exactly match the potential of the counter electrode of the pixel capacitance, and it is applied to the liquid crystal. DC signal is included in the signal. However, according to the present invention, it is possible to prevent the potential itself of the pixel capacitance from decreasing due to the gate capacitance, and therefore, it is possible to accurately match the average level of the potential of the pixel capacitance with the potential of the counter electrode of this pixel capacitance. You can
It is possible to prevent a direct current component from being applied to the liquid crystal.

Incidentally, with respect to the potential difference VGa and the gate capacitance CG when the gate signal returns from active to inactive,
The electric charge taken by the gate capacitance of the thin film transistor is VGa · CG
The electric charge supplied by this auxiliary capacitance is represented by VSaCS with respect to the potential difference VSa at which the potential of the counter electrode of the auxiliary capacitance changes and the auxiliary capacitance CS. In the present invention, it is desirable that the charges VGa · CG taken by the gate capacitances of these thin film transistors and the charges VSa · CS supplied by the auxiliary capacitances match and be completely canceled, but VGa · CG = K · VSa · CS.
In this relational expression, if the value of K is within the range of 0.7 ≦ K ≦ 1.3, there will be no practical problem. Further, it is desirable that the timing of changing the potential of the counter electrode of the auxiliary capacitance is completely synchronized while the gate signal is active, but some deviation is allowed as long as the liquid crystal display is not affected. .

[0020]

Embodiments of the present invention will be described in detail below with reference to the drawings.

1 and 2 show one embodiment of the present invention. FIG. 1 is a block diagram of a drive circuit of a liquid crystal display device, and FIG. 2 is a time chart showing the operation of the drive circuit of FIG. is there. Incidentally, the same numbers are added to the constituent members having the same functions as those of the conventional example shown in FIG.

As shown in FIG. 1, the driving circuit of the present embodiment has a pixel capacitance counter electrode voltage Vcom and an auxiliary capacitance applied to the respective counter electrodes of the pixel capacitance CP and the auxiliary capacitance CS of each pixel in the liquid crystal display device 1. The counter electrode voltage VS is supplied from the counter electrode power supply circuit 5. However, the auxiliary capacitor counter electrode voltage VS is supplied from the counter electrode power supply circuit 5 to the liquid crystal display device 1 via the voltage transition circuit 6. Voltage transition circuit 6
Is a circuit for temporarily lowering the auxiliary capacitance counter electrode voltage VS output from the counter electrode power supply circuit 5 at a predetermined timing. In synchronization with a period in which the scanning circuit 4 described later activates each gate signal VG, This auxiliary capacitor counter electrode voltage VS is lowered.

The display signal Vsig input to the shift register 2 as a serial signal is converted into a parallel signal by the shift register 2 and sent from the shift register 2 to each source line 11 of the liquid crystal display device 1 via the driver circuit 3. The shift register 2 shifts the display signal Vsig sequentially transmitted as a serial signal by the number of digits of the liquid crystal display device 1 and then outputs the serial display signals Vsig for one row in parallel. It is a circuit for converting a parallel signal into a display signal Vsig. The driver circuit 3 is a circuit that temporarily latches the display signal Vsig for one row output from the shift register 2 and outputs it to each source line 11 of the liquid crystal display device 1. In addition, the driver circuit 3 alternately switches between positive and negative of the display signal Vsig with respect to the pixel capacitance counter electrode voltage Vcom and sends the display signal Vsig to the source line 11 so that only the AC component of the signal is applied to the liquid crystal.

A gate signal VG is sent from the scanning circuit 4 to each gate line 12 of the liquid crystal display device 1. The scanning circuit 4 is a circuit for performing scanning by sequentially activating the gate signal VG of each gate line 12 every time the display signal Vsig is sent for one row.

Further, various clock signals for shifting, latching, and scanning counting are externally supplied to the voltage transition circuit 6, the shift register 2, the driver circuit 3, and the scanning circuit 4, and these clock signals operate in synchronization. .

The operation of the drive circuit having the above configuration will be described with reference to FIG.

When the gate signal VG of a gate line 12 of the liquid crystal display device 1 rises and becomes active, the thin film transistor Q shown in FIG. 3 becomes conductive. The potentials of the pixel capacitance CP and the auxiliary capacitance CS connected to the thin film transistor Q rise or fall to the level of the display signal Vsig sent to the source line 11 at that time. However, when the gate signal VG falls and returns to inactive, a part of the charges accumulated in the pixel capacitance CP and the auxiliary capacitance CS is taken to the gate capacitance CG between the gate of the thin film transistor Q and the pixel. Become. As a result, in the prior art, when the gate signal VG falls, the potential VP of the pixel capacitance CP is lowered.

However, in the present invention, the voltage transition circuit 6 lowers the auxiliary capacitance common electrode voltage VS during the period in which the gate signal VG rises and is active. Therefore, the auxiliary capacitance CS is charged by the display signal Vsig in a state where the auxiliary capacitance counter electrode voltage VS is lowered. When the gate signal VG falls and the auxiliary capacitance counter electrode voltage VS rises to the original potential, charges are supplied to the side connected to the thin film transistor Q to try to raise the potential VP.

If the potential VP is about to decrease by the potential difference VPd_G due to the charge being deprived of by the gate capacitance CG, this potential difference VPd_G uses the potential difference VGa at the time of the fall of the gate signal VG. , Expressed by the equation 3.

[0030]

[Equation 3]

If the potential VP is about to rise by the potential difference VPd_S by the charge supplied by the auxiliary capacitance CS, this potential difference VPd_S uses the potential difference VSa at which the auxiliary capacitance counter electrode voltage VS changes, Represented by 4.

[0032]

[Equation 4]

Therefore, the potential difference VPd at which the potential VP of the pixel capacitance CP actually changes is, as shown in Equation 5, the potential difference VPd_G.
And the potential difference VPd_S.

[0034]

[Equation 5]

By modifying the equation 5, the equation 6 is obtained.

[0036]

[Equation 6]

From this equation 6, it is understood that the potential difference VPd of the potential VP becomes smaller as the value of K approaches 1. That is, since the charge taken by the gate capacitance CG is VGa · CG and the charge supplied by the auxiliary capacitance CS is VSa · CS, if these charges match and the value of K indicating the ratio becomes 1, The potential difference VPd also becomes 0, and the potential VP of the pixel capacitor CP does not change. In this embodiment, the voltage transition circuit 6
Thus, the magnitude of the potential difference VSa that decreases the auxiliary capacitance counter electrode voltage VS is determined so that the value of K becomes 1, that is, the relationship shown in Expression 7 is satisfied.

[0038]

[Equation 7]

Therefore, when the gate signal VG falls, the charges taken by the gate capacitance CG and the charges supplied by the auxiliary capacitance CS cancel each other out, so that the potential VP of the pixel capacitance CP becomes equal to that of the display signal Vsig. Maintain the level.

As a result, in the present embodiment, the average level of the potential VP of the pixel capacitance CP does not change exactly in accordance with the average level Vsig_c of the display signal Vsig. Therefore, the pixel capacitor counter electrode voltage Vcom and the auxiliary capacitor counter electrode voltage VS except when the gate signal VG is active.
It is possible to prevent the direct current component signal from being applied to the liquid crystal by setting and to match the average level of the display signal Vsig.

In this embodiment, K in the above equation 6
Although the value of 1 is set to 1, practically, if it is within the range of 0.7 ≦ K ≦ 1.3, the potential difference VPd is also extremely small and no problem occurs.

[0042]

As is apparent from the above description, according to the drive circuit of the liquid crystal display device of the present invention, the average level of the potential of the pixel capacitance can be accurately matched with the potential of the counter electrode of this pixel capacitance. Therefore, it is possible to prevent the direct current component from being applied to the liquid crystal and improve the reliability and the image quality of the liquid crystal display device.

[Brief description of drawings]

FIG. 1 is a block diagram of a drive circuit of a liquid crystal display device according to an embodiment of the present invention.

FIG. 2 is a time chart showing the operation of the drive circuit according to the embodiment of the present invention.

FIG. 3 is a circuit diagram showing a circuit of each pixel of the liquid crystal display device.

FIG. 4 is a block diagram of a drive circuit of a conventional liquid crystal display device.

FIG. 5 is a time chart showing the operation of a conventional drive circuit.

[Explanation of symbols]

 1 Liquid crystal display device 4 Scanning circuit 5 Counter electrode power supply circuit 6 Voltage transition circuit Q Thin film transistor VG Gate signal CP Pixel capacitance CS Auxiliary capacitance VS Auxiliary capacitance Counter electrode voltage

Front page continuation (72) Inventor Yoshiharu Kataoka 22-22 Nagaike-cho, Abeno-ku, Osaka-shi, Osaka Prefecture Sharp Corporation (72) Naofumi Kondo 22-22, Nagaike-cho, Abeno-ku, Osaka, Osaka Prefecture (72) Inventor Makoto Miyago, 22-22 Nagaike-cho, Abeno-ku, Osaka-shi, Osaka

Claims (1)

[Claims] 1. A scanning circuit for sending a gate signal that becomes active in sequence for each row to thin film transistors connected in a matrix, and a predetermined electrode on a counter electrode of a pixel capacitance and an auxiliary capacitance of liquid crystal connected to each of these thin film transistors. In a drive circuit for driving an active matrix of a liquid crystal display device, which is provided with a counter electrode power supply circuit for applying a potential, when the gate signal of the thin film transistor becomes active, the counter electrode of the auxiliary capacitance applied by the counter electrode power supply circuit When the potential is changed to the direction opposite to the direction in which the gate signal becomes active and the gate signal returns to inactive,
A drive circuit for a liquid crystal display device, characterized in that an auxiliary capacitance counter electrode control circuit for restoring the potential of the counter electrode of the auxiliary capacitance to the original is provided.