JPH0642556B2 - Semiconductor device having avalanche breakdown junction - Google Patents

Description

TECHNICAL FIELD The present invention relates to a semiconductor device having an avalanche breakdown type junction.

[Conventional Example and Problems to be Solved by the Invention] A constant voltage diode utilizing avalanche breakdown (avalanche breakdown) development is generally called an avalanche diode and is widely used in various electronic circuits such as a reference voltage circuit and a protection circuit. ing.

By the way, in order to set the breakdown voltage to a predetermined value in the avalanche diode and the Zener diode, it is desirable to cause breakdown within the semiconductor substrate (substrate) as much as possible. Therefore, P ⁺ form region 2 to the N type region 1 as shown in FIG. 7
And the N ^{+ -type} region 3 is formed on the outer periphery of the P ^{+ -type} region 2.
, The cathode electrode 5 is connected to the N type region 1 through the N ^{++ type} region 4, the anode electrode 6 is connected to the P ^{+ type} region 2, and the anode electrode 6 is placed on the insulating film 7. An extended avalanche diode is known.

According to the avalanche diode of FIG. 7, since the anode electrode 6 extends above the N ^{+ -type} region 3 through the insulating film 7, the depletion layer based on the field effect as well as the depletion layer based on the PN junction is formed. Occurs, and the depletion layer 8 as shown by the broken line is obtained. Further, the spread of the depletion layer 8 is related to the impurity concentration, and widely occurs in the N type region 1 having a low impurity concentration and narrowly in the N ^{+ type} region 3 having a high impurity concentration. Further, since the impurity concentration of the N ^{+ -type} region 3 is high on the surface side and low on the inner side, the depletion layer based on the PN junction between the N ^{+ -type} region 3 and the P ^{+ -type} region 2 becomes narrower on the surface side. As a result, as shown in principle in FIG. 7, the depletion layer based on the PN junction between the P ^{+ type} region 2 and the N ^{+ type} region 3 becomes narrower slightly below the surface of the semiconductor substrate 1. , Where breakdown occurs. In order depth of the N ⁺ form region 3 is shallower than the P ⁺ region 2, a depletion layer N ⁺ forms a region 3 based on the PN junction between the lower and the N-type region 1 of the side end surface of the P ⁺ region 2 And P ^{+ type} area 2
The width of the depletion layer is wider than that of the depletion layer based on the PN junction with, and a narrow portion of the depletion layer is surely generated in the N ^{+ type} region 3. By adopting the structure shown in FIG. 7, it becomes possible to cause breakdown in the narrow depletion layer inside the semiconductor substrate, and the temperature dependence of the breakdown voltage is improved. However, the depletion layer generated on the surface portion of the N-type region 1 based on the electric field effect in the combined portion of the N-type region 1, the insulating film 7, and the anode 6 is the insulating film 7 and the protective resin (FIG. It fluctuates under the influence of ions contained in (not shown), and it is difficult to obtain a predetermined breakdown voltage. In particular, when a test in which a reverse voltage is applied to the avalanche diode in a high temperature state is performed, the breakdown voltage changes remarkably.

Therefore, an object of the present invention is to provide an avalanche diode that is not easily affected by ions in the insulating film.

[Means for Solving the Problem] The present invention for achieving the above object is directed to a case where a first semiconductor region of a first conductivity type included in a semiconductor substrate and a first conductivity type are opposite to each other. A second semiconductor region having a second conductivity type, which is adjacent to the first semiconductor region and is disposed so as to be exposed at the surface of the semiconductor substrate; and an impurity concentration of the first semiconductor region. A first conductivity type region having a higher impurity concentration, adjacent to the first semiconductor region, and adjacently surrounding the second semiconductor region on a surface of the semiconductor substrate. A third semiconductor region disposed in the first semiconductor region and a region of the first conductivity type having an impurity concentration higher than that of the third semiconductor region, the third semiconductor being formed on the surface of the semiconductor substrate. Place areas adjacent to each other to enclose And a fourth semiconductor region formed so as to have a portion adjacent to the first semiconductor region, and at least a boundary between the second semiconductor region and the third semiconductor region on the surface of the semiconductor substrate. An insulating film formed so as to cover the portion and the third semiconductor region, and electrically connected to the second semiconductor region directly or via another semiconductor region, and at least via the insulating film. A first main electrode extending above the third semiconductor region, and a second main electrode electrically connected to the first semiconductor region directly or through another semiconductor region. The present invention relates to a semiconductor device having an avalanche breakdown type junction including:

As described in claim 2, even if the fourth semiconductor region in claim 1 is replaced with the region of the second conductivity type, the same effect as in claim 1 can be obtained.

[Operation] A depletion layer is not substantially formed on the surface of the fourth semiconductor region of the present invention. Therefore, the outer peripheral edge of the depletion layer formed on the surface of the semiconductor substrate that is continuous with the depletion layer based on the PN junction between the first and third semiconductor regions and the second semiconductor region substantially corresponds to the outer peripheral edge of the third semiconductor region. And be restricted. As a result, changes in the spread of the depletion layer and changes in the breakdown voltage due to the ions of the insulating film and the protective resin do not occur.

[Embodiment] An avalanche diode according to an embodiment of the present invention will be described below with reference to FIGS. 1 to 3.

As shown in FIG. 1, the avalanche diode of this embodiment includes a semiconductor substrate (subslate) 11 made of a silicon semiconductor, an insulating film 12 made of a silicon oxide film formed on one main surface of the semiconductor substrate 11, and a semiconductor. Anode electrode (first main electrode) 13 made of A1 (aluminum) formed on one main surface side of the base 11, and the semiconductor base 1
1 and a cathode electrode (second main electrode) 14 made of Ni (nickel) formed on the other main surface side. The semiconductor substrate 11 includes an N-type region (first semiconductor region) 15 as a starting base material and an N for ohmic connection formed on the lower surface thereof.
^{A +} -type region 16 and a plane circular P ^{+ -type} region (second semiconductor region) 17 which is surrounded by the upper surface of the ^{+ -type} region 16 adjacent to the N-type region 15 by exposing the upper surface thereof to one main surface of the semiconductor substrate 11. , An N ^{+ -type} region (third part) formed so as to expose its upper surface to one main surface of the semiconductor substrate 11 and surround the P ^{+ -type} region 17.
Semiconductor region) 18 and an N ^{++ type} region (fourth semiconductor region) 19 formed so as to surround the N ^{+ type} region 18. The N-type region 15 and the N ^++-type region 16 can be collectively referred to as a first semiconductor region. N ^{+ type} area 1
8 is adjacent to the side end surface of the P ^{+ -type} region 17 and its lower surface is adjacent to the upper face of the N-type region 15 and surrounds the P ^{+ -type} region 17 in an annular shape when viewed in plan as shown in FIG. ing. The N ^{+ type} region 18 is formed by using both ion implantation (predeposition) of impurities and thermal diffusion (drive), and the impurity concentration thereof is higher than the impurity concentration of the N type region 15 and the impurity concentration on the surface side. Is higher than the inside. N
The depth of the ^{+ type} region 18 is shallower than that of the P ^{+ type} region 17. For the sake of illustration, the depth is not so different, but N ⁺
The depth of the shaped region 18 is preferably 1/2 or less, more preferably 1/3 or less of the depth of the P ⁺ -shaped region 17. N ⁺⁺ type region 19 is disposed the N ⁺ form region 18 so as to surround annularly, is and deeper than N ⁺ form region 18, its lower surface is connected to the N ⁺⁺ type region 16. The N ^{++ type} region 19 is formed by diffusing impurities into the N type region 15 before forming the P ^{+ type} region 17 and the N ^{+ type} region 18, and the impurity concentration thereof is N type region 15 and N ^+. Shape area 1
8 is higher than the impurity concentration. The N ^{++ type} region 19 is brought as close as possible to the P ^{+ type} region 17 within a range in which the depletion layer based on the PN junction between the side end surface of the P ^{+ type} region 17 and the N type region 15 does not reach the N ^{++ type} region 19. Is desirable. In addition, N ⁺⁺
The shape region 16 and the P ^{+ -type} region 17 are formed by ordinary impurity diffusion. An opening is formed in the insulating film 12 above the P ^{+ -type} region 17, and the anode electrode 13 is connected to the P ^{+ -type} region 17 through the opening. The insulating film 12 is formed over the entire upper surfaces of the N ^{+ type} region 18 and the N ^{++ type} region 19. This insulating film 12 is P ⁺
It extends beyond the boundary between the shape region 17 and the N ^{+ -type} region 18 to the upper surface of the P ^{+ -type} region 17. Anode electrode 13
Are formed over the N ^{+ -type} region 18 through the insulating film 12 and reach the middle of the N ⁺⁺ -type region 19. The portion of the anode electrode 13 extending from the P ^{+ type} region 17 to the outside functions as a well-known field plate.

When the potential of the cathode electrode 14 side is reverse voltage is applied becomes higher between the anode electrode 13 and the cathode electrode 14 of the avalanche diode of FIG. 1, P ⁺ form region 17 and N
A first depletion layer 21 extends from the first PN junction 20 formed by the N-type region 15 as shown by a dotted line, and a second PN formed by the P ^{+ -type} region 17 and the N ^{+ -type} region 18 is formed.
The second depletion layer 23 extends from the junction 22. In addition, the third depletion layer 24 expands on the surface side of the N ^{+ type} region 18 due to the electric field effect of the anode electrode 13. However, N ^{+ type} region 18
The depletion layer slightly extends into the N ^{+ + type} region 19 by the extension of the depletion layer 24 on the surface of the. Note that the first, second, and third depletion layers 21, 23, and 24 are not distinguished strictly because they extend continuously from each other. Where the N ^{+ type} region 18
Since the impurity concentration is higher than that of the N-type region 15, the second depletion layer 23 is formed narrower than the first depletion layer 21.
Further, since the N ^{+ -type} region 18 has an impurity concentration that decreases from one main surface side of the semiconductor substrate 11 toward the N-type region 15 side, the second depletion layer 23 is formed on the semiconductor substrate 11 as shown in FIG. The width becomes narrower on one main surface side of 11. However, since there is the third depletion layer 24 in the surface portion of the N ^{+ type} region 18,
The narrowest part is located slightly below the surface of the N ^{+ type} region 18. When the reverse voltage reaches the breakdown voltage, the critical electric field strength Ec is generated in the narrow portion of the second depletion layer 23.
A portion (electric field concentration point) that exceeds rit occurs, and breakdown occurs in this portion. In this embodiment, the N ^{+ -type} region 18 causes the second and third depletion layers 23, 2 to be applied when a reverse voltage is applied.
The width of the N ^{+ type} region 18 is determined so as not to be filled with four. The current path of the reverse current I _R at the time of breakdown is the width of the cathode electrode 14, the N ^{++ type} region 16, the N ^{++ type} region 19, the N ^{+ type} region 18, and the second depletion layer 23. It is composed of a narrow portion, a P ^{+ -type} region 17, and an anode electrode 13.

The avalanche diode of this embodiment has the following effects.

(1) The side end surface of the N ^{+ -type} region 18 is surrounded by the N ⁺⁺ -type region 19 in which the depletion layer is not formed, and the depletion layer on the surface of the semiconductor substrate 11 continuous with the depletion layer based on the PN junction is the N ^{+ -type} region. The depletion layers 21 and 2 are formed by the ions contained in the insulating film 12 and the protective resin (not shown) provided on the insulating film 12 because they are formed so as to be limited to the entire surface of 18.
The spread of 3 and 24 does not change. If a depletion layer is formed at the N ^{++ type} region 19 as shown in FIG. 7 of the conventional example, the ions in the insulating film 12 and the protective resin (not shown) covering this ion This depletion layer is changed by the ions, and N
⁺ Vary the width of the PN junction 22 in based depletion 23 of the form region 18 and the P ⁺ region 17, although variations in the breakdown voltage occurs, in the present embodiment such variations are suppressed.

(2) In the avalanche diode of this embodiment, the depletion layer that crosses the current path of the reverse current passing through the electric field concentration point, that is, the depletion layer in the region where the avalanche breakdown occurs is formed relatively narrow. Therefore, it is possible to realize an avalanche diode in which the temperature dependence of the breakdown voltage is small.

(3) The electric field concentration point is as shown in FIG.
Since it is formed on the inner side (lower side) of the surface of No. 1, the creep phenomenon (an unstable phenomenon in which the breakdown voltage fluctuates within a short time when a reverse voltage is applied) does not occur. In addition,
In FIG. 3, boundaries of the regions 15, 17, 18, and 19 are indicated by broken lines, and a solid line 25 indicates an isoelectric field curve connecting portions having the same electric field. It's getting stronger.

(4) Since the upper part of the insulating film 12 is covered with the anode electrode 13, the anode electrode 13 acts as a protective film together with the insulating film 12, and high reliability is obtained. In this embodiment, the insulating film 12 made of only the silicon oxide film having high productivity has the same reliability as that of the two-layer insulating film made of the silicon oxide film, the silicon nitride film, and the phosphosilicate glass film. .

(5) Since the current path of the reverse current I _{R has} the N ^{++ type} region 19 having a sufficiently high impurity concentration, the resistance value of the current path of the reverse current I _R can be reduced. Therefore, an avalanche diode having a low operating resistance can be realized. That is, according to the avalanche diode of the present embodiment, it is possible to realize an avalanche diode in which the amount of change in the reverse current with respect to the change in reverse voltage is large in the avalanche breakdown characteristic.

(6) ^{N +} forms the depth of the region 18 is shallower than the depth of the ^{P +} region 17, ^{P +} is the side end face of the form area 17 ^{N +} form region 18
And the N ^{+ type} region 15 are adjacent to each other. Therefore, N
^The narrow depletion layer 23 can be stably formed in the ^{+ type} region 18.

[Modification] The present invention is not limited to the above-described embodiments, and the following modifications are possible, for example.

(1) The impurity concentration of the N ^{+ -type} region 18 as the third semiconductor region is set according to the required avalanche voltage, but as the first semiconductor region, the impurity concentration is set so that the effect of the present invention can be sufficiently obtained. The impurity concentration of the N-type region 15 is 5 times or more, preferably 10 times or more.

(2) P the N ^{++ type} region 16 in FIG. 1 as shown in FIG.
^The present invention can be applied to a semiconductor device having a PNP three-layer structure in which the ^{+ type} region 26 is replaced. Incidentally, in FIG. 4, the same parts as those in FIG. 1 are designated by the same reference numerals.

(3) instead of the first view of the N ⁺⁺ type region 19, N ⁺⁺ type region 19a shown in FIG. 5, may be provided 19b. The fifth
The N ^{++ type} region 19b in the figure is added to the N ^{++ type} region 16 by N ^++.
It is possible to obtain it by providing a buried layer having a rectangular shape and diffusing impurities in the buried layer into the N-type region 15.
In FIG. 5, the same parts as those in FIG. 1 are designated by the same reference numerals.

(4) It is also possible to omit the N ^{++ type} region 19b in FIG.

(5) As shown in FIG. 6, a P ^{+ type} region 29 may be provided instead of the N ^{++ type} region 19 of FIG. P ^{+ type} area 2
Since the depletion layer is not formed on the surface of 9, the depletion layer 24 can be prevented from extending to the outer peripheral side.

(6) The anode electrode 13 is it is sufficient extended to the middle of the upper N ⁺⁺ type region 19 may be extended to the entire surface or outer than this of N ⁺⁺ type region 19.

[Effect of the Invention] As described above, according to the present invention, it is possible to provide a semiconductor device having an avalanche breakdown type junction in which the fluctuation of the breakdown voltage is small.

[Brief description of drawings]

1 is a sectional view showing an avalanche diode according to an embodiment of the present invention, taken along the line I--I of FIG. 2, FIG. 2 is a plan view showing the surface of the semiconductor substrate of FIG. 1, and FIG. Is a diagram showing the distribution of the electric field intensity at the boundary portion between the N-type region, the P ^{+ -type} region and the N ^{+ -type} region of the avalanche diode of FIG. 1, and FIGS. 4, 5, and 6 are the avalanche of the modified example. FIG. 7 is a sectional view showing a diode in a portion corresponding to FIG. 1, and FIG. 7 is a sectional view showing a conventional avalanche diode. 11 ... Semiconductor substrate, 12 ... Insulating film, 13 ... Anode electrode, 14 ... Cathode electrode, 15 ... N-type region, 16 ... N ⁺⁺
Shape region, 17 ... P ^{+ type} region, 18 ... N ^{+ type} region, 19 ...
N ^{++ type} area.

Claims (2)

[Claims] 1. A first semiconductor region of a first conductivity type contained within a semiconductor body, and a second conductivity type opposite to the first conductivity type,
A second semiconductor region adjacent to the semiconductor region of the semiconductor substrate and exposed to the surface of the semiconductor substrate, and a first conductivity type having an impurity concentration higher than that of the first semiconductor region. A third semiconductor region which is adjacent to the first semiconductor region and is arranged so as to surround the second semiconductor region on the surface of the semiconductor substrate. A region of the first conductivity type having an impurity concentration higher than that of the third semiconductor region, the second conductivity type region being arranged so as to surround the third semiconductor region adjacently on the surface of the semiconductor substrate; A fourth semiconductor region formed so as to have a portion adjacent to the first semiconductor region, and at least the second semiconductor region and the third semiconductor region on the surface of the semiconductor substrate. An insulating film formed so as to cover the boundary portion of the second semiconductor region and the third semiconductor region, and electrically connected to the second semiconductor region directly or via another semiconductor region, and via the insulating film. A first main electrode extending at least above the third semiconductor region, and a second main electrode electrically connected to the first semiconductor region directly or via another semiconductor region. A semiconductor device having an avalanche breakdown type junction including a main electrode. 2. A first semiconductor region of a first conductivity type contained in a semiconductor body, and a second conductivity type opposite to the first conductivity type, the first semiconductor A second semiconductor region adjacent to the region and arranged to be exposed at the surface of the semiconductor substrate, and a region of the first conductivity type having an impurity concentration higher than that of the first semiconductor region. A third semiconductor region which is adjacent to the first semiconductor region and is arranged so as to surround the second semiconductor region adjacently on the surface of the semiconductor substrate; A first semiconductor region having a conductivity type and arranged so as to surround the third semiconductor region adjacently on the surface of the semiconductor substrate and having a portion adjacent to the first semiconductor region; 4 of the semiconductor region and the surface of the semiconductor substrate. An insulating film formed so as to cover at least the boundary portion between the second semiconductor region and the third semiconductor region and the third semiconductor region on the surface, and directly or in another semiconductor in the second semiconductor region. A first main electrode that is electrically connected via a region and extends at least above the third semiconductor region via the insulating film; and directly or separately from the first semiconductor region. A second main electrode electrically connected through a semiconductor region, and a semiconductor device having an avalanche breakdown type junction including: