JPH0642306B2 - VTR data recording method and data recording / reproducing method - Google Patents

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a VTR data recording method and a data recording / reproducing method, and more particularly to a magnetic tape for recording and reproducing a video signal and an audio signal by a VTR (magnetic recording / reproducing apparatus). The present invention relates to a method of recording data on position information and arbitrary comment information on a magnetic tape and a recording / reproducing method thereof.

2. Description of the Related Art The present inventor has filed a patent application (3) on the same date as the present application (invention title “VTR data recording / reproducing apparatus”) for household VT.
The duty cycle of the control pulse is changed and recorded on the control track according to the data on the position information of the magnetic tape used in R and arbitrary comment information, etc., and this is reproduced and displayed, and also random access is possible. The VTR data recording / reproducing device was proposed.

According to the data recording / reproducing apparatus of the VTR that is proposed,
Since a plurality of types of data are appropriately selected and recorded / reproduced on / from the control track, it can be constructed at a lower cost than a VTR that records / reproduces SMPTE time code, and the conventional method described in Japanese Utility Model Publication No. 57-34633. Compared with a VTR, it has excellent features such as arbitrary information can be freely recorded by extremely simple operation, random access is possible, and various uses can be performed.

Problems to be Solved by the Invention However, the control pulse has one frame period (1/30
Since the data is recorded at a variable duty cycle of the control pulse, the data transmission bit rate is extremely low at 30 bits / second, and multiple types of data are selected for control. In the above proposed apparatus for recording on a track, random information data having no continuity is recorded on a control track. For this reason, if there is a dropout during reproduction, there is usually no correlation with the data read in the past, so the dropout cannot be corrected and a malfunction occurs. Especially when fast-forwarding or rewinding a VTR,
Since the tape running is unstable, dropout is likely to occur, and there is a great risk of malfunction.

Therefore, according to the present invention, although the bit rate is low, the VT
An object of the present invention is to provide a VTR data recording method and a recording / reproducing method that effectively record R data and prevent malfunction even if dropout occurs.

Means for Solving Problems A data recording method for a VTR according to the present invention appropriately selects a plurality of types of data such as magnetic tape position information and comments of recorded information contents, and sets a constant period according to the value of the selected data. Is a method of varying the duty cycle of the control pulse and recording it on the control track, as a signal format in which a fixed pattern header and data capable of bidirectional data detection are arranged alternately in sequence.
The data having the same content is repeatedly recorded three times or more and sequentially recorded on the control track.

Further, the VTR data recording / reproducing method of the present invention detects and reproduces the data recorded on the control track as described above from the duty cycle of the reproduction control pulse, and reproduces the same contents of the data. It is configured such that the values of the data that are successively reproduced the same number of times as the number of times of repeatedly recording the data are compared, and the values of two or more identical data are reproduced and output as the values of the true data. .

The signal format in which the fixed pattern header and the data capable of bidirectional data detection are alternately arranged is used, and the duty cycle of the control pulse is changed (modulated) by the signal of the signal format. The control pulse thus obtained is recorded on the control track. In addition, the above-mentioned data having the same content is sequentially recorded three times or more repeatedly.

On the other hand, at the time of reproduction, the values of two or more pieces of data that are successively reproduced in the reproduction data are compared, and the values of two or more pieces of data that have become the same are output as the value of the true data.

Embodiment FIG. 1 shows an embodiment of the signal format of each data recorded and reproduced by the method of the present invention. The present invention is a method of properly selecting a plurality of types of data, varying the duty cycle of a control pulse having a constant cycle according to the value of the selected data, recording the control track on the magnetic tape, and further reproducing. Fig. 1 (A)-(C) shows 3
The signal format of the type data is shown.

FIG. 1 (A) shows a signal format of an embodiment of address data. In the figure, 1-1 to 1-4 are 11-bit headers, for example, the value of 2 bits of the most significant bit (MSB) and the least significant bit (LSB) is "0", and the remaining second bit. It is a fixed pattern signal in which the values of 9 bits from to 10th bit are "1", respectively. Header 1-
4 bits x 4 digits of address information data 2 after 1 to 1-3
-1 to 2-3 are arranged.

Each of the address information data 2-1 to 2-3 is “thousand”,
Numerical value of each digit of "hundred", "ten" and "one" is 4-bit B
It is a total of 16 bits of data represented by a CD code. Among them, the 4 bits of the most significant "thousand" digit are arranged in the 4 bits immediately after the headers 1-1 to 1-3, and the value is any value from "0" to "9". It takes a value of "10" to "15" in decimal (that is, "A" to "F" in hexadecimal). 1-1 ~
It is detected that the 4-bit value immediately after the header indicated by 1-3 etc. is neither the hexadecimal value "A" nor "B" of the identification signal, which will be described later. In, it is possible to identify that the reproduction data is address information data.

This address information data is an arbitrary address entered from the keyboard, for example, "0100", "0175", "021".
Even if the data is random data such as "0", "1500", "2000", there is a fixed address information having continuity from the beginning of the tape (for example, "0010", "0020",
"0030", ...) may be used.

In this way, the address data is composed of 11-bit header and 16-bit address information data in 27-bit units, which are time-sequentially combined and recorded and reproduced.

Next, FIG. 1 (B) shows a signal format of an embodiment of character (comment) data. In the figure, 3-1 and 3-2
Are 11-bit fixed pattern headers, and their values are the same as the values of the headers 1-1 to 1-4 shown in FIG. Identification signals 4-2 and 4-3 whose hexadecimal value is selected as "A" are arranged in the 4 bits immediately before and 4 bits immediately after the header 3-2, as indicated by A _H. Yes (the same applies to other headers such as the head 3-1). With this identification signal, it is possible to identify that the reproduction data is character data in the reproduction system described later.

4 bits immediately after the header 3-1 include the above identification signal 4-
1 is arranged, and thereafter, a total of 10 pieces of 6-bit character information data D _{0 to} D ₉ and a 4-bit identification signal 4 are arranged.
-2 are sequentially arranged. The character information data D ₀ ~
Each D ₉ is a compression of 8 bits of the ASCII code into 6 bits by using only a part of the ASCII code (for example, 59 characters from space SP to uppercase Z). It is smaller than the existing ASCII code.

The identification signal is arranged not only immediately after the headers 3-1 to 3-2 etc. but also in the immediately preceding 4 bits as shown by 4-2.
This is because the bit rate of this character data is higher than that of the other two types of data, so that the reproduction system immediately identifies that the character data is character data not only during fast-forwarding but also during rewinding.

In this way, the character data consists of an 11-bit header, two 4-bit identification signals, and 60 bits (= 6 bits x 10).
The 79-bit character information data is combined and recorded and reproduced in time series.

Next, FIG. 1 (C) shows a signal format of an embodiment of special function data. In the figure, headers 5-1 to 5-4 are headers 1-1 to 1-3 and 3-shown in FIGS. 1 (A) and (B).
It is a signal of an 11-bit fixed pattern, which is selected to have the same values as 1 and 3-2, respectively. The 4 bits immediately following the header 5-1 to 5-4 as shown in each _{B H,} 4-bit identification signal hexadecimal value is selected in the "B" 6-1 to 6-4
Has been placed. Next 12 of the identification signals 6-1 to 6-3
In the bits, special function information data 7-1 to 7-3 having 3 digits of 4 bits of BCD code are arranged. It can be identified in the reproducing system that this data is the special function data by the above identification signals 6-1 to 6-4.

In this way, the special function data consists of an 11-bit header and 4
A 27-bit unit consisting of a bit identification signal and 12-bit special function information data is time-sequentially combined and recorded and reproduced, but a 16-bit 16 bit consisting of the identification signal and special function information data immediately after the header. The following table shows an example of the values in radix and the contents of the corresponding special functions.

In the above table, skip is a mode in which the recording section from the start point to the end point is automatically fast-forwarded and not played back. For example, after recording a television broadcast signal, a commercial broadcast period (recording period) It is used when skipping the reproduction of.

The above three types of data are appropriately selected and arbitrarily recorded by the user of the VTR, but the present invention is characterized in that data of the same content is repeatedly recorded three times or more times selected.

2 (A) and 2 (B) show recording patterns of one embodiment of the control track recorded by the method of the present invention. Fig. 2
(A) shows a pattern in which the address data 8 is repeatedly recorded with the same contents three times on the control track, and then the special function data 9 is repeatedly recorded three times with the same contents. Further, FIG. 2B shows a pattern in which the character data 10 is repeatedly recorded three times on the control track with the same contents. In FIGS. 2 (A) and 2 (B), the shaded portion indicates the header, and indicates the identification signals whose values in hexadecimal are “A” and “B”, respectively.

Next, a recording / reproducing apparatus for realizing the method of the present invention will be described. FIG. 3 shows an overall configuration diagram of an example of the data recording / reproducing apparatus. In the figure, as will be described later, a VTR 11 has a built-in one-chip microcomputer (microcomputer) 12, a read / write circuit 13, a character generator 14, etc., and a display panel surface other than a display unit 15 similar to a normal VTR. A data recording / reproducing operating section 16 and a character output on / off switch 17 are added to the above, and a keyboard 18 is further connected. Also,
The VTR 11 is provided with a lid 20 and the like that opens and closes when the tape cassette is inserted and removed as in a normal VTR.

Further, the VTR 11 outputs the reproduced output video signal and audio signal and the data to be recorded and reproduced to the monitor television 21 via the cable 19.

The comment on-screen switch 28 in the data recording / reproducing operation unit 16 is a switch for switching the display of the screen 29 of the monitor TV 21, and is on (ON) and off (OF).
F) and scroll (SCROLL) are connected to any one of three switch switching positions,
When it is in the "ON" position, the characters "KEY IN" and "T" are displayed at the bottom of the screen 29 of the monitor TV 21.
"APE OUT" is displayed on the right side of the same line as "KEY IN" is displayed.
The key input display of characters and the comment of 10 characters reproduced from the control track as described later are displayed as "TA".
"PE OUT" is displayed on the right side of the same line as the character display (this display mode is hereinafter referred to as "two-line display mode").

In addition, the comment on-screen switch 28 is set to "OF
When it is in the position of "F", the characters are not displayed and "S" is displayed.
When it is in the position of “CROLL”, one line per line is within the range 22 surrounded by the chain double-dashed line on the screen 29 of the monitor TV 21.
With 0 characters, a total of 9 lines of characters are displayed (this display mode is hereinafter referred to as "scroll display mode"). In the scroll display mode, the display in the two-line display mode is not performed.

Next, regarding the configuration and operation of the main part of the VTR 11,
A description will be given together with the block system diagram shown in the figure. In FIG. 4, the same components as those in FIG. 3 are designated by the same reference numerals. In this embodiment, there are four kinds of data that can be recorded, and the switch SW ₁
According to the configuration, only one of them is selected by the "SKIP" and "ADDRES" of the microcomputer 12.
When a low level signal is applied to the input ports indicated by "S", "COMENT" and "INDEX", the special function data, the address data, the character data and the index signal are recorded. Here, the index signal is a signal in which a constant value is repeated a certain number of times and is used for relative cue reproduction.

In the recording mode, the microcomputer 12 determines the data to be recorded by the signal from the switch SW _1, and according to the data to be recorded from the keyboard 18 or the like, as shown in FIG.
Data is generated and output in a predetermined format as shown in (C).

If the microcomputer 12 determines that the signal to be recorded is an index signal, and if it determines that the signal to be recorded is an address code, then the microcomputer 12 or the character key in the operation unit 16 is used to enter the address. After storing the code in the data memory (RAM), VTR
When it is determined that is the reproduction mode, it is determined whether the comment rewriting key 27 is pressed. The comment rewriting key 27 is pressed by the user when the user sets the VTR in the reproduction mode and detects the start position of the place where the data is to be recorded by monitoring the reproduced image on the monitor TV 21.

When the microcomputer 12 detects that the comment rewriting key 27 has been pressed, the duty cycle of the control pulse is changed bit by bit according to the format of the recording data, in phase synchronization with the reference pulse of the subsequent reproduction control pulse. The read / write circuit 13 is caused to perform the operation, and the state is continued until the recording data is completed.

Next, the data recording operation in the reproduction mode will be described with reference to FIGS. 4 and 5 (A) to (F). A recorded magnetic tape for recording data is stored in a tape cassette and loaded in the VTR 11, but during normal reproduction, the magnetic tape is pulled out from the cassette and is rotated at a predetermined angle to a rotating body to which a rotary head is attached. The tape is loaded into a predetermined tape path that is wound diagonally over the range (loading state), held by a capstan and a pinch roller, and run, and the control reproduced by the control head 34 shown in FIG. The pulse is used as a reference signal of the phase control system of the head servo circuit for keeping the rotation phase of the rotary head constant or as a comparison signal of the phase control system of the capstan servo circuit for keeping the rotation phase of the capstan constant. It is well known that it is used.

Here, while the reproduction control pulse is a square wave as the control pulse at the time of recording, it is differentiated by the differential characteristics of the head, and becomes a positive pulse at the rising edge of the recording square wave, and a negative pulse at the falling edge. Is reproduced with a waveform as shown by a in FIG. 5 (A), but only the positive polarity pulse of the reproduction control pulse a is used as a control pulse in each servo circuit,
The negative pulse is not used in the servo circuit.

In this case, the recorded magnetic tape is reproduced, and the positive control pulse used in the servo circuit (referred to as “reference pulse” in this specification) is normally supplied to normally operate the servo. Since it is necessary to change the duty cycle of the control pulse according to the recording data while performing the recording, the re-recording (erasing) in the reproduction period of the reference pulse and some periods before and after it is prohibited, and In order to erase the section between adjacent reference pulses and re-record (rewrite) the signal such that the reproduction control pulse has a negative polarity, the microcomputer 12 is shown in FIG. 5 (B).
Is applied to the switch circuit 33 as a switching pulse, and this is turned on only during the high level period.

At the same time, the microcomputer 12 outputs its output port RE.
From CCTL1 to the recording control circuit 31, as shown in FIG. 5 (C), a period which rises at the rising edge of the pulse b and which corresponds to the value of each bit of the data to be recorded (however, during this period, the pulse b A pulse c that falls at a time point that is less than the high level period) is generated and output, and the recording control circuit 3 is output from its output port RECCNT2.
As shown in FIG. 5 (D), it rises at the time of the falling edge of the pulse c and falls just before the falling edge of the pulse b so that the negative polarity pulse of the reproduction control pulse a can be erased. Generates and outputs pulse d.

The pulses c and d are the recording control circuit 31, the drive amplifier 3
2, is supplied to the control head 34 through the switch circuit 33, respectively, and is supplied to the control head 34 as shown in FIG.
A recording current e as shown in FIG. The recording current e flows in the positive direction during the high-level period of the pulse c, and flows in the negative direction during the high-level period of the pulse d, but the period during which the pulses c and d are both at the low level and the low period of the pulse b during which the switch circuit 33 is off. It does not flow during the level period.

As a result, the reference pulse of the reproduction control pulse a remains unchanged, the negative polarity pulse is erased by the positive or negative recording current e, and the negative polarity pulse is changed at the time when the recording current e changes from the positive direction to the negative direction. It will be newly recorded. This operation is repeated until the recording of all the bits of the recording data is completed. When the recorded magnetic tape thus recorded is reproduced thereafter, the reproduction control pulse waveform becomes as shown in FIG. 5 (F).

This reproduction control pulse has a cycle of 1 frame,
Moreover, the reference pulse position is the same as the original reproduction position before the data recording, but the duty cycle is the first value when one bit of the recording data is "1" (for example, the positive pulse and the negative pulse). The pulse interval with the sex pulse is 27.5% of one frame), and the second value (for example, the pulse interval is 60% of one frame) when 1 bit of the recording data is "0", Further, when no data is recorded, the duty cycle of the control pulse is recorded / reproduced so as to have the same second value as in the conventional case. Also, the same data value is repeatedly recorded three times in a predetermined signal format.

When a low level signal is applied to the input port INDEX by the data select switch SW ₁ , the control pulse is continuously recorded a fixed number of times with a preset short duty cycle, and this becomes the index signal.

Data can be recorded in the VTR recording mode. In this case, the pulse width of the recording control pulse, which is a square wave of one frame period, is recorded according to the recording data. Even in this recording mode, after waiting for the comment rewriting key 27 to be pressed, V
The recording of the TR data can be easily performed by changing the software of the microcomputer 12.

Next, the cueing operation based on the data written as described above will be described. The cue can be performed in any of the loading state (playback, forward / reverse search) and the unloading state (fast forward, rewind). When the microcomputer 12 finds the beginning, first the comment on-screen switch 28
Detects whether the switch is in the "ON" switch position ("O"
When the switch position is "N", the switch circuit 28a in FIG. 4 is turned on. When the switch position is "ON", a comment for the cue input from the keyboard 18 (or the character key) is displayed. The character is generated by the character generator 14 and stored in the internal memory (RAM).

The output signal of the character generator 14 is a VTR.
In the screen 29 of the monitor TV 21, the video signal reproduced from the recorded magnetic tape by 11 and input to the input terminal 44 shown in FIG. 4 is added by the adding circuit 43 and then output through the output terminal 45. To display.

After that, the microcomputer 12 sets the VTR 11 to the fast-forward or rewind mode, reads the recorded data from the duty cycle of the control pulse reproduced from the control track during the mode, and compares it with the input data stored in the memory. Then, when the two coincide with each other twice or more, the VTR is set to the reproduction mode and then the desired reproduction mode is entered.

Here, the reading of recorded data will be described. In the fast-forward or rewind mode, the recorded magnetic tape is allowed to run at a high speed while being stored in the tape cassette. Can not be played. However, in the fast-forward or rewind mode, the MR head 39 is arranged so as to slide on the back side of the recorded magnetic tape housed in the tape cassette and on the back side of the control track. Therefore, the control pulse is reproduced by the MR head 25 and passed through the amplifier 40 shown in FIG.
1 is supplied.

The Schmitt trigger circuit 41 rises when a positive polarity pulse of the reproduction control pulse g as shown in FIG.
A pulse h as shown in FIG. 6 (B) that falls when a negative polarity pulse comes in is generated, and this pulse h is connected to the terminal UNLOAD side by the switching signal from the terminal 38 in the fast forward and rewind modes. It outputs to the microcomputer 12 through the switch circuit 37 which exists. On the other hand, as shown in FIG. 6 (C), the timing generator 42 rises at the timing of the duty cycle intermediate between the maximum duty cycle and the minimum duty cycle of the reproduction control pulse g and at the timing of the reference pulse. Generate a timing pulse i which is made to fall.

By latching the pulse h at the rising edge of the timing pulse i, the microcomputer 12 fetches the detection data as shown in FIG. 6 (D) and then formats it with hardware or software to write the written data. The data is read out, and when the same value continues twice or more as described later, it is output as a true value through the character generator 14, the addition circuit 43, and the output terminal 45, and is displayed on the monitor television 21. In the scroll display mode (at this time, the switch circuit 28b in FIG. 4 is on), substantially the same operation is performed.

Next, the circuit configuration and operation, which are the essential parts of the reproducing system of the present invention, will be described with reference to FIG. In the figure, the same components as those in FIG. 4 are designated by the same reference numerals. In FIG. 4, the microcomputer 12 determines whether or not the three data to be reproduced subsequently have the same value. In FIG. 7, this is configured by hardware. The reproduction control pulse input to the terminal 50 is supplied to the timing generator 42 while being applied to the data input terminal of the D flip-flop 51, where the timing generator 42 outputs the signal as shown in FIG. 6 (C). It is latched at the rising edge of pulse i. As a result, from the Q output terminal of the D flip-flop 51, as shown in FIG.
Playback data as shown in (D) is taken out serially,
The 15-bit shift register 52 and the 64-bit shift register 53 are sequentially serially input. As the shift clock CK of the shift registers 52 and 53, a clock from the timing generator 42 in phase with the reference pulse is used.

When the upper 11 bits of the 15-bit data temporarily stored in the 15-bit shift register 52 become the above-mentioned header, the header detection circuit 54 detects the header of a known 11-bit fixed pattern. The detection signal passes through the AND circuit 56 and the latch circuit 57,
It is applied to 58 and 59 as a latch pulse, respectively. In addition, 1 is temporarily stored in the 15-bit shift register 52.
Of the 5-bit data, the lower 4-bit data is supplied to the identification signal detection circuit 55. Identification signal detection circuit 5
Reference numeral 5 outputs a high level signal only when the 4-bit value of the input signal is "A" in hexadecimal notation, and outputs a low level signal otherwise.

Since the latch circuit 57 latches the output signal of the identification signal detection circuit 55 when the header detection circuit 54 detects the header, the latch circuit 57 latches the 4-bit identification signal or data arranged immediately after the header. Become.
Therefore, when the reproduction data is the character data described above, a high level signal is taken out from the latch circuit 57, and a low level signal is taken out in the case of address data or special function data. This output signal is Output terminal 7
8 is output as a flag to the data selector 6
4, 65, 71, 72 and 75 are applied as select signals.

On the other hand, the 64-bit data output in parallel from the 64-bit shift register 53 is supplied to the latch circuit 58, the lower 16 bits thereof are supplied in parallel to the comparators 60 and 62, and the upper 48 bits are connected in parallel. It is supplied to the comparators 61 and 63, respectively. As described above, since the latch circuit 58 is supplied with the latch pulse synchronized with the clock immediately after the header detection time, the 64-bit data that has arrived immediately before the header detection time by the header detection circuit 54 is supplied to the latch circuit 58. It will be latched when the latch pulse arrives. Also, the latch circuit 5
64-bit parallel output data from the latch circuit 58 is supplied to the latch circuit 9 and latches at the time when the latch pulse is input from the AND circuit 56.

Therefore, when the header detection circuit 54 detects the first header, the 64-bit shift register 53 temporarily stores the 64-bit data immediately before the detected first header, and the latch circuit 58 stores the first data. 64 bits of data immediately before the second header that came in (past) one header before is stored temporarily.
Is the third that came two bytes before (past) the first header.
The 64-bit data immediately before the header is temporarily stored, and from that state, the storage content of the 64-bit shift register 53 is immediately transferred to the latch circuit 58 in synchronization with the clock CK. The stored contents are transferred to the latch circuit 59.

On the other hand, the output signals of the comparators 60 and 62 are supplied to the comparators 61 and 63. Therefore, the comparators 60 and 61 parallel the 16-bit and 64-bit data immediately before the second header detected immediately before the first header detected by the header detection circuit 54 with the 64-bit shift register 53. It is detected whether or not the lower 16 bits of the output 64-bit data and the data of all 64 bits match, and the comparators 62 and 63 detect the third bit detected two bits before the first header. 16-bit and 64-bit data immediately before the header of, and the lower 16-bits of the parallel output 64-bit data of the 64-bit shift register 53 and all 64-bit data are detected. Become.

When the values of both input data match, the comparators 60 to 63 output, for example, a high-level match signal. The data selector 64 is supplied with the output signals of the comparators 62 and 63, respectively, selectively outputs the output signal of the comparator 63 when the select signal from the latch circuit 57 is high level, and outputs the output signal of the comparator 62 when the select signal is low level. Is output selectively. Further, the data select 65 selectively outputs the output signal of the comparator 61 when the select signal is at the high level, and selectively outputs the output signal of the comparator 60 when at the low level. That is, at the time of address data reproduction or special function data reproduction, each output signal of the comparators 60 and 62 indicating the match / mismatch of 16-bit data immediately before the header is selectively output, while at the time of character data reproduction, 64 bits immediately before the header are output. The output signals of the comparators 61 and 63 indicating the match / mismatch of the data and the identification signal are selectively output.

The exclusive OR circuit 66 is supplied with the output signals of the data selectors 64 and 65, respectively, and when all three data to be reproduced subsequently are equal (comparators 64 and 65).
When the coincidence signal is extracted from both) and when they are not all equal, the low level signal is selected and output, and when two out of the three data reproduced subsequently are equal, the high level signal is output. Output level signal. J
In the -K flip-flop 67, the output signal of the exclusive OR circuit 66 is supplied to its J terminal, the signal from the data selector 72 is supplied to its K terminal, and its Q output terminal outputs the AND circuit 73 and the counter 68. A signal is output to the load terminal and each clear terminal of the counters 69 and 70. J-
A clock pulse CK is output from the Q output terminal of the K flip-flop 67 immediately after the J terminal becomes high level.
A pulse that becomes high level is taken out from the time when one pulse comes in.

The counters 68 to 70 do not operate when the output signal of the exclusive OR circuit 66 is low level, and count the clock pulse CK when it is high level. Counter 68
Supplies the signal at that time to the data selector 71 and the counter 69 every time the clock pulse CK is counted 6 times. Further, the counter 69 supplies a signal of a predetermined level to the data selector 72 every time the clock pulse CK is counted 9 times.
Further, the counter 70 outputs a signal of a predetermined level to the data selectors 71 and 72 each time the clock pulse CK is counted seven times.

Based on the output signal of the latch circuit 57, the data selectors 71 and 72 selectively output the output signals of the counters 68 and 769 when reproducing the character data, and selectively output the output signal of the counter 70 when reproducing the special function data or address data. The output signal of the data selector 71 is logically ANDed with the Q output signal of the JK flip-flop 67 by the AND circuit 73 and then output to the output terminal 77 through the OR circuit 74. As a result, the read clock CKO is taken out at the output terminal 77 at a rate of once every six shifts by the shift registers 52 and 53 during character data reproduction, and eight shifts are carried out during special function data or address data reproduction. The read clock is taken out once every time it is performed.

On the other hand, the data selector 75 is 64 when reproducing character data.
In the output signal of the bit shift register 53, and outputs the most past stored the 64 bit (upper 1 bit) data from the 6-bit data of the data up to 59 th bit to the output terminal 76 ₁ to 76 _6, On the other hand, during reproduction of special function data or address data, in the output signal of the 64-bit shift register 53, the 8-bit data portion that is half of the 16-bit data from the 16th bit to the 9th bit is output terminals 76 ₁ ...
And outputs it to the 76 _8.

As described above, in the present embodiment, the match signal is extracted from the data selector 65 when the first two of the three data to be reproduced subsequently are equal, and the data selector 64 when the first and third data are equal. The coincidence signal is further extracted, and in any case, the read clock is output to the output terminal 77. On the other hand, the read clock is not output when all three data are equal or when all three are not equal. This is because the read clock has already been output before all three data match. In this way, even if there is a dropout,
The effect of dropout can be greatly reduced and correct data output can be obtained.

Next, the read clock from the reproduction data and output terminals 77 and 78 which are output from the output terminal ₇₆ 1 to 76 _8,
An example of the operation of the microcomputer to which the flag pulse is supplied will be described with the flowchart shown in FIG. 8th
Illustrated flowcharts showing the processing operation when the special function data reproduction, the microcomputer fetches the data obtained in as described above (Step S _1), separating a header and data of the input special function data (Step S _2), to separate the 4-bit data immediately after the header detecting whether the value is in hexadecimal or "B" (step S _3, S _4).

As described above, the value of the identification signal is special function data,
Because it is "B", when it detects the value "B", then the microcomputer is the value of the next 16 bits of the header to detect whether the "B001" or "B002" (step S _5, S _6).
As shown in the above table, "B001" indicates "start of skip". Therefore, the microcomputer is a separate VTR mechanism control microcomputer (mechanical control unit).
Then, a control signal for FF search (high-speed fast-forward search) is sent (step S ₆ ). On the other hand, when the "B002", since indicates "End skip", and the VTR transmits a control signal to the play mode for the mechanical control (Step S _8).

It should be noted that the present invention is not limited to the above embodiment, the number of times of repeatedly recording the same data may be four or more, and the number of data for detecting the coincidence of the same data may be three or more.

EFFECTS OF THE INVENTION As described above, according to the present invention, arbitrary comment (character) information, address information, and special function information can be effectively recorded despite the low bit rate, and reproduction control pulse drop can be performed. Even if there is an out, the malfunction due to it can be significantly reduced, and even if it is accidentally erased at the time of rewriting the data, by detecting the signal between the headers, this can be detected and the malfunction can be prevented. Also, the character information has a larger number of used bits than the address information and the special function information, but since the identification signals are provided before and after the header,
Character information can be detected immediately not only during fast-forwarding but also during rewinding, and the detection circuit, etc. can be easily configured, and multiple types of data can be selectively recorded on the control track instead of the video signal track. Therefore, it is extremely easy to turn on and off the on-screen, and either during forward running of the magnetic tape (for example, fast-forward search) or backward running on the magnetic tape (for example, rewind search). It is possible to reliably detect the data by checking the recording position of the data with the fixed pattern header as a mark even from the traveling direction (bidirectional) of the data, and to be able to detect the data bidirectionally in the first place. The header of the fixed pattern and the data that cannot identify the data from both directions are arranged alternately one after another. In the conventional method using the No. format, the data cannot be identified by using the header of the fixed pattern as a mark unless the recording medium is run in one direction (it is correct if the recording medium is run in the opposite direction and data is detected. Any part of the recording medium (especially the beginning part,
Even in the case of data recorded at the end portion, the direction of travel of the magnetic tape suitable for the recording position of the data (the magnetic tape travels in the forward direction at the start end portion of the recording medium, and at the end portion of the recording medium). By selecting the running direction of the magnetic tape so that the magnetic tape runs in the opposite direction, it has various features such as being able to reliably identify and detect the data in the shortest time. is there.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a diagram showing each embodiment of a signal format of data recorded and reproduced by the method of the present invention, and FIG. 2 is one embodiment of a recording pattern of a control track recorded by the present invention. FIG. 3 is a diagram showing an example, FIG. 3 is an overall configuration diagram of an example of a recording / reproducing apparatus capable of realizing the present invention, FIG. 4 is a block system diagram of an example of a main part in FIG. 3, FIG. 5 and FIG. FIG. 7 is a signal waveform diagram for explaining the operation of the block system shown in FIG. 4, respectively. FIG. 7 is a circuit system diagram showing one embodiment of the essential part of the reproducing system of the present invention,
The drawing is a flow chart showing an embodiment of the processing operation at the time of data reproduction of the present invention. 1-1 to 1-3, 3-1 to 3-2, 5-1 to 5-4 ...
Header, 2-1 to 2-3 ... Address information data, 4-1 to 4-1
4-3, 6-1 to 6-4 ... Identification signal, 7-1 to 7-3
…… Special function information data, 11 …… VTR, 12 …… 1
Chip microcomputer (microcomputer), 13 ... Read / write circuit, 14 ... Character generator, 16 ...
… Data recording / playback operation unit, 18 …… Keyboard, 21
... monitor TV, 34 ... control head, 50
...... Playback control pulse input terminal, 52, 53 ……
Shift register, 57 to 59 ... Latch circuit, 60 to 6
3 ... Comparator, 76 _{1 to} 76 ₈ ... Reproduction data output terminal.

Claims (2)

[Claims] 1. A plurality of types of data such as position information of a magnetic tape on which a video signal is recorded and reproduced by a VTR and comments of recorded information contents are appropriately selected, and a control pulse of a constant cycle is generated according to the value of the selected data. A VTR data recording method of varying the duty cycle for recording on the control track of the magnetic tape, wherein a fixed pattern header and the data capable of bidirectionally detecting the data are alternately arranged. A data recording method for a VTR, characterized in that, as a signal format, data of the same content is repeated three times or more and sequentially recorded on the control track. 2. A plurality of types of data such as position information of a magnetic tape on which a video signal is recorded and reproduced by a VTR and comments of recorded information contents are appropriately selected, and a control pulse of a constant cycle is generated according to the value of the selected data. A data recording / reproducing method of a VTR in which a duty cycle is changed and recorded on a control track of the magnetic tape, and the data is detected and reproduced from a duty cycle of a reproduction control pulse of the control track during reproduction. As a signal format in which the header and the data capable of bidirectionally detecting the data are alternately arranged, data of the same content is repeated three times or more and sequentially recorded on the control track, and at the time of reproduction. Of the data detected and reproduced from the reproduction control pulse, the same It is configured such that the values of the data successively reproduced the same number of times as the number of times of repeated recording of the capacity data are compared with each other, and two or more identical data values are reproduced and output as a true data value. Characteristic V
TR data recording / reproducing method.