JPH0642239B2 - Common memory control method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Overview] Regarding a common memory control method in a duplex system, a conventional check point method solves the problem that basically the data being input is invalid at the time of one-sided abnormality. In order to do so, a common memory accessible from both systems is utilized, and a means for confirming the normal end of data input is added to the common memory, so that the input data can be continuously used.

[Industrial application field]

The present invention relates to a common memory control system in a duplex system. INDUSTRIAL APPLICABILITY The present invention is particularly effective when applied to cases where erasure and reentry of data input has a great influence on the system.

[Conventional technology]

When an abnormality occurs in the system in terms of both hardware and software, in the duplicated system, after switching the system, the process is continued by going back to the check point recorded in advance. Therefore, if there is input data during this period, re-input is required.

[Problems to be Solved by the Invention]

In the case of experimental data or the like, it is highly transient and re-entry is impossible, or even if it is possible, enormous cost may be required, which is a serious problem.

The present invention was created in view of this point, and a common memory is provided in a redundant system, and the common memory can be used to effectively use data even in the case of one-sided abnormality. The purpose is to provide a control method.

[Means for Solving the Problems]

Even if an abnormality occurs in the system, if it is not a hardware abnormality in the data input system, it is often possible to continuously accept the data acquisition. According to the present invention, in the case of a duplex system, even if the system is switched, the shared memory that can be continuously accessed from the switched system is used to take over the data. However, in this case, an important point is that the data input can be normally confirmed only by the common memory itself. The present invention addresses this by providing a reference flag for each data unit in the common memory.

The duplex system of the present invention comprises an A-type computer system,
It is provided with a B-system computer system, a common memory 300, an input / output device 600, and a changeover switch 500.

The A-system computer system has a central processing unit 100A and a memory 20.
The B-type computer system has an 0A and an input / output control device 400A, and a central processing unit 100B, a memory 200B, and an input / output control device 400B. The changeover switch 600 connects the input / output device 600 to either one of the input / output control device 400A and the input / output control device 400B. The common memory 300 has a reference flag provided for each predetermined data unit, and is configured so that the reference flag becomes “1” when accessed under the state where the reference flag is “0”. . The common memory 300 is
It is accessible from both the A system computer system and the B system computer system.

When attempting an input / output operation, the main computer system allocates the area allocated as the input / output data area, the area allocated as the boot data storage area, and the area allocated as the boot result report area in the common memory 300. Notify the conventional computer system, common memory 30
The reference flag “0” of 0 is set and the start data is set to the common memory 300.
It is configured to be stored in the startup data storage area of and to be activated by sending the startup data to the input / output control device of the own system.

When the input / output control device receives the input / output activation instruction, the input / output control device is configured to perform the input / output control operation and store the activation result report in the activation result report area of the common memory 300 when the input / output operation is completed.

When the subordinate computer system detects an abnormality in the main computer system, the subordinate computer system refers to the boot data storage area of the common memory 300 to read the boot result report area, and determines that the boot result indicates normal termination. In case of common memory 30
The input / output data area of 0 is used to continue the operation as the redundant system.

〔Example〕

FIG. 2 is a block diagram of an embodiment of the present invention, FIG. 3 is a block diagram showing a configuration example of a common memory control unit, and FIG. 4 is a diagram showing a layout example of a common memory. In the figure,
100A and 100B are central processing units, 200A and 200B are memory, 300
Is a common memory, 310 is a common memory control unit, 311 is a control register, 312 is a microprocessor, 320 is a common memory memory unit, 400A and 400B are input / output control devices, 500 is a changeover switch, and 600 is an input / output device. Shown respectively. ,, ... Show the operation sequence.

Central processing unit 100A, memory 200A and input / output control unit 40
0A constitutes a computer system of A system, and the central processing unit 100B, the memory 200B and the input / output control device 400B constitute a computer system of B system. The central processing unit 100A monitors the state of the central processing unit 100B, and similarly, the central processing unit 100B monitors the state of the central processing unit 100A. The common memory 300 is shared by the A system and the B system.
The common memory 300 is composed of a control unit 310 and a memory unit 320. The control unit 310 has a control register, a microprocessor, a control memory and a common memory clear circuit. As shown in FIG. 3, the control register 311
Stores status, commands and command details. The memory section 320 has a layout as shown in FIG. That is, the memory unit 320 has an input / output data area, a boot data storage area for the input / output control device, and a boot result report area for the input / output control device. Further, a reference flag is provided for each data unit of a predetermined length. The specifications of the reference flag are as follows.

When there is an access (either read / write) from the system in the state of "0", it changes to "1".

There is at least one reference flag for each byte. Whether to use one every two bytes depends on how the system memory is used.

From the control unit of the common memory, "1" or "0" can be confirmed for each reference flag.

It becomes "0" at power-on. However, the control unit of the common memory may be caused to perform the function of.

The control unit 310 of the common memory specifies (a) the address and sets the reference flag corresponding to the address to "0".

(b) Specify an address range and check the reference flag corresponding to that range that is "1".

It has functions such as. I / O controller 400A and 40
0B can access the common memory 300. The input / output control devices 400A and 400B transfer the result report to the activation result report area when the operation is completed. The address of the activation result report area is specified at the time of activation. The changeover switch 500 connects the input / output device 600 to the input / output control device 400A or 400B.

The operation of the embodiment of FIG. 2 will be described for the case where the A system is the main system, the B system is the slave system, and data is input.

How to use (layout) in common memory is A system and B
Understand among the families.

When the cause of activation occurs in the A system, the common memory control unit is instructed to set the reference flag of the area in the common memory to be used to "0". The targets are the boot data storage area, the boot result report area, and the input / output data area.

The start data is written from the A system to the common memory.

Start the input / output control device from the A system. The start data at this time is the same as the start data of.

Data input begins from the I / O controller.

Here, it is assumed that an abnormality has occurred in the A system.

The B system takes over the system control right of the A system.

The B system causes the common memory control unit to search for the portion of the reference flag “1” in the start data storage area that is understood in advance.
Get the address of "1".

The common memory control unit is caused to confirm the reference flag of the activation result report area based on the data of.

In the case of "0", after a certain period of time (it is better to store it in the startup data saving area in advance at the time of startup), check again. Therefore, if it is "1", proceed to the processing of "1" below.
If it is "0", the input system in the A system has also failed, so
Abandon the transfer of input data.

When the value is "1", the contents of the activation result are confirmed. If the process ends normally, the process advances to, and if the process ends abnormally, the input data transfer is abandoned.

Check with the reference flag whether or not data of the specified length is input for confirmation.

The B system instructs the control unit of the common memory to set the related reference flag to "0".

Refer to the entered data and continue processing as a system. Note that the changeover switch is changed over after the process is completed.

The above is a description of data input, but the same can be applied to data output. However, since the data itself to be sent is in the common memory, even if the output system hardware fails in the faulty system, it can be retransmitted in the new system.

〔The invention's effect〕

As is clear from the above description, according to the present invention, even if the system that is activated by input / output fails before the operation is completed, the data can be made valid as long as the data input system does not fail. This is effective when receiving data that is difficult to retransmit, and can enhance the reliability of the system.
Another advantage is that the hardware required for this purpose is concentrated on only one member, the common memory, and it is not a method of modifying various elements little by little.

[Brief description of drawings]

1 is a principle diagram of the present invention, FIG. 2 is a block diagram of an embodiment of the present invention, FIG. 3 is a block diagram of a configuration example of a common memory control unit, and FIG. 4 is an example of a layout of a common memory. FIG. 100A and 100B ... Central processing unit, 200A and 200B ... Memory,
300 …… Common memory, 310 …… Common memory control unit, 311
...... Control register, 312 ...... Microprocessor, 320 ...
… Memory section of common memory, 400A and 400B …… I / O control device, 500 …… Changeover switch, 600 …… I / O device.

Claims (1)

[Claims] 1. An A-type computer system having a central processing unit (100A), a memory (200A) and an input / output control unit (400A), a central processing unit (100B), a memory (200B) and an input / output control unit ( B type computer system having 400B), input / output device (600), and changeover switch for connecting the input / output device (600) to either the input / output control device (400A) or the input / output control device (400B) (500)
A reference flag is provided for each data unit of a predetermined length, and the reference flag is set to "1" when accessed under the state of the reference flag being "0". In a redundant system that has a common memory (300) that can be accessed from both B and B computer systems, the main computer system allocates it as an input / output data area in the common memory when performing an input / output operation. The specified area, the area allocated as the boot data storage area, and the area allocated as the boot result report area to the subordinate computer system, and the common memory (300)
The reference flag of is set to "0" and the startup data is set to the common memory (3
00) is stored in the start data storage area, and the start data is sent to the input / output control device of the own system to start up.When the input / output control device (400A, 400B) receives the input / output start instruction, It is configured to perform input / output control operation and store the startup result report in the startup result report area of the common memory (300) when the input / output operation is completed.The slave computer system detects the abnormality of the master computer system. At this time, the startup result report area is read by referring to the startup data storage area of the common memory (300), and if it is determined that the startup result indicates normal termination, the common memory
A common memory control method characterized by being configured to continue the operation as a redundant system by using the data in the input / output data area of (300).