JPH0638076A - Waveform equalizing circuit - Google Patents

Abstract

PURPOSE:To always provide high-quality pictures by eliminating the picture quality deterioration of video signals after waveform equalization by performing optimum picture quality correction to the video signals after waveform equalization based on the state of input video signals and the information of waveform equalization. CONSTITUTION:An average noise component contained in the video signal is detected by a noise detection circuit 113 and outputted to a picture quality control circuit 114. A tap coefficient arithmetic circuit 116 prepares information for estimating the state of equalized images from tap information at the time of waveform equalization and outputs it to the circuit 114. The circuit 114 prepares picture quality control information and outputs it to a picture quality correction circuit 115 based on noise information outputted from the circuit 113, image state information outputted from the circuit 116 and GCR peak level information prepared from a reference (GCR) signal for ghost removal inserted to the inputted video signal. Thus, high-quality pictures can be always provided without causing deterioration of an S/N or conversely causing unsharpness after waveform equalization.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a waveform equalizing circuit which automatically corrects and outputs a waveform distortion included in an input video signal. The present invention relates to a waveform equalization circuit having means for improving noise when a video signal contains noise or blurs due to signalization.

[0002]

2. Description of the Related Art With the start of Clear Vision broadcasting in 1989, a reference signal (GCR signal) for detecting and removing ghost components is inserted during the vertical blanking period of all broadcast waves (television signals). Therefore, it becomes possible to perform highly accurate ghost removal and equalize waveform distortion in the transmission path on the receiver side using this signal.

A reference signal (GCR) for removing such ghosts.
FIG. 2 shows an example of a waveform equalization circuit that uses a signal).
In the figure, 101 is a video signal input terminal and 102 is A.
D converter, 103 is a transversal filter, 104
Is a DA converter, 105 is a video signal output terminal, 106 is a noise removal circuit, 107 is a waveform memory, 108 is a difference circuit, 109 is a subtractor, 110 is a reference waveform generation circuit, 11
1 is a tap coefficient control circuit, 112 is a tap coefficient memory,
Is.

Next, the circuit operation will be described. AD converter 10
The input video signal converted into a digital signal by 2 is input to the noise removing circuit 106 via the transversal filter 103. Normally, the tap coefficients of the transversal filter 103 at the start of the waveform equalization operation are all 0, and the input video signal is output as it is to the subsequent stage.

The noise removing circuit 106 extracts a portion of the video signal containing the GCR signal, averages several fields to remove random noise components, and the waveform memory 107.
Memorize to The GCR signal read from the waveform memory 107 is differentiated in the difference circuit 108 to be an impulse waveform.

From the reference waveform generating circuit 110, an ideal G
The impulse waveform of the CR signal is output, and the subtractor 109 subtracts it from the GCR signal (output of the difference circuit 108) extracted from the input video signal, and as a result, an error signal due to distortion is output from the subtractor 109.

On the basis of the error due to the distortion thus obtained, the tap coefficient to be given to the transversal filter 103 is calculated in the tap coefficient control circuit 111 and stored in the tap coefficient memory 112. Tap coefficient memory 11
By applying the tap coefficient read from No. 2 to the transversal filter 103, the distortion of the input video signal is reduced and output from the filter 103.

By repeating the above operation, distortion is gradually reduced from the input video signal, and the finally equalized video signal is output through the DA converter 104. Japanese Patent Laid-Open No. 1-284179 can be cited as an example of a document describing such a waveform equalizing circuit.

[0009]

In the above-mentioned waveform equalization circuit according to the prior art, no consideration is given to the state of the video signal after the waveform equalization, and the S of the video signal is changed by the waveform equalization.
The / N ratio may be deteriorated and a noisy video signal may be output, or a blurred video signal may be output.

An object of the present invention is to solve the above problems and provide a waveform equalizing circuit having means for preventing deterioration of the image quality of an input video signal even if the waveform of the input video signal is equalized. To do.

[0011]

SUMMARY OF THE INVENTION In the present invention, the above object is to provide a means for detecting a noise level included in a video signal in a waveform equalization circuit, and data for image quality correction based on a tap coefficient at the time of waveform equalization. Means, a means for detecting the peak level of the GCR signal of the input video signal, a control means for controlling the image quality correction circuit according to the noise level, the data for image quality correction, and the peak level of the GCR signal, and the control. It is achieved by providing the image quality correction circuit, which is controlled by the means and corrects and outputs the image quality of the video signal after waveform equalization.

[0012]

The means for detecting the noise level included in the video signal detects the noise level of the input video signal.
The means for obtaining data for image quality correction from the tap coefficient at the time of waveform equalization obtains the information necessary for image quality correction from the tap coefficient information obtained at the time of waveform equalization of the input video signal.

The means for detecting the peak level of the GCR signal of the input video signal can be used as information indicating the frequency characteristic of the input video signal. The control means is
The noise level, the data for image quality correction, and the peak level of the GCR signal are input, and the image quality correction amount of the image quality correction circuit is controlled by this. That is, after waveform equalization, in the video signal, if it is determined that the S / N ratio is deteriorated, the noise is controlled to be reduced, and if it is determined that the image is blurred, the frequency characteristic is corrected to be blurred. Control to prevent.

[0014]

EXAMPLES Examples of the present invention will be described below. FIG. 1 is a block diagram showing an embodiment of the present invention, in which 113 is a noise detection circuit, 114 is an image quality control circuit, 115 is an image quality correction circuit, and 116 is a tap coefficient operation circuit. Are denoted by the same reference numerals.

The operation will be described below. In FIG. 1, first, an outline of the waveform equalization operation will be described. At the start of the operation, all the tap coefficients in the transversal filter 103 are set to 0, and the input video signal is passed as it is and supplied to the noise removal circuit 106. The noise removing circuit 106 extracts the GCR signal portion from the video signal and averages the video signal for several fields using the waveform memory 107 to remove the noise component.

Next, FIG. 11 shows a difference circuit 1 in FIG.
08 and GCR used to explain the operation of subtractor 109
FIG. 3 is a waveform diagram related to signals, but will be referred to in combination with FIG. 1. The GCR signal from which the noise component has been removed by the noise removal circuit 106 is input to the difference circuit 108, and the one clock difference of the sinX / X bar signal which is the GCR signal shown in FIG. The sinX / X impulse signal shown in (b) is created.

SinX / X created by the difference circuit 108
The impulse signal is input to the subtractor 109. The reference waveform generation circuit 110 is connected to the other input of the subtractor 109.
The pre-calculated reference signal shown in FIG. 11 (c) output from the
The pre-calculated reference signal shown in FIG. 11C output from the reference waveform generating circuit 110 is subtracted from the / X impulse signal. The distortion information of the input video signal is output to the output side of the subtractor 109 as shown in FIG.

The distortion information output from the subtractor 109 is
It is input to the tap coefficient control circuit 111, where required tap coefficients are calculated based on this distortion information and stored in the tap coefficient memory 112. At the same time, the calculated tap coefficient is given to the transversal filter 103, the tap coefficient in the filter 103 is controlled, and the first waveform equalization operation is ended.

Thus, the transversal filter 10
The video signal output from 3 is input to the image quality correction circuit 115. The image signal input to the image quality correction circuit 115 is controlled so that noise is reduced if it is determined that the S / N ratio is deteriorated after waveform equalization, and if it is determined that the image signal is blurred, the frequency characteristic is Under control to correct and prevent blurring. As a result, waveform distortion is improved at the video output terminal 105 via the DA converter 104,
A video signal without image quality deterioration can be obtained.

FIG. 3 is a block diagram showing a circuit configuration of the transversal filter 103 in FIG. Figure 3
, 301 is a video signal input terminal, and 302, 30
3, 304, 305 are delay circuits, 306, 30 respectively.
7, 308 and 309 are multipliers, 310 and 31 respectively.
1, 312, 313 are tap coefficient input terminals, 3
Reference numerals 14 and 315 denote adders, and 316 denotes a video signal output terminal.

The tap coefficient (tap coefficient corresponding to each delay time) calculated based on the distortion information is input to the tap coefficient input terminal 3
A correction signal is obtained at the output of the adder 314 by applying the signals from 10, 311, 312, 313. Waveform equalization is performed by adding this signal to the input signal. Since the correction signal is 0 at the start of operation, the input signal is output as it is through the delay circuit 302 and the adder 315.

Next, FIG. 4 is a block diagram showing a circuit configuration of the noise removing circuit 106 in FIG. In FIG. 4, 401 is a video signal input terminal, 402 is a switching signal generation circuit, 403 is a buffer memory, 404 is a multiplier,
405 and 408 are selection circuits, 406 is an adder,
407 is a divider, 409 is an initialization signal input terminal, 410
Is a GCR signal input terminal, 411 and 412 are each a GC
This is an R signal output terminal.

FIG. 12 is a GCR-related waveform diagram for explaining the operation of the noise elimination circuit shown in FIG. In FIG. 4, the GCR waveform (the part including the GCR signal extracted from the input video signal) as shown in FIG. 12A is extracted and temporarily stored in the buffer memory 403. In addition,
The GCR signals are 18H and 28 in the vertical blanking period of the video signal.
It is well known that the bar signal is sent in an 8-field sequence at 1H.

At this time, the switching signal generating circuit 402 determines whether the input GCR signal is a sinX / X bar signal or a pedestal level signal, and outputs a switching signal. In the selection circuit 405, the GCR is selected according to the switching signal.
When the signal is the sin X / X bar signal shown in FIG. 12A, the output of the buffer memory 403 is selected, and when it is the pedestal level signal shown in FIG. 12B, the signal multiplied by -1 by the multiplier 404 is selected. To do. After that, in the adder 406, the output from the selection circuit 408 is added to the waveform memory 1
It is stored in 07.

In the initial state, the selection circuit 408 has the GND
Input GCR by selecting side or 0
The signal is stored in the waveform memory 107 as it is,
From the second field, the output of the waveform memory 107 is selected, added with the input GCR signal, and then output to the waveform memory 107.

The GCR signal obtained by repeating this operation for each field and adding up for several fields is multiplied by a gain of 1 / N in the divider 407 to obtain a GCR signal shown in FIG.
A GCR waveform with noise removed as shown in (3) is output from the output terminal 412. Since the GCR signal is inserted as an 8-field sequence, the number of fields to be added is preferably an integral multiple of 8. For example,
If 128 fields are added, the divider 407 multiplies (1/64) times. In this way, noise removal is performed.

Next, FIG. 5 is a block diagram showing a circuit configuration of the tap coefficient control circuit 111 in FIG. Figure 5
In 501, a distortion information input terminal, 502 a multiplier, 503 an adder, 504 a selection circuit, 505 an initialization signal input terminal, 506 a tap coefficient input terminal, 50
Reference numerals 7 and 508 denote tap coefficient output terminals, respectively.

In FIG. 5, the input distortion information is multiplied by -α in the multiplier 502, and the adder 503 selects the selection circuit 50.
The output of 4 is added and stored in the tap coefficient memory 112. α is a correction coefficient, and usually α <1. In the initial state, the selection circuit 504 selects the GND side, that is, 0 to output 0 as a tap coefficient to all the taps of the transversal filter 103, and at the same time, stores the distortion information multiplied by −α in the tap coefficient memory 112 as it is. .

Now that the description of a concrete configuration example of most of the circuits constituting the equalization circuit of FIG. 1 has been completed, returning to FIG. 1 again, the second and subsequent waveform equalization operations will be described. Two
After the first time, first, the selection circuit 504 (FIG. 5) in the tap coefficient control circuit 111 selects the output from the tap coefficient memory 112, so that the tap coefficient previously calculated from the tap coefficient memory 112 is stored in the transversal filter 103. Give to the corresponding tap.

The video signal that has passed through the transversal filter 103 is output with less distortion than the previous time. Similar to the first time, the GCR signal portion is extracted from this video signal to remove noise, the delay time is detected, and the ideal GCR signal waveform is subtracted from the signal subjected to the delay time detection processing to obtain distortion information. This distortion information is multiplied by −α, added to the previous tap coefficient, and stored in the tap coefficient memory 112.

A final equalized waveform can be obtained by repeating such a waveform equalizing operation several times or for a certain period of time. In addition, the waveform equalization operation as described above
Although it may be performed while performing successive comparison as described above, the tap coefficient may be calculated in advance, and the final result may be finally input to the transversal filter 103 to equalize the waveform.

In the waveform equalizing circuit as described above, when the waveform equalization is performed using the GCR signal inserted in the input video signal, an image whose S / N ratio is deteriorated as compared with that before the equalization is performed. Or, on the contrary, the image may be blurred compared to before equalization. Therefore, the transversal filter 10
The image quality correction circuit 115 provided on the output side of No. 3 is controlled based on the information at the time of waveform equalization.

Therefore, a noise detection circuit 113, a tap coefficient calculation circuit 116, and an image quality control circuit 114 are provided.
The noise detection circuit 113 detects an average noise component included in the video signal and outputs it to the image quality control circuit 114.
The tap coefficient calculation circuit 116 creates information for estimating the image state after equalization from the tap information at the time of waveform equalization, and outputs it to the image quality control circuit 114.

The image quality control circuit 114 includes the noise detection circuit 1
The image quality control information is created by the noise information output from the output terminal 13, the image state information output from the tap coefficient calculation circuit 116, and the GCR peak level information created from the GCR signal inserted in the input video signal. And outputs it to the image quality correction circuit 115.

Next, FIG. 6 is a block diagram showing the circuit configuration of the tap coefficient arithmetic circuit 116 shown in FIG. 1, 331 is a tap coefficient input terminal, 332 is an adder, 333 is a register (flip-flop), 334. Is an output terminal.

The tap coefficient information input from the tap coefficient input terminal 331 is input to the adder 332, is added to the previous signal output from the register 333, and is output to the register 333. The register 333 holds the input signal for one clock and outputs it. This adder 33
The tap coefficient is cumulatively added by the feedback circuit configured by 2 and the register 333.

The total sum of tap coefficients cumulatively added is output from the output terminal 334. Since the tap coefficient information is positive or negative information, the cumulative sum total indicates changes in the gain of the video signal output from the transversal filter 103. When the sum of tap coefficients is positive, the overall gain is large, and when it is negative, the overall gain is small.

Therefore, when the total sum of the tap coefficients is positive, the overall gain increases and the S / N ratio is improved. When the total sum of the tap coefficients is negative, the overall gain decreases and the S / N ratio deteriorates. . Therefore, the sum of the tap coefficients is the image quality correction circuit 1.
The control information 15 is sent to the image quality control circuit 114.

Next, FIG. 7 is a block diagram showing the circuit configuration of the noise detection circuit 113 in FIG. 1, in which 341 is a signal input terminal, 342 is a synchronous flat portion extraction circuit, 343 is a high-pass circuit, and 344 is peak detection. The circuit 345 is a noise detection output terminal.

The video signal input from the signal input terminal 341 is input to the synchronous flat portion extracting circuit 342. The synchronization flat portion extraction circuit 342 extracts only the flat portion of the synchronization signal of the video signal. The extracted sync flat portion is extracted as a high frequency component (high frequency information) input to the high pass circuit 343 and superimposed on the sync flat portion. The signal (high-frequency component) output from the high-pass circuit 343 is input to the peak detection circuit 344, and the peak output of the signal (high-frequency component) is extracted.

When the input video signal contains much noise, the peak output becomes large. If the input video signal does not contain noise, nothing is output to the peak output. Information indicating the magnitude of the peak detection output is output from the noise detection output terminal 345 as noise information of the input signal.

Next, FIG. 8 is a block diagram showing a concrete circuit configuration of the image quality control circuit 114 in FIG.
Is a tap coefficient sum input terminal (from the tap coefficient calculation circuit 116), 352 is a GCR peak level input terminal (from the difference circuit 108), and 353 is (noise detection circuit 113).
Noise information input terminals, 354 and 356 are subtractors, 355 is an adder, and 357 is an image quality control signal output terminal.

The GCR peak level input from the GCR peak level input terminal 352 is input to the subtractor 354, the offset value is subtracted, and the result is output to the adder 355. Note that, of the two inputs of the subtractor 354, the side described as (+) is the signal that is the source of the subtraction, that is, the signal that is subtracted, and the side that is described as (-) is the signal that is subtracted.
In other words, in the subtractor, subtraction of the signal on the side marked (-) from the signal on the side marked (+) is represented by the signs (+) and (-). is there.

The adder 355 is used to add the tap coefficient summation information input from the tap coefficient summation input terminal 351 and the subtractor 3
The GCR peak level information output from 54 is added and output to the subtractor 356. The subtractor 356 is the adder 35.
The noise information inputted from the noise information input terminal 353 is subtracted from the information outputted from No. 5 and outputted from the image quality control signal output terminal 357 as an image quality control signal.

As described above, the total sum of tap coefficients has a good S / N ratio when it is positive and a bad S / N ratio when it is negative. The GCR peak level indicates that the signal band of the input signal is wide when the result of subtracting the offset value is positive, and the signal band is narrow when the result is negative. Therefore,
For example, the sum of tap coefficients + GCR peak level−noise information can be used to create a signal that adaptively controls the image quality correction circuit 115 according to the state of the input signal and the state of the signal after waveform equalization.

Here, the method of linearly calculating the sum of tap coefficients, the GCR peak level, and the noise information has been described, but a relative linear calculation may be used. Further, it is also possible to use a combination of required two pieces of information or only one piece without using all three pieces of information. In this way, control information for correcting the image quality is created and sent to the image quality correction circuit 115.

Next, FIG. 9 shows a concrete example of the configuration of the image quality correction circuit 115 in FIG. 1, in which 361 is a video signal input terminal, 362 is an image quality control signal input terminal, 363,
Reference numerals 364, 365, 366 denote filters A, B, C, D having different characteristics, and 367 an input switching circuit, 368.
Is a video signal output terminal.

The video signal input from the video signal input terminal 361 is input to the filter A363, the filter B364, the filter C365 and the filter D366 having different characteristics.

FIG. 13 shows an example of the frequency characteristics of each filter, and A, B, C and D represent the frequency characteristics of the filters having the corresponding codes. As a result, the frequency characteristic of the video signal can be changed by selecting the filter. For example, in FIG. 9, when the filter A is selected, a video signal with the highest frequency characteristic can be obtained, and when the filter D is selected, a video signal with the narrowest frequency band can be obtained.

Filters 363, 364, 365, 366
Is output to the signal switching circuit 367. The signal switching circuit 367 includes filters 363, 364, 36.
5, the video signal output from the image signal output terminal 368 is output from the video signal output terminal 368 by the image quality control signal input from the image quality control signal input terminal 362. It

In this embodiment, the image quality correction method using the switching of the filters has been described, but it is obvious that more filters may be switched and the characteristics of the filters may be directly controlled. is there.

According to the present embodiment, the state of the video signal can be estimated from the state of the input video signal and the state of the video signal after waveform equalization, and optimum image quality correction can be performed. The S / N will not deteriorate or blur later.

Next, a second embodiment of the present invention will be described.
FIG. 14 is a block diagram showing the second embodiment of the present invention. In the second embodiment, the noise of the video signal is not detected from the output side of the transversal filter 103, but is detected from the front side (input side) of the transversal filter 103.

When a video signal is obtained from the output side of the transversal filter 103, the video signal changes before and after equalization. Therefore, it is necessary to change the image quality correction control signal. (Input side)
When the video signal is obtained from, the noise level of the input video signal can be detected regardless of the waveform equalization.
Therefore, the image quality control circuit 114 determines the tap coefficient information and the GC.
Since the control signal may be created from the R peak level information, the processing becomes simple.

Further, in the embodiment shown in FIG. 14, the image quality correction circuit 115 is composed of a noise removal circuit (NR), and therefore the image quality control circuit 114 is also composed of a control circuit (NR control) of the noise removal circuit. .

Next, a third embodiment of the present invention will be described. FIG. 15 is a block diagram showing the third embodiment of the present invention. In FIG. 15, reference numeral 121 denotes a luminance signal color signal (Y
/ C) separation circuit, 122 is a luminance signal noise removal circuit, 1
Reference numeral 23 is a luminance signal output terminal, 124 is a color signal noise removal circuit, and 125 is a color signal output terminal, and the same portions as those in FIG. 1 are denoted by the same reference numerals.

Next, the circuit operation of FIG. 15 will be described. Since the same parts as those in FIG. 1 perform the same operations, the description thereof will be omitted. The video signal output from the D / A converter 104 is input to the luminance signal color signal (Y / C) separation circuit 121 and separated into a luminance signal and a color signal.

The separated luminance signal is input to the luminance signal noise removing circuit 122, noise of the luminance signal is removed, and output from the luminance signal output terminal 123. Further, the separated color signal is input to the color signal noise removal circuit 124, noise included in the color signal is removed, and the color signal is output from the color signal output terminal 125.

The luminance signal noise removal circuit 122 and the color signal noise removal circuit 124 are controlled by the image quality control signal output from the image quality control circuit 114 to the optimum removal level for waveform equalization and input noise level. . In this embodiment, the image quality correction circuit 115 changes the frequency characteristic of the video signal to control the frequency characteristic to the optimum frequency.
Since the noise included in the luminance signal and the color signal can be effectively removed by the luminance signal noise removing circuit 122 and the color signal noise removing circuit 124, the optimum image quality control can always be performed.

Although the case of removing the noise of the luminance signal and the color signal is shown here, the contour correction operation can be similarly controlled. Further, the luminance signal noise removing circuit 12
2 and the color signal noise removal circuit 124 can be sufficiently controlled, the image quality correction circuit 115 may be removed.

Here, a specific configuration example of the luminance signal noise elimination circuit 122 will be described. FIG. 10 is a block diagram showing a specific configuration example of the luminance signal noise removal circuit. In FIG. 10, 371 is a signal input terminal, 372 is a control signal input terminal, 373 is a high-pass circuit (HPF),
Reference numeral 374 is a clipping circuit, 375 is a subtractor, and 376 is an output terminal.

The signal input from the signal input terminal 371 is input to the high-pass circuit (HPF) 373, and the input signal noise and contour signal (high-frequency component) are extracted. The extracted signal (high frequency component) is clipped by the clipping circuit 37.
4 and the contour signal (the part of the amplitude that goes up and down exceeds a certain level in the upward direction, that is, the upper clip level and the part that exceeds the certain level in the downward direction, that is, the lower clip level) is clipped, Only the noise signal having the amplitude of is output from the clipping circuit 374.

Since the output noise signal is subtracted from the signal input from the signal input terminal 371 by the subtractor 375 and output, a signal from which noise has been removed is obtained at the output terminal 376. Since the clip level of the clip circuit 374 at this time is controlled by the control level input from the control signal input terminal 372, the noise removal amount can be externally controlled.

Although the case of removing the noise of the luminance signal is shown here, the noise removing circuit can be realized for the color signal with substantially the same circuit configuration. Alternatively, a color difference signal demodulated from the video signal or an RGB signal converted from the video signal may be extracted, and noise removal or contour correction may be performed in these signal formats.

In this case, when the demodulated color difference signal is a base band signal, it can be realized by the same method as the circuit shown in FIG. further,
When the RGB signal is used, it is the signal that is finally output to the cathode ray tube, so that there is an effect that noise removal can be performed on all the noises contained up to that point.

Next, a fourth embodiment of the present invention will be described. FIG. 16 is a block diagram showing the fourth embodiment of the present invention. In FIG. 16, reference numeral 131 denotes a signal switching circuit, and the same parts as those in FIGS. 1 and 15 are designated by the same reference numerals.

Next, the circuit operation of FIG. 16 will be described. However, the same parts as those in FIGS. 1 and 15 perform the same operation, and therefore the description thereof will be omitted. In this embodiment of FIG. 16,
In front of the noise detection circuit 113, there is provided a signal switching circuit 131 for switching signals from the front (input side) and the rear (output side) of the transversal filter 103.

The switching circuit 131 selects the signal from before the transversal filter 103 before waveform equalization,
After the waveform equalization, the signal after the transversal filter 103 is selected, and even after the waveform equalization, the input signal and the output signal are selected at any time.

With this, it is possible to obtain information on both the noise level originally included in the input video signal and the noise level changed by the waveform equalization at any time, so that it is included in the input video signal. Even if the noise level that has been changed changes depending on the signal content, etc., the information can be correctly obtained, and optimum control can always be performed.

The control method described in the present embodiment is described as a differential method, but the present invention is not limited to this and can be applied to a method using an MSE method or an FFT, etc., and all separated luminance signals, color signals, etc. Can be applied to the signal.

[0071]

As described above, according to the present invention, in the waveform equalization circuit, the optimum image quality correction is performed on the video signal after waveform equalization based on the state of the input video signal and the information of the waveform equalization. There is an advantage that a high-quality image can always be obtained without the S / N being deteriorated after the equalization or being blurred.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention.

FIG. 2 is a block diagram showing a waveform equalizing circuit according to a conventional technique.

FIG. 3 is a block diagram showing a configuration example of a transversal filter in FIG.

FIG. 4 is a block diagram showing a configuration example of a noise removal circuit in FIG.

5 is a block diagram showing a configuration example of a tap coefficient control circuit in FIG.

6 is a block diagram showing a configuration example of a tap coefficient calculation circuit in FIG.

7 is a block diagram showing a configuration example of a noise detection circuit in FIG.

8 is a block diagram showing a configuration example of an image quality control circuit in FIG.

9 is a block diagram showing a configuration example of an image quality correction circuit in FIG.

10 is a block diagram showing an example of a luminance signal noise removal circuit as another configuration example of the image quality correction circuit in FIG.

11 is a difference circuit 108 and a subtractor 109 in FIG.
FIG. 6 is a waveform diagram related to a GCR signal used for explaining the operation of FIG.

12 is a waveform diagram related to a GCR signal for explaining the operation of the noise removal circuit shown in FIG.

13 is a characteristic diagram for explaining the operation of the image quality correction circuit shown in FIG.

FIG. 14 is a block diagram showing a second embodiment of the present invention.

FIG. 15 is a block diagram showing a third embodiment of the present invention.

FIG. 16 is a block diagram showing a fourth embodiment of the present invention.

[Explanation of symbols]

101 ... Video signal input terminal, 102 ... AD converter, 10
3 ... Transversal filter, 104 ... DA converter,
105 ... Video signal output terminal, 106 ... Noise removal circuit,
107 ... Waveform memory, 108 ... Difference circuit, 109 ... Subtractor, 110 ... Reference waveform generating circuit, 111 ... Tap coefficient control circuit, 112 ... Tap coefficient memory, 113 ... Noise detection circuit, 114 ... Image quality control circuit, 115 ... Image quality Correction circuit, 116 ... Tap coefficient calculation circuit

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Yumi Bando, 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa, Ltd. Inside the Hitachi Media Visual Media Laboratory (72) Inventor Nao Suzuki, 292 Yoshida-cho, Totsuka-ku, Yokohama, Kanagawa Incorporated company Hitachi Image Information System

Claims (13)

[Claims] 1. A transversal filter that outputs as a waveform equalized output by changing the frequency characteristic of an input video signal according to a controlled tap coefficient, and a transversal filter that is preliminarily superposed on the transversal filter output. A ghost reference signal, and averaging the ghost reference signal for several fields to remove noise contained in the ghost reference signal and output the noise, and the noise-removed ghost. First storage means for capturing and storing the reference signal, tap coefficient control means for controlling the tap coefficient of the transversal filter based on the noise-removed ghost reference signal, and the tap coefficient control means In a waveform equalization circuit comprising: a second storage unit that captures and stores a controlled tap coefficient; Noise detection means for detecting included noise, calculation means for calculating data necessary for image quality control using the tap coefficient read from the second storage means, and waveform equalization output from the transversal filter An image quality correcting means for correcting and outputting the image quality, a noise detection output from the noise detecting means, data from the calculating means and a noise-removed ghost reference signal from the noise removing means are inputted. A waveform equalization circuit, comprising: an image quality control unit that creates a control signal and outputs the control signal to the image quality correction unit to perform image quality correction. 2. The waveform equalization circuit according to claim 1, wherein the noise detecting means includes means for detecting noise contained in a video signal input to the transversal filter and outputting the noise. A characteristic waveform equalization circuit. 3. The waveform equalizing circuit according to claim 1, wherein the noise detecting means detects noise contained in the waveform-equalized video signal output from the transversal filter and outputs the noise. A waveform equalizing circuit comprising means. 4. The waveform equalization circuit according to claim 1, wherein the calculating means calculates the total sum of tap coefficients read from the second storage means up to that point as data necessary for image quality control. A waveform equalization circuit comprising: 5. The waveform equalization circuit according to claim 1, wherein the image quality correction means includes a plurality of filters having different frequency characteristics, and a means for performing image quality correction by switching to any one of them and passing a signal therethrough. A waveform equalization circuit comprising: 6. The waveform equalization circuit according to claim 1, wherein the image quality correction means separates a signal to be subjected to image quality correction into a luminance signal and a chrominance signal, and the image quality of each of the separated signals is improved. A waveform equalizing circuit comprising means for performing correction. 7. The waveform equalizing circuit according to claim 1, wherein the image quality correcting means excludes an excessive range above and below the amplitude in a high frequency component from a signal to be subjected to image quality correction. A waveform equalizing circuit, characterized in that it comprises means for selecting and removing only. 8. The waveform equalization circuit according to claim 1, wherein the image quality control means removes noise detection output from the noise detection means, data from the calculation means, and noise from the noise removal means. A waveform equalizing circuit comprising means for generating an image quality control signal using any two of the three ghost reference signals and outputting the signal to the image quality correcting means. 9. The waveform equalization circuit according to claim 1, wherein the image quality control means removes noise detection output from the noise detection means, data from the calculation means, and noise from the noise removal means. A waveform equalization circuit comprising means for generating an image quality control signal using any one of the three ghost reference signals and outputting it to the image quality correction means. 10. The waveform equalization circuit according to claim 1, wherein the image quality correction means comprises means for performing image quality correction on the demodulated color difference signal extracted from the output of the transversal filter. Waveform equalizer circuit. 11. The waveform equalization circuit according to claim 1, wherein the image quality correction means comprises means for performing image quality correction on the demodulated primary color (RGB) signals extracted from the output of the transversal filter. A waveform equalization circuit characterized by the above. 12. The waveform equalization circuit according to claim 1, wherein the image quality correction means comprises noise removal means. 13. The waveform equalizing circuit according to claim 1, wherein the noise detecting means takes in a video signal input to the transversal filter and detects noise contained therein, or the noise of the transversal filter is detected. A waveform equalization circuit comprising a noise detection means capable of taking in a video signal as an output and detecting noise contained therein, or switching to either of them.