JPH063806A - Production of semiconductor device and mask for exposing - Google Patents

Abstract

PURPOSE:To obtain resist patterns transferred with integrated circuit patterns with high accuracy by exposing the photoresist film deposited on a semiconductor substrate having a level difference on the surface over the entire region thereof at an adequate focus. CONSTITUTION:The semiconductor substrate 10 is exposed by using a mask, 5a varying in the height of the front surface of, for example, a chromium film 2 in correspondence to the level difference 12 on the surface of the substrate 10. The substrate is subjected to the exposing focused at every partial region by using the masks varying with each of the partial regions corresponding to the level difference. A light shielding plate for shielding the parts exclusive of the prescribed partial regions is prepd. without changing the mask and is superposed on the mask. The exposing is then executed by focusing at every partial region.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention is used in a method of manufacturing a semiconductor device, and particularly in a photolithography process.
The present invention relates to a semiconductor device manufacturing method and an exposure mask for transferring an integrated circuit pattern with high accuracy onto a semiconductor substrate having a step on its surface.

[0002]

2. Description of the Related Art Conventionally, an exposure mask (hereinafter, simply referred to as a mask) has been composed of a glass substrate or a quartz substrate as a flat transparent substrate and a light shielding film formed on the surface thereof. FIG. 11 is a schematic sectional view of such a conventional general mask. The glass substrate 1 is precisely polished so as to have flatness of several μm, and a chrome film 2 is patterned as a light shielding film on the glass substrate 1 to form a mask 5g.

12 (a), 12 (b) and 12 (c) are schematic cross-sectional views for explaining a main part of a photolithography process when exposure is performed using the mask 5g.

A wiring material 11 is uniformly formed on a semiconductor substrate 10 on which required elements are formed and has a step 12, and a resist film 3 is further deposited thereon so that the surface is flat. . Then, the glass substrate 1 is irradiated with far-ultraviolet light (hereinafter, referred to as UV light) 4 through a mask 5g having the patterned chromium film 2 to perform exposure (FIG. 12A). In this case, the exposure of the resist film 3 applied on the step 12 is performed at the bottom of the step and the upper part of the step at the same time.

Next, the resist film 3 is developed (see FIG. 12).
(B)) Finally, using the pattern of the resist film 3 as a mask, processing such as etching was performed to form a desired wiring pattern (FIG. 12 (c)).

By the way, in recent years, highly integrated devices, especially D
In a RAM (Dynamic Random Access Memory) or the like, a central portion 15 and a peripheral portion 13 of a semiconductor substrate (chip) 10 are formed as shown in FIG.
As a result, there is a step 12 of about 1 to 2 μm.

Therefore, when the integrated circuit pattern is transferred to the semiconductor substrate 10 shown in FIG. 13, the optimum focus position is obtained for a part or the front part of the exposure area, and the semiconductor substrate 1
A method of performing exposure by moving 0 to the optimum focus position, or when the optimum focus position is obtained for a part of the exposure area, it shifts from the optimum focus position in other areas,
There has been adopted a method of exposing at a position where an appropriate offset is added to the obtained optimum focus position on the optical axis.

[0008]

In the conventional mask described above, since the pattern of the light shielding film is formed on the surface of the flat glass substrate, the semiconductor substrate to which the pattern of the mask is transferred has a step in the previous step. When the mask pattern is formed, the image of the mask image is formed on a plane regardless of the step of the semiconductor substrate. If there is a difference in shape and size of the resist film and the step is larger than the depth of focus of the lens of the exposure apparatus, the pattern of the resist film cannot be formed.

Thus, it is difficult to obtain a proper focus over the entire region of the resist film, and in the region where the proper focus cannot be obtained, as shown in FIG. 14, (a) the resist is formed at the bottom of the resist film. The rest will occur.

(B) The bottom of the resist film has a skirt.

(C) The size of the resist film is significantly different from the pattern size on the mask. There was a problem that problems such as

Further, the following problems also occur in the method of moving the semiconductor substrate to find the optimum focus position.

First, with the recent trend toward higher integration, the design rule has become less than about 0.5 μm. An exposure wavelength of 365 nm (i
In a 5: 1 reduction projection exposure apparatus of (line), the depth of focus of a 0.5 μm pattern is at most 1.5 μm. Therefore, when the height difference of the step 12 in FIG. 13 exceeds 1.5 μm, it is impossible to simultaneously form a resist pattern having a good shape in the central portion 15 and the peripheral portion 13.

An object of the present invention is to solve the above problems and to provide a method of manufacturing a semiconductor device having an exposure means capable of forming a precise resist pattern on a semiconductor substrate having a step on the surface thereof, and an exposure method. To provide a mask for use.

[0015]

According to a method of manufacturing a semiconductor device of the present invention, a photosensitive organic film is deposited on a semiconductor substrate having a step on its surface, and an exposure mask having an integrated circuit pattern is formed on the substrate. In a method for manufacturing a semiconductor device, which comprises exposing a light having a predetermined wavelength to transfer the integrated circuit pattern onto the semiconductor substrate, as the exposure mask,
It is characterized in that an exposure mask having a pattern of a light shielding film formed on a transparent substrate, the upper surface of which is formed at a different height according to a step on the surface of the semiconductor substrate, is used.

The semiconductor device manufacturing method of the present invention is
A photosensitive organic film is deposited on a semiconductor substrate having a step on the surface, and light having a predetermined wavelength is exposed through an exposure mask on which an integrated circuit pattern is formed, and the integrated circuit pattern is formed on the semiconductor substrate. In the method for manufacturing a semiconductor device including a step of transferring, as the exposure mask, a plurality of partial exposure masks divided according to a step on the surface of the semiconductor substrate is used, and exposure is performed by focusing on each of the partial exposure masks. It is characterized by doing.

The semiconductor device manufacturing method of the present invention is
A photosensitive organic film is deposited on a semiconductor substrate having a step on the surface, and light having a predetermined wavelength is exposed through an exposure mask on which an integrated circuit pattern is formed, and the integrated circuit pattern is applied to the semiconductor substrate. In a method for manufacturing a semiconductor device including a step of transferring, a light-shielding plate having a plurality of light-shielding portions that shields a region other than partial regions divided according to a step on the surface of the semiconductor substrate is prepared, and the light-shielding plate and the exposure light are provided. The mask for use is held in a predetermined shape, and then each partial area is focused and exposed.

The exposure mask of the present invention has a transparent substrate and a pattern of a light-shielding film formed on the transparent substrate, and a photosensitive organic film is deposited on the surface of the semiconductor substrate by exposure to expose the semiconductor substrate. In the exposure mask for transferring the integrated circuit pattern, the upper surface of the exposure mask has patterns of the light shielding film formed at different heights corresponding to the steps existing on the surface of the semiconductor substrate.

[0019]

[Operation] When there is a step on the surface of the semiconductor substrate,
The focus position in the exposure apparatus differs between the lower part of the step and the upper part of the step.

Therefore, the present invention has decided to use the following method as means for precisely adjusting the focal positions. (1) Using a mask in which the height of the light-shielding film is changed according to the step, the optical path lengths above and below the step are made equal and the focus is adjusted at once. (2) Separate masks corresponding to the steps are used to focus on the steps and the bottom. (3) In (2), instead of changing the mask, a light-shielding plate that shields exposure according to the step is used. in this case,
By holding the mask and the light shielding plate in correspondence with the inclination of the step portion, it is possible to accurately form the resist pattern even on the inclined step portion.

[0021]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 (a) is a schematic sectional view showing an example of a mask according to the first embodiment of the present invention, and FIG. 1 (b) is an explanatory view showing a main part of an exposure apparatus using the same.

In the mask 5a according to the first embodiment, the glass substrate 1 is provided with irregularities corresponding to the steps 12 on the surface of the semiconductor substrate 10 onto which the pattern of the mask 5a is transferred.
A pattern made of the chromium film 2 is formed on the glass substrate 1 having the step 12a. Step 12a of glass substrate 1
The length l ₁ of the above is arbitrary according to the length l ₂ of the step 12 in the previous step on the semiconductor substrate 10, but the first embodiment is an example of a mask for reduction projection exposure of 5: 1. , For example,
When l ₂ = 2 μm, l ₁ = 25 μm. As a result, even if the surface of the semiconductor substrate 10 has irregularities, the optical path lengths through the projection lens 23 are all equal, and the surface of the semiconductor substrate 10 and the image plane of the pattern of the mask 5a coincide with each other.

FIG. 2 is a schematic sectional view showing another example of the mask according to the first embodiment of the present invention.

The mask 5a in FIG. 1 (a) is a glass substrate 1
However, depending on the level difference on the surface of the semiconductor substrate, by embedding a pattern of the chromium film 2 in the glass substrate 1 as in the mask 5b of FIG.
Even if the mask pattern has a step structure, the mask 5a shown in FIG.
The same effect as can be obtained.

A feature of the present invention is that in FIG. 1 and FIG. 2, as a mask, a pattern of a chromium film 2 is formed on a glass substrate 1, the upper surface of which is formed at different heights according to the steps on the surface of the semiconductor substrate 10. The mask 5a or 5b is used for simultaneous exposure with one focus.

3A to 3D are schematic sectional views of the mask and the semiconductor substrate in the main process according to the second embodiment of the present invention.

In the second embodiment, the step 12 of 1 μm is formed on the surface.
Consider a case in which the wiring material 2 made of, for example, aluminum and formed on the semiconductor substrate 10 having the is etched using the pattern of the negative resist film 3a as a mask. When an i-line (UV light 4) is used as a light source and the resist film is exposed by the i-line, the focus margin for obtaining a pattern having a wiring width of about 1 μm is about 2 μm, but for example 0.4 μm
The focus margin for obtaining a fine wiring pattern is about 0.5
It will be less than μm. Therefore, when the resist film pattern is formed by one exposure, a wiring pattern of 1 μm in which the focus margin is larger than the step amount can be formed, but a wiring pattern of 0.4 μm in which the focus margin is smaller than the step amount is formed. Can not.

In order to solve this problem in the second embodiment, the pattern of the negative resist film 3a at the bottom of the step is exposed by the mask 5c shown in the upper part of FIG. The pattern of the negative resist film 3a is shown in FIG.
The mask 5d shown in the upper part of the figure is used for exposure, and thereafter, the phenomenon and the wiring pattern are etched. (FIGS. 3C and 3D).

Therefore, the exposure of the resist film at the bottom of the step and the exposure of the resist film at the top of the step can be carried out with proper focus, and the resist bottom remains due to defocus, the bottom of the resist, and the mask pattern size of the resist size. It is possible to prevent misalignment and the like.

FIGS. 4A to 4D are schematic sectional views of the mask and the semiconductor substrate in the main steps according to the third embodiment of the present invention.

The difference between the third embodiment and the second embodiment is that a positive resist film 3b is used instead of the negative resist film 3a. Therefore, as shown in FIGS. 4 (a) and 4 (b), masks 5e and 5f having corresponding patterns of the chromium film 2 are used.

Compared to the negative type resist, the positive type resist is
Generally, there is an advantage that the pattern dimension precision is good.

A feature of the present invention is that, in FIGS. 3 and 4, a plurality of partial exposure masks 5c and 5 are divided as masks according to the step 12 on the surface of the semiconductor substrate 10.
d, or 5e and 5f are used to focus and expose each of the partial exposure masks.

Next, a fourth embodiment of the present invention will be described with reference to FIGS.
This will be described with reference to FIG.

FIG. 5 is a plan view of the semiconductor substrate 10. The semiconductor substrate 10 is composed of a peripheral portion 13, a boundary portion 14 and a central portion 15. The cross-sectional structure of the semiconductor substrate 10 is as shown in FIG. 13, and the central portion 15 has a step 12 with a convex shape of 2 μm as compared with the peripheral portion 13.

Next, FIG. 6 shows a main part of a reduction projection exposure apparatus for exposing the semiconductor substrate 10 shown in FIG. First, the i-line having a wavelength of 365 nm is taken out from the light source 21 and is uniformly irradiated onto the mask 5 by the condenser lens 22. The difference from the conventional reduction projection exposure apparatus is that the light shielding plate 6 is arranged immediately below the mask 5.

As the light-shielding plate 6, a quartz plate having a thickness of 2 to 30 mm is used, in which chromium is formed as a light-shielding film at 1000 Å and chromium oxide is formed as an antireflection film at a film thickness of 200 Å. As shown in FIG. 7, the light shielding plate 6 has a peripheral exposure light shielding portion 6a, a boundary exposure light shielding portion 6b, and a central portion for selectively exposing each portion of the semiconductor substrate 10 shown in FIG. A light-shielding body pattern including the exposure light-shielding portion 6c is arranged. Then, in order to expose each part of the semiconductor substrate 10, the light shielding plate 6 is moved directly below the mask 5 to arrange a desired light shielding part directly below the mask.

When exposing the central part 15 by exposing the central part 15 for exposing the central part, the light-shielding part 6c for central part exposure is aligned and arranged just below the mask.
Exposure is performed by moving the stage 24 so that the position A in FIG. 8 is in focus. Subsequently, the light-shielding portion 6b for exposing the boundary portion is arranged immediately below the mask, and exposure is performed so that the position B, which is the center position of the height difference, is focused. After that, the light-shielding portion 6a for exposing the peripheral portion is moved directly below the mask, and exposure is performed so that the position c is focused.

In this case, since the boundary portion 14 is exposed at one time, the lower and upper portions of the unevenness may deviate from the optimum focus position by about 1 μm at the maximum. If pattern formation failure occurs due to this, the boundary portion 14 may be divided into finer portions according to the height of the semiconductor substrate 10 and then exposed.

In the fourth embodiment, as in the second and third embodiments described above, in the method of dividing the integrated circuit pattern into a plurality of masks and exposing using each mask, each reticle is exposed. Although the connection of the pattern formed in 1 has to be performed with high accuracy, the method shown in the fourth embodiment has an advantage that it is not necessary to consider it.

Next, a fifth embodiment of the present invention will be described with reference to FIGS. 9 and 10.

In the above-described fourth embodiment, it is impossible to continuously focus on each part of the inclined semiconductor substrate surface of the boundary portion 14. The fifth embodiment is for continuously focusing on the inclined boundary portion 14 of the semiconductor substrate 10.

FIG. 9 is an explanatory view showing the main part of the exposure apparatus according to the fifth embodiment. The exposure method for the central portion 15 and the peripheral portion 13 is the same as that shown in the fourth embodiment. Border 1
When the exposure of 4 is performed, the mask 5 and the light shielding plate 6 are tilted as shown in FIG.

The relationship between the object and the image forming position through the projection lens 23 in this case is as shown in FIG. That is, the image forming position P ′ at the position P close to the projection lens 23 becomes a point distant from the projection lens 23, and the image forming position at the position Q distant from the projection lens 23 becomes a position Q ′ close to the projection lens 23.

Therefore, in FIG. 9, by tilting the mask 5 and the light shielding plate 6 during the boundary exposure, the image forming position is continuously changed corresponding to the tilt of the step portion of the semiconductor substrate 10, and the boundary is changed. It is possible to focus on each part of the section 14.

A feature of the present invention is that, as shown in FIGS. 6, 7 and 9, the exposure is shielded for each partial region (13, 14, 15) divided according to the step 12 on the surface of the semiconductor substrate 10. This is to prepare a light-shielding plate 6 having light-shielding portions (6a, 6b, 6c), hold the light-shielding plate 6 and the mask 5 in a predetermined shape, and then focus and expose.

[0048]

As described above, according to the present invention,
On a semiconductor substrate having a step on the surface, a photoresist pattern can be formed with high accuracy in accordance with the step, and the effect is great.

[Brief description of drawings]

FIG. 1 is a schematic cross-sectional view of an example of a mask according to a first embodiment of the present invention and an explanatory view showing a main part of an exposure apparatus.

FIG. 2 is a schematic cross-sectional view showing another example of the mask according to the first embodiment of the present invention.

FIG. 3 is a schematic sectional view of a mask and a semiconductor substrate in a main process according to a second embodiment of the present invention.

FIG. 4 is a schematic sectional view of a mask and a semiconductor substrate in a main process according to a third embodiment of the present invention.

FIG. 5 is a plan view showing a semiconductor substrate which is a target of a fourth embodiment of the present invention.

FIG. 6 is an explanatory diagram showing a main part of an exposure apparatus according to a fourth embodiment of the present invention.

FIG. 7 is a plan view showing a light blocking plate according to a fourth embodiment of the present invention.

FIG. 8 is a schematic cross-sectional view showing a main part of a semiconductor substrate targeted by a fourth embodiment of the present invention.

FIG. 9 is an explanatory diagram showing a main part of an exposure apparatus according to a fifth embodiment of the present invention.

FIG. 10 is an explanatory diagram showing an image forming position in a fifth embodiment of the present invention.

FIG. 11 is a schematic cross-sectional view showing an example of a conventional mask.

FIG. 12 is a schematic cross-sectional view of a mask and a semiconductor substrate in a main process according to a conventional example.

FIG. 13 is a schematic cross-sectional view showing a main part of a semiconductor substrate.

FIG. 14 is a schematic cross-sectional view showing a main part of a semiconductor substrate showing an exposure result according to a conventional example.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Glass substrate 2 Chromium film 3 Resist film 3a Negative resist film 3b Positive resist film 4 UV light 5, 5a to 5g Mask 6 Light shield plate 6a Peripheral exposure light shield 6b Boundary exposure light shield 6c Center exposure Light shielding part 10 Semiconductor substrate 11 Wiring material 12, 12a Step 13 Peripheral part 14 Boundary part 15 Central part 21 Light source 22 Condenser lens 23 Projection lens 24 Stage

Claims (4)

[Claims] 1. A semiconductor substrate having a step on its surface is coated with a photosensitive organic film, and light having a predetermined wavelength is exposed through an exposure mask on which an integrated circuit pattern is formed to expose the integrated circuit pattern. In a method of manufacturing a semiconductor device including a step of transferring onto a semiconductor substrate, the exposure mask includes a light-shielding film whose upper surface is formed on a transparent substrate at different heights according to a step on the surface of the semiconductor substrate. A method for manufacturing a semiconductor device, which comprises using an exposure mask having a pattern. 2. A semiconductor substrate having a step on its surface is coated with a photosensitive organic film, and light having a predetermined wavelength is exposed through an exposure mask on which an integrated circuit pattern is formed to expose the integrated circuit pattern. In the method of manufacturing a semiconductor device including the step of transferring onto the semiconductor substrate, as the exposure mask, a plurality of partial exposure masks divided according to a step on the surface of the semiconductor substrate is used, and each of the partial exposure masks is used. A method for manufacturing a semiconductor device, which comprises exposing the film by focusing on the film. 3. A photosensitive organic film is deposited on a semiconductor substrate having a step on the surface, and light having a predetermined wavelength is exposed through an exposure mask on which an integrated circuit pattern is formed to expose the integrated circuit pattern. In a method for manufacturing a semiconductor device including a step of transferring onto a semiconductor substrate, a light-shielding plate having a plurality of light-shielding portions that shields a region other than partial regions divided according to a step on the surface of the semiconductor substrate is prepared, A method of manufacturing a semiconductor device, comprising: holding a light shielding plate and the exposure mask in a predetermined shape, and then exposing each of the partial regions by focusing. 4. A transparent substrate and a pattern of a light-shielding film formed on the transparent substrate, wherein a photosensitive organic film is deposited on the surface by exposure to transfer the integrated circuit pattern onto the semiconductor substrate. The exposure pattern, wherein the exposure mask has a pattern of the light-shielding film whose upper surface is formed at different heights corresponding to the steps existing on the surface of the semiconductor substrate.