JPH0636595Y2 - 半導体集積回路装置 - Google Patents

半導体集積回路装置

Info

Publication number
JPH0636595Y2
JPH0636595Y2 JP11134085U JP11134085U JPH0636595Y2 JP H0636595 Y2 JPH0636595 Y2 JP H0636595Y2 JP 11134085 U JP11134085 U JP 11134085U JP 11134085 U JP11134085 U JP 11134085U JP H0636595 Y2 JPH0636595 Y2 JP H0636595Y2
Authority
JP
Japan
Prior art keywords
input
output
protection
lsi
semiconductor integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP11134085U
Other languages
English (en)
Japanese (ja)
Other versions
JPS6219756U (US06534493-20030318-C00166.png
Inventor
和人 棚橋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP11134085U priority Critical patent/JPH0636595Y2/ja
Publication of JPS6219756U publication Critical patent/JPS6219756U/ja
Application granted granted Critical
Publication of JPH0636595Y2 publication Critical patent/JPH0636595Y2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0555Shape
    • H01L2224/05552Shape in top view
    • H01L2224/05554Shape in top view being square

Landscapes

  • Semiconductor Integrated Circuits (AREA)
JP11134085U 1985-07-19 1985-07-19 半導体集積回路装置 Expired - Lifetime JPH0636595Y2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11134085U JPH0636595Y2 (ja) 1985-07-19 1985-07-19 半導体集積回路装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11134085U JPH0636595Y2 (ja) 1985-07-19 1985-07-19 半導体集積回路装置

Publications (2)

Publication Number Publication Date
JPS6219756U JPS6219756U (US06534493-20030318-C00166.png) 1987-02-05
JPH0636595Y2 true JPH0636595Y2 (ja) 1994-09-21

Family

ID=30991172

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11134085U Expired - Lifetime JPH0636595Y2 (ja) 1985-07-19 1985-07-19 半導体集積回路装置

Country Status (1)

Country Link
JP (1) JPH0636595Y2 (US06534493-20030318-C00166.png)

Also Published As

Publication number Publication date
JPS6219756U (US06534493-20030318-C00166.png) 1987-02-05

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