JPH0636455A - Information signal processing device - Google Patents

Abstract

PURPOSE:To reduce a processing amount per unit time and to perform signal processing at low speed by applying demodulation processing to a sample pulse signal by means of a clock signal having a 1/n times frequency of that of a sampling clock signal. CONSTITUTION:A clock signal having the frequency of 4MHz is generated from a clock generator 103 and becomes a clock signal having an half frequency 2MHz by a frequency divider 109. This 2MHz clock signal is supplied to an A/D converter 102 as the sampling clock for a frequency modulated audio signal separated from a reproduced RF signal through a pre-filter 101 and in the meantime to the respective parts shown by a demodulation processing block 110 as a clock signal for controlling demodulation processing. Thus, the circuit for demodulation processing is operated by a clock signal having a low frequency and the amount of arithmetic processing per unit time is reduced.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an information signal processing device, for example, an information signal processing device for processing an FM-modulated information signal.

[0002]

2. Description of the Related Art Conventionally, as a device for processing an FM-modulated information signal, an audio signal recorded on a magnetic tape in an FM-modulated state is reproduced and demodulated, such as a video tape recorder. There is a device.

FIG. 4 is a diagram showing an example of a schematic configuration of a demodulation device for demodulating an FM-modulated audio signal reproduced from a recording medium as a conventional information signal processing device.

In FIG. 4, a reproduction RF signal reproduced by a reproduction head from a recording medium such as a magnetic tape (not shown) and amplified by a head amplifier is subjected to an analog / digital (A / D) signal through a prefilter 401. It is supplied to the converter 402.

The reproduced RF signal is, for example, as shown in FIG.
As shown in (4), the four-frequency pilot signal 501 for tracking control, the modulation color signal 502, the FM modulation audio signal 503, and the modulation luminance signal 504 are frequency-multiplexed signals.

Further, the pre-filter 401 of FIG. 4 has a characteristic of passing only the frequency band 505 in which the FM-modulated audio signal 503 is located from the input reproduction RF signal, as shown in FIG. 5 (b). have.

The A / D converter 402 converts the signal supplied from the pre-filter 401 into the clock generator 4.
A sampling pulse signal is formed and output by sampling in accordance with a clock signal of a predetermined frequency generated by the signal generator 03.

The clock signal generated from the clock generator 403 is also supplied to each section in the demodulation processing block indicated by the dotted frame in the figure.

The processing frequency of the demodulation operation of the FM-modulated audio signal introduced here is the sampling frequency of the sampling operation performed by the A / D converter 402 in accordance with the clock signal generated by the clock generator 403. .

For example, the carrier frequency of the FM-modulated audio signal is 1.5 MHz, and the frequency deviation is ± 100K.
If it is set to Hz, the sampling frequency in the A / D converter 402 needs to be set to more than twice the maximum value of the frequency component of the demodulated signal (that is, the FM-modulated audio signal), and therefore (1.5 MHz + 100 KH
z) × 2 = 3.2 MHz or more, which is 4 MHz with some margin.

When the signal output from the pre-filter 401 is sampled by the A / D converter 402 at the sampling frequency of 4 MHz as described above, the A / D converter 402 outputs the signal shown in FIG. A signal having a frequency spectrum as shown in (c) is output.

In FIG. 5C, 506 is the sampling frequency and 507 is the Nyquist frequency of the sampling frequency.

Then, the sample pulse signal output from the A / D converter 402 is divided into two parts, one of which is unchanged and the other of which is phase-shifted by the phase shifter 404 by π / 2.
It is supplied to the divider 405.

Here, the sample pulse signal is referred to as "A
When expressed as sin θ (t) ”(A indicates amplitude), the signal passed through the phase shifter 404 is expressed as“ Acos θ (t) ”, and the two signals supplied by the divider 405 are By dividing, “Asin θ (t) / Aco
The signal of sθ (t) = tanθ (t) ”is output and t
A signal indicating “θ (t)” is obtained through the an ⁻¹ circuit 406.

If the angular frequency of the carrier of the FM modulated audio signal is "ωc" and the FM demodulated audio signal is "f (t)", then "θ (t) = ω".
ct + ∫f (t) dt ”, the differentiator 407
"Dθ (t) / dt = ωc + f (t)"
Then, by further correcting “ωc” corresponding to the DC component by the corrector 408, the corrector 408 outputs F
The M-demodulated audio signal "f (t)" is output.

[0016]

However, in the structure of the conventional demodulation device as described above, the frequency of the clock signal for controlling the operation of each part in the demodulation processing block indicated by the dotted frame in FIG. , The sampling frequency is set to be equal to or more than twice the maximum value of the frequency component of the demodulated signal (that is, the FM-modulated audio signal), the amount of calculation processing per unit time is large, and Since it is necessary to perform arithmetic processing, it is very costly to configure the device with a high-speed arithmetic processing circuit, and when the demodulation processing block is constituted by a digital signal processor or the like, the demodulation processing by software Realization becomes very difficult.

The present invention solves the above-mentioned conventional problems, reduces the amount of arithmetic processing per unit time, and can process information signals with a low-speed arithmetic processing circuit, which simplifies the apparatus and reduces It is an object of the present invention to provide an information signal processing device that can reduce costs.

[0018]

An information signal processing apparatus according to the present invention inputs an information signal having a predetermined frequency band and has a frequency n times (n is a positive integer) half the frequency of the first frequency. Is located in a frequency band lower than the frequency band of the input information signal, and has a frequency (n + 1) times (n is a positive integer) half the frequency of the first frequency of the input information signal. According to a clock signal having a first frequency located in a frequency band higher than the frequency band,
By sampling the input information signal,
The present invention comprises a sampling means for outputting a sample pulse signal, and a sample pulse signal processing means for processing the sample pulse signal output from the sampling means in accordance with the clock signal having the first frequency. Sampling means for outputting a sample pulse signal by inputting an information signal having a frequency band and sampling the input information signal according to a clock signal having a first frequency; and a sample pulse signal output from the sampling means. Is processed in accordance with a clock signal having a frequency of 1 / n (n is a positive integer) of the first frequency.

[0019]

According to the above configuration, the information processing amount per unit time can be reduced, the information signal can be processed by the low-speed arithmetic processing circuit, and the apparatus can be simplified and the cost can be reduced. An object is to provide a signal processing device.

[0020]

EXAMPLES The present invention will be described below with reference to examples of the present invention.

FIG. 1 is a diagram showing a schematic configuration of a demodulator to which the present invention is applied, as a first embodiment of the present invention.

In FIG. 1, the frequency from the clock generator 103 is 4 as in the conventional demodulator shown in FIG.
A clock signal of MHz is generated, and the frequency of the generated clock signal is further divided by a frequency divider 109 so that the frequency of the clock signal is 2 MHz. 1 is supplied to the A / D converter 102 as a sampling clock signal of the FM-modulated audio signal separated by way of the signal, and is also shown as a dotted line frame 1 in FIG. 1 as a demodulation processing control clock signal.
It is supplied to each part in the demodulation processing block shown by 10.

Incidentally, FIG. 2A shows the clock generator 1
2 shows the output waveform of the clock signal having a frequency of 4 MHz, and FIG. 2B shows the output waveform of the clock signal having a frequency of 2 MHz output from the frequency divider 109.

FIG. 3 is a diagram showing the frequency spectrum of the signal of each part in FIG.

In FIG. 3A, 301 is an F supplied from the pre-filter 101 to the A / D converter 102.
The M-modulated audio signal has a frequency component represented by a Bessel function centered on the carrier frequency of 302.

In the present embodiment, the frequency 303 is n times the Nyquist frequency (n is a positive integer) and is located in the frequency band lower than the frequency band of the FM modulated audio signal. A clock signal output from the frequency divider 109 by setting a frequency 304 which is (n + 1) times the frequency (n is a positive integer) and is located in a frequency band higher than the frequency band of the FM-modulated audio signal. Is set to the same frequency as the frequency 304.

For example, when n = 1, the frequency 303
Is the Nyquist frequency, the frequency 304 becomes the frequency of the sampling clock signal 305 shown in FIG.
By driving the D converter 102 and sampling the FM-modulated audio signal, the frequency spectrum of the sample pulse signal output from the A / D converter 102 is as shown in FIG. The signal is folded symmetrically around the Nyquist frequency.

When the frequency of the sampling clock signal is set as described above, the frequency component of frequency 303 or lower and the frequency component of frequency 304 or higher in the reproduction RF signal are sufficiently attenuated by the pre-filter 101. .

Now, paying attention to the frequency spectrum shown in FIG. 3B, this frequency spectrum is the frequency spectrum of the sample pulse signal obtained by sampling the FM modulated audio signal 307 of the carrier frequency 306 according to the sampling clock signal 305. The sample pulse signal obtained by driving the A / D converter 102 according to the sampling clock signal 305 can be regarded as the same as the frequency 3
If the demodulation processing circuit performs demodulation processing in accordance with the clock signal 04, a demodulation signal equivalent to the demodulation signal obtained by the conventional demodulation device operates at a clock signal of a lower frequency than the conventional demodulation device at low cost. It can be obtained by the processing circuit.

By the way, in the above case, the frequency of the sampling clock signal 305 is set to "A", and the pre-filter 10
If the carrier frequency 302 of the FM-modulated audio signal 301 supplied from 1 is “B” and the carrier frequency 306 of the FM-modulated audio signal 307 folded back by sampling is “C”, then “C = A−B”. Yes, in this embodiment, “A” = 2 MHz, “B” = 1.5 M
Since it is Hz, "C" = 500 KHz.

The demodulation processing block 110 in FIG.
Since the operation of each unit therein is similar to that of the conventional demodulation device, detailed description thereof will be omitted here.

Further, in this embodiment, in order to clarify the difference from the conventional demodulation device, the clock signal generated by the clock generator 103 is frequency-divided by the frequency divider 109 to obtain A /
Although the D converter 102 and the respective units in the demodulation processing block 110 are configured to be supplied, a clock signal having a frequency of 2 MHz is generated in the clock generator 103, and the A / D converter 102 is used without using the frequency divider 109. And may be configured to be supplied to each unit in the demodulation processing block 110.

As described above, in the demodulator according to the present embodiment, the FM-modulated audio signal is input, and the frequency of n times the Nyquist frequency (n is a positive integer) is input to the FM-modulated audio signal. It is located in a frequency band lower than the frequency component of the signal, and a frequency of (n + 1) times (n is a positive integer) times the Nyquist frequency is located in a frequency band higher than the frequency component of the input FM-modulated audio signal. A sampling pulse signal obtained by sampling the input FM-modulated audio signal according to a sampling clock signal having a different frequency is demodulated according to a clock signal having the same frequency as the sampling clock signal. , Reducing the amount of calculation processing per unit time in the demodulation processing, At fast Do arithmetic processing circuit can be demodulates the FM-modulated audio signal, simplification of the apparatus,
The cost can be reduced.

FIG. 6 is a diagram showing a schematic configuration of a demodulator to which the present invention is applied, as a second embodiment of the present invention. still,
6, constituent elements similar to those of the first embodiment shown in FIG. 1 are designated by the same reference numerals.

In FIG. 6, from the clock generator 103, as in the conventional demodulator shown in FIG.
A clock signal of MHz is generated, the generated clock signal is divided into two, and one is a pre-filter 1 for reproducing the RF signal.
The signal is directly supplied to the A / D converter 102 as a sampling clock signal of the FM-modulated audio signal separated by way of 01, and the other frequency is divided by the frequency divider 109 into half, whereby the frequency is After being a 2 MHz clock signal, it is supplied as a demodulation processing control clock signal to each part in the demodulation processing block indicated by the dotted frame 110 in FIG.

The output waveform of the clock signal generated by the clock generator 103 and having a frequency of 4 MHz is as shown in FIG. 2A, and the frequency output from the frequency divider 109 is 2 MHz. The output waveform of the clock signal is as shown in FIG.

By the way, as described above, when the FM modulation audio signal is sampled at a cycle of 4 MHz by operating the A / D converter 102 at the preceding stage according to the sampling clock signal having a frequency of 4 MHz, the A / D converter The sample pulse signal waveform output from 102 is as shown in FIG. 7A, and by operating each part in the demodulation processing block 110 in the subsequent stage according to the demodulation control clock signal having a frequency of 2 MHz, When the demodulation processing is performed in a cycle, the sample pulse signal waveform processed by each unit in the demodulation processing block 110 becomes as shown in FIG. 7B.

That is, the sample pulse signal is output from the A / D converter 102 in the preceding stage at a sampling period of 4 MHz as shown in FIG. Since the sample pulse signal output from the A / D converter 102 is demodulated at a cycle of 2 MHz which is half the sampling cycle,
This means that only every other sample pulse signal output from the D converter 102 at a sampling period of 4 MHz can be processed, and the sample pulse signals processed by the respective units in the demodulation processing block 110 are shown in FIG. ), The sample pulse signal output from the A / D converter 102 at a sampling cycle of 4 MHz is resampled at the timing of 2 MHz which is the operation cycle of the demodulation processing block 110. Things and equalization.

Therefore, the frequency spectrum of the signal of each part in FIG. 6 is shown in FIG. 8, and the FM modulated audio signal supplied from the pre-filter 101 to the A / D converter 102 is shown in FIG. 8 (a). From the A / D converter 102 which has a frequency component represented by a Bessel function centered on a carrier frequency of 1.5 MHz and which samples the FM-modulated audio signal in accordance with a sampling clock signal having a frequency of 4 MHz. As shown in FIG. 8B, the output sample pulse signal is in a state where the Nyquist frequency 801 of 2 MHz is symmetrically folded back.

Then, the sample pulse signal processed in each part in the demodulation processing block 110 in the subsequent stage, which performs the demodulation processing in accordance with the demodulation processing control clock signal having the frequency of 2 MHz, is as described above as shown in FIG. The frequency component of the sample pulse signal before re-sampling is 1 MH
Since it is z or more, it is resampled to 1
The signal is also folded back to the low frequency side of the Nyquist frequency 802 of MHz.

By the way, in the above case, the frequency corresponding to the carrier frequency of the signal component folded back to the low frequency side of the Nyquist frequency 802 of 1 MHz by re-sampling becomes 500 KHz.

When the frequency for re-sampling is set as described above, the frequency of the reproduced RF signal is set to 8
The frequency component of 02 or less and the frequency component of frequency 801 or more are sufficiently attenuated by the prefilter 101.

By the way, paying attention to the frequency spectrum shown in FIG. 8C, this frequency spectrum is 5
It may be considered to be the same as the frequency spectrum of the sample pulse signal obtained by sampling the FM-modulated audio signal having a carrier frequency of 00 KHz according to the sampling clock signal having a frequency of 2 MHz.
If the demodulation processing circuit demodulates the sample pulse signal obtained by driving the D converter 102 according to the sampling clock signal with the frequency of 4 MHz according to the clock signal with the frequency of 2 MHz, the demodulation processing circuit can be converted into a conventional demodulation device. It is possible to operate with a clock signal having a lower frequency than that of the conventional demodulator, and to reduce the amount of calculation processing per unit time. It can be obtained with a clock signal.

The demodulation processing block 110 in FIG.
Since the operation of each unit therein is similar to that of the conventional demodulation device, detailed description thereof will be omitted here.

As described above, in the demodulator shown in this embodiment, the FM-modulated audio signal is input, and the input FM-modulated audio signal is sampled according to the sampling clock signal having a predetermined frequency. By configuring the sampling pulse signal to be demodulated in accordance with the demodulation control clock signal having a frequency of 1 / n (n is a positive integer) of the frequency of the sampling clock signal, the circuit for performing the demodulation process can be operated at a low frequency. By operating with a clock signal, the amount of arithmetic processing per unit time can be reduced, and the FM-modulated audio signal can be demodulated by a low-speed arithmetic processing circuit, which simplifies the device and reduces the cost. And a circuit for performing the demodulation processing is configured by a digital signal processor or the like. In case, the realization of the demodulation processing by software is facilitated.

[0046]

As described above, according to the present invention, the amount of arithmetic processing per unit time can be reduced and the information signal can be processed by the low-speed arithmetic processing circuit, which simplifies the device and reduces the cost. Therefore, it is possible to provide an information signal processing device that can be realized.

[Brief description of drawings]

FIG. 1 is a diagram showing a schematic configuration of a demodulation device to which the present invention is applied as a first embodiment of the present invention.

FIG. 2 is a diagram showing a waveform of a clock signal in the demodulation device shown in FIG.

FIG. 3 is a diagram showing a frequency spectrum of a signal of each unit in the demodulation device shown in FIG.

FIG. 4 is a diagram showing an example of a schematic configuration of a demodulation device that demodulates an FM-modulated audio signal reproduced from a recording medium as a conventional information signal processing device.

5 is a diagram showing a frequency spectrum of a signal of each unit in the demodulation device shown in FIG.

FIG. 6 is a diagram showing a schematic configuration of a demodulation device to which the present invention is applied as a second embodiment of the present invention.

7 is a diagram showing a waveform of a sample pulse signal in the demodulator shown in FIG.

8 is a diagram showing a frequency spectrum of a signal of each unit in the demodulation device shown in FIG.

[Explanation of symbols]

 103 clock generator 109 frequency divider

Claims (3)

[Claims] 1. An information signal having a predetermined frequency band is input, and a frequency n times (n is a positive integer) half the frequency of the first frequency is lower than the frequency band of the input information signal. A first frequency band located in a band and having a frequency that is (n + 1) times (n is a positive integer) a half frequency of the first frequency band is higher than a frequency band of the input information signal; Sampling means for outputting a sample pulse signal by sampling the input information signal according to a clock signal having a frequency of An information signal processing device, comprising: a sample pulse signal processing means for processing according to a signal. 2. Sampling means for outputting a sample pulse signal by inputting an information signal having a predetermined frequency band and sampling the inputted information signal according to a clock signal having a first frequency, and the sampling means. And a sample pulse signal processing means for processing the sample pulse signal output from the clock signal in accordance with a clock signal having a frequency of 1 / n (n is a positive integer) of the first frequency. apparatus. 3. The information signal is an FM-modulated audio signal, and the sample pulse signal processing means demodulates the FM-modulated audio signal. 2. The information signal processing device according to 2.