JPH06348820A - Appearance inspection device for mask for printed wiring board - Google Patents

Abstract

PURPOSE:To improve reliability for a mask for printed wiring board. CONSTITUTION:This device is comprised of a mask reader 2 which fetches the pattern of a mask to be inspected as bit map information, a mask inspecting specification fetching part 24 which fetches the appearance inspecting specification of the mask, a CAD information fetching part 21 which fetches CAD information when the mask is generated, a graphic information generating part 25 which converts the bit map information to graphic information including the external shape of a pattern, a graphic arithmetic part 26 which performs arithmetic processing for the superimposed state of the patterns of the masks in different layers, the minimum width of the pattern, and a gap between the patterns, etc., setting at least the graphic information obtained at the graphic information generating part 25 and fetched mask inspecting specification as input, a comparison inspecting part 27 which detects the disconnection and short-circuited part of the mask pattern setting at least the graphic information obtained at the graphic information generating part 25 and fetched CAD information as input, and a display part 6 which outputs the processing results of the graphic arithmetic part 26 and the comparison inspecting part 27.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a mask appearance inspecting apparatus for inspecting a mask appearance defect of a printed wiring board, and particularly for reducing inspection omission of the appearance appearance defect of the mask of the printed wiring board which is made fine with high density. Further, the present invention relates to a mask appearance inspection device that automatically detects a mask appearance defect portion.

[0002]

2. Description of the Related Art A printed wiring board forming mask is formed with wiring patterns and through-holes for connecting wiring patterns which are vertically stacked to each other at predetermined positions. These wiring patterns and through holes are usually drawn by a CAD system, and a full-scale mask is created based on this drawing. As described above, after the mask is manufactured, it is inspected for mask pattern breaks (breaks), protrusions, pattern width shortages, short circuits between patterns, foreign matter adhesion, pinholes, and other abnormal appearances after the mask is manufactured. It The appearance defects include defects that are artificially and mechanically generated when the mask is formed and dust attached to the mask.
FIG. 3 shows an example of the appearance defect of the mask.
There are notches 11, protrusions 12 and 13, pinholes 14, silk masks and sags 15 into the through holes.

Most of the masks of printed wiring boards have a pattern width indicating wiring, a pattern gap, and a land / hole diameter of 1 /
It is drawn in a fine pattern with 100 mm accuracy. In the conventional mask inspection, the inspector moves the lens in a slice shape on the mask at regular intervals and visually observes the mask drawing magnified by the lens. Abnormal appearance such as short circuit, foreign matter adhesion, pinhole, etc. is identified. The inspector measures the detailed dimensions with a length measuring machine. On the other hand, in the mask appearance inspection of LSI, a defect inspection is performed by a comparison and collation method. In the inspection method, mask information is read by an optical device using a lens, and this is converted into electronic information by a photoelectric converter. There are a method of comparing and collating these with each other by chips, a method of comparing with a standard mask, a method of comparing with design data, and the like. However, all of these required expensive equipment for visual inspection.

[0004]

Since the above-mentioned conventional technique is a method of relying on human visual inspection for the appearance defect inspection of the mask for making a printed wiring board, there is a possibility of overlooking the defect.
Moreover, no consideration was given to automation, and although the time and labor were required, the reliability of the visual inspection was not sufficiently secured.

In Japanese Patent Laid-Open No. 63-143677, image data of a component mounted on an electronic circuit board is captured by a camera, and component information such as the type and direction of the component is detected from the captured image data. There is disclosed an inspection device that compares the component information of a component mounted on the electronic circuit board stored in a storage unit to determine whether the component is correct or incorrect. However, in this device, it is necessary to store the component information of the components mounted on the electronic circuit board in the storage means in advance, and there is a problem that the labor for storing the component information increases and erroneous input at the storage stage. However, there is no mention of inspection of the pattern of the wiring itself such as short circuit, disconnection, insufficient spacing between adjacent wirings, and insufficient wiring width. Further, Japanese Patent Laid-Open No. 1-236379 discloses a CA of a component to be inspected.
The D data is stored in the memory in advance, the chip parts on the mounted board are imaged by the color television camera, the obtained signals are converted into digital signals for each of the three primary colors, and the digital signals of the chip parts are used. An apparatus for detecting the position of an edge and comparing the obtained edge position with the CAD data stored in the memory to detect the presence or absence of positional deviation of the component is disclosed. Also in this device, the inspection of the wiring itself is not mentioned, and in the case of the wiring pattern etc., the CAD data is based on the center line and the outline is not displayed, and the distance between the patterns and the width of the pattern are not shown. Unsuitable for detection.

An object of the present invention is to improve the reliability of a mask for producing a printed wiring board, especially the reliability of a wiring pattern.

[0007]

Means for Solving the Problems The above-mentioned objects are as follows: a mask inspection specification fetching means, a mask creating CAD information fetching means, a mask reading means for reading a mask pattern as mask information, and a read mask information pattern. The graphic information creating means for converting to the graphic information including the outer shape of, and the pattern information obtained at least by the graphic information creating means and the mask inspection specification taken in as input, the overlapping state of the patterns of masks of different layers, A figure calculating means for calculating the minimum width of a pattern and a gap between patterns, and at least the figure information obtained by the figure information creating means and the CAD information taken in are inputted to extract a defective portion of a mask. Defect extraction means, display for outputting the figure calculation means and the processing result of the defect extraction means It is achieved by a printed wiring board for mask inspection system that includes a stage.

[0008]

The pattern of each mask on the printed wiring board is taken in as bitmap information by the mask reading means. The bitmap information is converted into polygon graphic information by the graphic information creating means, arranged and stored for each layer in the auxiliary storage device. On the other hand, the connection point coordinates for each signal are fetched from the CAD information when the mask is created, and are arranged and stored for each signal in the auxiliary storage device. The mask inspection specification is captured and stored by the mask inspection specification capturing means.

Next, the figure calculation means extracts the figure information of a single applicable layer or a plurality of applicable layers in accordance with the set mask inspection order, and calculates the outline data for the inspection. Defects caused by protrusions generated on the pattern outer shape of the mask are detected as gap defects between patterns by calculating the gap between the contour lines of the figure, and defects caused by chipping of the mask are detected by calculating the minimum width of the figure. Defects due to mask pinholes are detected by calculating the minimum width of the figure. On the other hand, a pinhole is also detected from the presence / absence of an inclusion figure that includes another figure in the figure. The defect caused by the sagging of the silk mask into the through hole is detected from the overlap of the figure between the silk layer and the layer between the layers.

Further, the defective portion extracting means compares and collates the connection point information for each signal of the CAD information with the signal path generated from the overlap of the graphic information of the mask of the layer to be inspected, thereby causing a short circuit or disconnection. Is detected.

These inspection results are displayed on the display means.

[0012]

EXAMPLES Hereinafter, specific examples of the present invention will be described in detail.

FIG. 1 is a block diagram showing the main components of a mask visual inspection apparatus which is an embodiment of the present invention. Figure 1
The mask visual inspection apparatus shown in (1) is connected to the mask reading device 2 which is an electron beam scanning reader having a resolution of 8 to 16 dots / mm used in a copying machine, a facsimile, etc., and the output side of the mask reading device 2. Centralized control processing device 3 having an integrated centralized control function, and the centralized control processing device 3
The keyboard input device 4 and the mouse input device 5 are connected to the above, and the display output device 6 which is connected to the central control processing device 3 and serves as a display means. The mask reading device 2 reads a pattern of a mask for producing a printed wiring board (hereinafter referred to as a mask to be inspected) 1.

The centralized control processor 3 is a CA that takes in the data stored in the CAD interface file 20.
D information acquisition unit 21 and the CAD information acquisition unit 21
An auxiliary storage unit 29 connected to the CAD information acquisition unit 21 for storing the data captured by the CAD information capturing unit 21, a mask reading unit 22 connected to the output side of the mask reading apparatus 2 for storing the output of the mask reading apparatus 2, and an input side. Is connected to the mask reading unit 22 and the output side is connected to the auxiliary storage unit 29.
The graphic information creating unit 25 connected to the
9 is connected to the auxiliary memory 29, a comparison inspection unit 27 which is also connected to the auxiliary storage unit 29 and serves as defect defect extracting means, and a mask inspection specification fetching unit 24 connected to the graphic operation unit 26. The operation of each of these components 20 to 29 is controlled, and the keyboard 4 and mouse 5 are
And a control unit 30 that controls the operation of each of the components 20 to 29 based on signals input from the components.

The calculation processing unit 7 including the graphic information creation unit 25, the graphic calculation unit 26, the comparison inspection unit 27 and the auxiliary storage unit 29.
Is configured.

FIG. 2 is a perspective view showing an example of the hardware structure of the mask visual inspection apparatus shown in FIG. In the illustrated example, CA
The D information and the mask inspection specifications are stored in advance in the floppy disk, and are sent from the floppy disk to the CAD information acquisition unit 21 and the mask inspection specification acquisition unit 24 in the control processing device 3 via the disk drive of the control processing device 3. It has become.

FIG. 3 shows an example of appearance defects of a mask to be inspected by the mask appearance inspection apparatus of the present invention. These appearance defects include defects which are artificially and mechanically generated at the time of mask production and masks. It contains dust attached to. As the appearance defects, as described above, for example, the chip 11, the protrusion 1
2, 13, pinholes 14, silk masks and drip 15 into through-holes.

The operation of the mask visual inspection apparatus having the above construction will be described below with reference to FIGS. Printed board CA
The interface file 20 of the D system stores mounting information (CAD information) at the time of mask creation such as signal connection point information, component information, through hole information, wiring route information, signal table, pin pin table, and the like. CA
The D information acquisition unit 21 uses the interface file 2
The CAD information of 0 is fetched and stored in the auxiliary storage device 29. The mask appearance inspection specification 23 includes a specification of a mask layer such as a component surface and a solder surface, a pattern gap length that is a criterion for determining a protrusion, a minimum pattern width that is a criterion for determining a chip, and a specific criterion value for determining a defect. Included, mask inspection specification importer 2
4 fetches and stores these information. The mask reading device 2 reads the pattern of the manufactured mask 1 to be inspected by electron beam scanning and reading, and converts it into bit map information of an electric signal. From the pattern 31 of FIG. 4, the pattern 34 of FIG. 5, and the pattern 38 of FIG. 6, the bitmap information 32 of FIG. 4, the bitmap information 36 of FIG. 5, and the bitmap information 39 of FIG. 6 are obtained, respectively. The obtained bitmap information is stored in the mask reading unit 22.

From the bitmap information 32, 36, 39 shown in FIGS. 4, 5, and 6 stored in the mask reading unit 22, the graphic information creating unit 25 uses the outline of each pattern (when there is a hole). The polygon graphic information 33, 37, 40 indicating the hole shape is created, and the obtained graphic information is registered and stored in the auxiliary storage unit 29 for each mask layer.

The graphic calculation unit 26 reads the graphic information stored from the auxiliary storage unit 29 and performs the overlap calculation shown in FIG.
The minimum width calculation shown in FIG. 8 is performed. The overlap calculation shown in FIG. 7 is for obtaining an intersection relation between two figures in one mask. (1) is an intersection relation, (2) is an inclusion relation, and (3)
Indicates the relationship of separation. (2) and (3) in FIG.
Furthermore, the shortest gap length L between the two figures is obtained. The minimum width calculation shown in FIG. 8 is to obtain the minimum width L of the most constricted part in the figure. The result obtained by the overlap calculation and the minimum width calculation is the mask inspection specification acquisition unit 2
The inspection specifications stored in No. 4 are checked to determine whether there is a defect. The determination result is stored in the auxiliary storage unit 29.
Here, it is checked whether the protrusions of the mask pattern are below the specification gap length, the mask is missing if the minimum width of the figure is below the specification, and the pinholes in the mask are Each is detected by checking the inclusion relation of the figure. From the example of FIG. 9, (1) a plurality of layers of a silk mask layer and a resist mask layer are targeted for the sagging defect in the through hole,
(2) It is detected by checking the overlap of figures between different layers.

In the comparison / inspection unit 27, the auxiliary storage unit 29 determines whether the wiring pattern is broken or the wiring pattern is short-circuited.
It is detected based on the graphic information and CAD information read from the above, and the detection result is output and stored in the auxiliary storage unit 29. Here, pattern short-circuiting due to protrusions, dust, etc., and pattern disconnection due to chipping are detected by performing a logical connection check of mask information. The detection of the short circuit and the disconnection of the pattern will be described with reference to FIGS. First,
Connection point for each signal from CAD information (S1 signal is P1, P2
2 point connection, S2 is 2 point connection of P3 and P4), the penetration information of the hole is taken in, and the connection point table 1004 is generated. Next, the figure information 1005 and 1006 of the component surface and the solder surface is used to find the overlapping of figures on the XY plane from the mask information of the auxiliary storage unit 29, and the hole penetration information 1007 from the CAD information is used to separate the layers. Connected and a wiring path is generated. From the obtained wiring route, connection point table 1
008 is generated. In the example of the normal mask, the signal acquired from the CAD information and the connection point (S1 signal is P1, P2
Is a two-point connection of S2, a two-point connection of S2 is a three-point connection of P3 and P4) is a signal of a wiring route obtained from mask information,
1 and P2, and S2 is the same as P3 and P4), and no defect (short circuit, disconnection) is detected.

An example of the short circuit mask shown in FIG. 11 is P
In the case where the connection point of a plurality of signals is included in one figure due to the short circuit of 1 and P3, the signal of the wiring route of the connection point table 1104 generated from the mask information, the connection point (S1 is P
The presence of a short circuit is detected because the number of signals of the CAD information is less than the number of signals of CAD information and the two do not match. Similarly, the example of the disconnection mask shown in FIG. 11 is a case where the S2 signal is separated from the disconnection of the P3 and P4 paths, and the connection point table 110 generated from the mask information.
The number of signals of 8 wiring paths and connection points (the S1 signal is a two-point connection of P1 and P2, S2 is a three-point connection of P3 and S3 is a one-point connection of P4) are larger than the number of signals of CAD information, and both do not match. Disconnection is detected from.

In the connection inspection, the presence or absence of a defect is judged by checking the above three ways. Here, an example using a two-layer mask has been described, but a multi-layer mask is also inspected by a similar method. The inspection result is output to and stored in the auxiliary storage unit 29.

When the calculation of the graphic calculation unit 26 and the comparison inspection unit 27 is completed, the control unit 30 instructs the inspection result output unit 28 to output the inspection result, and the inspection result output unit 28 receives this instruction. The inspection result is read from the auxiliary storage unit 29 and output to the display unit 28 as image data or character data for displaying the presence / absence of a mask abnormality and the defective portion.

The mask appearance inspection result display unit 28 displays the input image data or character data on the screen. In this embodiment, the inspection result is displayed on the screen, but it may be output by a printer.

FIG. 12 shows an example of the processing flow of the mask appearance inspection. First, CAD information is fetched and stored from the CAD interface file 20 (step 120).
1) The mask inspection specifications are fetched and stored (step 120).
2) be done. Next, the pattern of the manufactured mask 1 to be inspected is read (step 1203), converted into a bit map (step 1204), and stored in the mask reading unit 22. At this time, the masks forming the same wiring board are stored as one group so that the overlapping order can be seen. Next, polygon figure information is generated from the bitmap stored in the mask reading unit 22, and is stored and registered in the auxiliary storage unit 29 (step 1205). Steps 1203 to 1205 are automatically executed.

When the reading of the mask 1 to be inspected is completed and the instruction to start the inspection is input from the keyboard 4, the gap between the patterns is calculated based on the polygon graphic information stored and registered in the auxiliary storage unit 29. The presence or absence of protrusions is checked (step 1206), then the inclusion relationship of the figures is calculated and the presence or absence of pinholes is checked (step 1206).
1207). In step 1208, the minimum width of the wiring pattern is calculated to check if the pattern is missing or not, and then the intersection between the masks is calculated to check whether another figure hangs in the through hole (step 1209).
The processing from step 1206 to step 1209 is performed by the graphic calculation unit 26, and the calculation result is collated for each step with the inspection specifications stored in the mask inspection specification importing unit 24 to determine whether or not there is a defect. The determination result is stored in the auxiliary storage unit 29.

Next, according to the procedure described above, the intersection calculation between the patterns is performed to check the presence or absence of disconnection or short circuit of the wiring pattern, and the determination result is stored in the auxiliary storage unit 29 (step 1210). The process of step 1210 is executed by the comparison inspection unit 27.

When the above steps 1206 to 1210 are completed for all the read masks 1 to be inspected, the control unit 30 instructs the determination result display, and the mask defect portion is displayed on the screen (step 1211).

In the above embodiment, the processing of step 1210 is performed after the processing of steps 1206 to 1209 is completed. However, the processing of steps 1206 to 1209 is performed by the graphic operation unit 26, and the processing of step 1210 is performed. Since it is performed by the comparison inspection unit 27, the processes of steps 1206 to 1209 and the process of step 1210 may be performed in parallel.

As described above, in the present embodiment, since the calculation from the reading of the mask to the conversion of the figure information and the defect inspection by the geometrical calculation of the figure are performed by the computer, the part relying on the visual inspection of the person is reduced, The man-hour of the inspector is reduced and the reliability of the inspection result is improved.

Next, a procedure of generating polygon graphic information from bitmap information, a graphic overlap inclusion check and a gap calculation processing procedure between figures, a minimum width calculation processing procedure within the same figure, and a disconnection and short circuit detection. The processing procedure will be described in detail with reference to the drawings.

First, a procedure for generating polygon graphic information from bitmap information will be described with reference to FIGS. The procedure shown in FIG. 14 corresponds to the processing procedure of steps 1203 to 1205 shown in FIG. First, the reading device 2 reads the pattern 34 of the mask 1 to be inspected and converts it into bitmap information 36 of 1,0 (140
1). Next, i is set to 1 (1402), and the bitmap information in the Y-column direction, in which the X coordinate i of the bitmap information 36 is 1, is extracted (1403). Of the extracted bitmap values in the Y column direction, one continuous scanning line is set as one line, and line segmentation in the Y direction is performed (1404). When the X coordinate i is 1, and the line segmentation process of the bitmap information in the Y column direction is completed, i is set to i + 1 (1405) and whether the line segmentation process is completed for all the X coordinates of the bitmap information 36. Is confirmed (1406). If not completed, steps 1403 to 1406 are repeated. If it has ended, proceed to step 1407. At this stage, the line-divided bitmap information 36A is obtained.

In step 1407, i is set to 1 (140
7). Next, the line segment whose X coordinate is i and the line segment whose X coordinate is i + 1 touch each other on the Y coordinate (overlap).
Let the line segment be a closed figure whose outer circumference is clockwise. A rectangular figure formed from line segments that touch each other on the Y-coordinate is targeted, and a closed figure in the clockwise direction whose coordinates are the vertices of the rectangle. In FIG. 13, for example, line segment P3P4 and line segments P5P6 and P7P8
, The two line segments P5P6 and P7P8 are in contact with the line segment P3P4, and P1P2, P3P4, P5P
A rectangle composed of line segments 6 and P7P8 is created. Next, the point Pa on the line segment P3P4 is the Y coordinate of P6, and the point Pb is the Y coordinate of P7.
As a coordinate, a clockwise closed figure P2P4P8P7PbPaP6P5P3P1 composed of rectangular vertices and Pa and Pb is formed. That is, when the line segment whose X coordinate is i is already a part of the closed figure, the X figure shows that the X coordinate is i + 1.
The shape of the closed figure is updated so that the closed figure is expanded by the line segment (1408). In the above example, since the line segment P3P4 is already a part of the closed figure P2P4P3P1, the new closed figure is the original closed figure P2P.
Closed figure P2P4P8P7PbPaP6P5P3P formed by expanding 4P3P1 by line segments P5P6 and P7P8
It becomes 1.

When a counterclockwise closed figure is formed inside the clockwise closed figure in the above process, it is recognized as a window figure of the clockwise closed figure and recognized as a figure (1409). That is, as a result of executing the procedure 1408, for example, in FIG. 13, a closed figure P2P4P8P12P11P7PbPaP6 is displayed.
When P10P9P5P3P1 is formed and the line segment P14P13 is processed in the next process, the closed figure P2P4P8P1
2P14PdPcP13P9P5P3P1 is formed,
At the same time, the closed figure PbP7P11PdPcP10P6Pa is formed.

Actually, a plurality of line segments are intermittently present on the same X coordinate. If there is no closed figure that touches each other in these line segments, a new closed figure is created (1410), and one closed figure is added according to the above basic processing.

At the end of procedure 1410, i is set to i + 1 (1411) and it is checked (1412) whether all line segments in the X-column direction have been processed. If not completed, the processes of steps 1408 to 1412 are repeated. If it has been completed, the conversion of the bitmap information to the polygon graphic information is completed. At this stage, the polygon graphic information 3 illustrated in FIG.
7 is obtained, and this data is stored in the auxiliary storage unit 29.

Next, the procedure for checking the inclusion of figures and the calculation of the gap between figures will be described with reference to FIGS. The procedure shown in FIG. 16 corresponds to the processing procedure of steps 1206 to 1207 shown in FIG. The figures in the following description are stored in the auxiliary storage unit 29 as polygon figure information.
Is a figure stored in. Two figures A shown in FIG.
B will be described as an example. First, in the two figures A and B, it is checked whether the rectangles (A ', B') including them overlap each other (1601). Rectangle (A ',
B ′) is larger than the rectangle inscribed by the figures A and B by the allowable minimum gap δ of the pattern. Rectangle (A ',
If B ′) does not overlap, it is determined that the graphics A and B do not overlap, a determination result to that effect is output, and the overlap check of the graphics ends. When the rectangles (A ′, B ′) overlap, the line segments (hereinafter,
It is checked whether there is an intersection of ai (i = 1 to 4) called element) and an element bj (j = 1 to 8) which is a line segment forming the outer shape of the graphic B (1603). If there is an intersection, it is determined that the graphics A and B overlap each other, a determination result to that effect is output, and the overlap check of the graphics ends.

If there is no intersection, proceed to step 1605,
It is determined whether one of the figures A and B is inside the other. When both figures A and B are outside the other side (when there is no inclusion relation), the gap length between the element ai and the element bj is calculated (1606). In FIG. 15, elements a3 and b
An example of calculating the gap length of 8 is shown. Such calculation is performed for each combination of elements. Once the gap length is calculated, it is determined whether the gap length meets the inspection specifications (16
07). If the gap length satisfies the inspection specifications, it is determined that there is no overlap, and the determination result to that effect is output. When the gap length does not meet the inspection specifications, it is determined to be a defect (insufficient gap length), and the layer name designating the mask in which the defect has occurred, the gap insufficient section, and the gap length are output (1608). ).

If it is determined in step 1605 that one of the figures A and B is inside the other (in the case of an inclusive relation),
It is checked whether the inner figure meets the inspection specifications (for example, the dimensional specifications that specify the conditions of through holes) (1609), and if it does not meet the inspection specifications, it is determined to be a pinhole, and a pinhole warning (defect occurs). The layer name and the inner figure that specify the mask being output are output (1610).

Next, with reference to FIGS. 17 and 18, a minimum width calculation processing procedure within the same figure will be described. The procedure shown in FIG. 18 corresponds to the processing procedure of step 1208 shown in FIG. The graphic in the following description is a graphic stored in the auxiliary storage unit 29 as polygon graphic information. First, the data of the figure to be inspected is taken out from the auxiliary storage unit 29 in a predetermined order. FIG. 17 shows a figure to be inspected explained in this embodiment. The outline of this figure is defined by the elements ai (i = 1 to 9), and the minimum width h is between the elements a3 (or element a4) and the element a8. Next, i = 1 is set (1801), and the gap length between the elements ai (i = 1 to 9) forming the figure and the elements a (i ± 1) before and after the element ai are It is required (1802). For example, in the case of the element a3, the gap length h5 with the element a5, the gap length h6 with the element a6, the gap length h7 with the element a7, the gap length h8 with the element a8, and the gap length h9 with the element a9 are calculated, respectively. It Allowable minimum value of each gap length for each figure (eg Minh5, Min for a3 element)
h6, Minh7, Minh8, Minh9) are set as the inspection specifications, and when the calculation of the gap length for a certain element ai is completed, it is determined whether the calculated gap length satisfies the inspection specifications (1803). If the gap length satisfies the inspection specifications, the procedure directly proceeds to step 1805. If the inspection specifications are not satisfied, it is determined that the minimum width is insufficient, and the mask layer, the width insufficient section and the width are output (1804). ), Proceed to step 1805.

In step 1805, i = i + 1 is set, and the flow advances to the next step 1806. In step 1806, it is checked whether or not the inspection of the gap length between all the elements is completed. If it is completed, the processing of the figure is completed.
02 to 1806 is repeated.

Next, the disconnection / short circuit detection procedure will be described with reference to FIG.
This will be described in detail with reference to 20, 21. The processing procedure shown in FIG. 21 corresponds to step 1210 of FIG. FIG. 19
Shows an example of a wiring pattern that is the target of the disconnection / short circuit detection processing. In the illustrated wiring pattern, the signal S1 entering the connection point P1 of the mask A is transmitted to the connection point P2 of the mask B via the through hole C, and the signal S entering the connection point P2 of the mask A.
2 is transmitted to the connection point P4 of the mask B through the through hole D. The CAD information of this mask is shown in FIG.
As described in 0, it consists of a signal table and a pin pin table. The signal table includes signal names S1 and S2 flowing in the corresponding mask and a pointer indicating an address where the signal name is stored. The pin pin table has connection points P1 and P2, and signal names S1 and S flowing through the connection points.
2 and a pointer corresponding to the combination of connection point and signal name. In FIG. 20, the pointer 2 corresponding to the combination of P1 and S1 to the pointer 0 corresponding to the combination of P2 and S1 is indicated by an arrow, indicating that the combination of P1 and S1 and P
It is shown that the combination of 2, S1 belongs to the same group and the same signal flows. Pointer 0 indicates that there is no other combination of connection point and signal name belonging to the same group.

As a processing procedure, first, a group table and a connection point table in which one closed figure generated from the mask is set as one group are created for the first mask among the masks which are in a relationship of being superposed on each other (210).
1), closed figures generated from masks which are successively overlapped with each other are group-connected between layers through through holes (2102). The closed figure referred to here is the one shown in FIG.
3 is a graphic defined by the polygon graphic information generated by the procedure described with reference to FIGS. Further, the number of groups included in the group table is calculated, and the number of groups n is set. When the mask pattern is normal and there is no defect such as disconnection or short circuit, the group table 2003 and the connection point table 2004 are created. The data defined in the pin / pin table 2002 is used as the combination of the connection point and the signal name. Since the set of P1 and S1 is connected to the set of P2 and S1 through the through hole, P1 and S1
An arrow is added to the set of P2 and S1 from the pointer 2 of the set of, and the set of P2 and S1 is no longer connected to another set, so that the pointer 0 is added.

Next, the first group is extracted from the group table, and n indicating the number of groups in the group table is set to n-1 (2103). It is checked in the connection point table whether the signal names of the connection points belonging to the extracted groups are the same (2104 to 2106). If they are not the same, it is determined that the graphic is short-circuited, and an indication of the short-circuit and the included signal name are output (2112). If the connection points belonging to that group all have the same signal name, proceed to the next step.
Continue to 2108. In step 2108, the number of connection points (pin pin number) whose signal names are the same as those checked in steps 2103 to 2106 are read from the pin-pin table of the CAD information, and the read pin-pin number and the group of connection point tables are read. It is checked (2109) whether or not the number of connection points is the same.
If they are the same, it is determined that there is no disconnection or short circuit in the group and the procedure proceeds to the next step 2113 (2111). If they are not the same, it is determined that the group is disconnected and the disconnection display and the corresponding signal name are displayed. It is output and the process proceeds to the next step 2113 (2110). Step 21
In 13, n indicating the number of groups in the group table is n =
It is confirmed whether or not 0, and if n = 0, the process ends (proceeding to step 1212 in FIG. 12), and if n = 0,
The processes of steps 2103 to 2113 are repeated. Steps 2110, 2112
The signal output in step 1 is stored and stored in the auxiliary storage unit 29 together with the signal indicating the corresponding mask.

According to the present invention, as described above, the mutual relationship of the masks divided into a plurality of layers such as the component surface, the solder surface, the power supply surface, the silk surface, and the resist surface is calculated by calculating the overlapping of figures. It is possible to check automatically by, and it is possible to minimize the oversight when a person visually inspects. In addition, since the contour of the mask pattern is calculated and calculated from the data read by the pattern reading device, and the interval and width of the pattern are detected based on the contour line of the actual pattern obtained, it occurs in the mask manufacturing process. It is possible to detect defects caused by pattern protrusions and chippings without the need for human visual inspection. In addition, by combining the external shape obtained by the above calculation and the connection point obtained from the CAD information,
By checking the combination of the connection point and the signal name obtained from the information, it is possible to detect a defect such as a short circuit or a disconnection of the wiring pattern without human eyes.

[0047]

According to the present invention, the mask pattern read in as bit information is converted into polygon graphic information, and the polygon graphic information is used to form the intervals between the outlines of the patterns, the overlap of the patterns between different layers, and the pattern. Since the dimensions of the mask pattern are checked and the connection point information obtained from the polygon graphic information and the connection point information obtained from the CAD information are collated, the appearance inspection of the mask pattern, which is highly densified and miniaturized, can be automated. Precisely, mechanically generated fine mask defects, dust, misalignment between layers, etc.
It can be detected in a short time without omission. As a result, it is possible to ensure the quality and improve the reliability in the production of printed boards and to reduce the number of inspection steps.

[Brief description of drawings]

FIG. 1 is a block diagram showing a main configuration of an embodiment of a mask visual inspection apparatus of the present invention.

FIG. 2 is a perspective view showing a hardware configuration example of the embodiment shown in FIG.

FIG. 3 is a plan view showing an example of an appearance defect which is a target of a mask appearance inspection.

FIG. 4 is a plan view showing an example of a mask pattern and examples of a bitmap and a polygon figure obtained from the mask pattern.

FIG. 5 is a plan view showing an example of a mask pattern including a pinhole and examples of a bitmap and a polygon figure obtained from the mask pattern.

FIG. 6 is a plan view showing an example of a mask pattern of a character font and examples of bitmaps and polygon figures obtained from the mask pattern.

FIG. 7 is a plan view showing an example of a graphic calculation function in the embodiment of the present invention.

FIG. 8 is a plan view showing another example of the graphic calculation function in the embodiment of the present invention.

FIG. 9 is a plan view showing an example of a graphic calculation function between different layers in the embodiment of the present invention.

FIG. 10 is a diagram illustrating an example of a procedure of detecting a short circuit and a disconnection in the embodiment of the present invention.

FIG. 11 is a diagram illustrating an example of a short circuit / open circuit detection procedure according to the embodiment of the present invention.

FIG. 12 is a procedure diagram showing an example of a processing procedure of a mask appearance inspection in the embodiment of the present invention.

FIG. 13 is a diagram illustrating a conversion from a bitmap to a polygon graphic according to the embodiment of this invention.

FIG. 14 is a procedure diagram showing an example of a procedure for converting a bitmap into a polygon figure in the embodiment of the present invention.

FIG. 15 is a diagram illustrating an example of a procedure of detecting overlapping of figures and a space between figures in the embodiment of the present invention.

FIG. 16 is a procedure diagram showing an example of a procedure for detecting overlapping of figures and an interval between figures in the embodiment of the present invention.

FIG. 17 is a diagram illustrating an example of a procedure for detecting the minimum width of a graphic according to the embodiment of the present invention.

FIG. 18 is a procedure diagram showing an example of a procedure for detecting the minimum width of a figure in the embodiment of the present invention.

FIG. 19 is a conceptual diagram showing an example of disconnection and short circuit of a wiring pattern.

FIG. 20 is a diagram illustrating an example of a table used for detecting a short circuit and a disconnection of a wiring pattern in the example of the present invention.

FIG. 21 is a procedure diagram showing an example of a procedure for detecting a short circuit and a disconnection of a wiring pattern in the embodiment of the present invention.

[Explanation of symbols]

 1 Mask 2 Mask Reading Device 3 Control Processing Device 4 Keyboard 5 Mouse 6 Display 11 Mask Missing 12 Short Circuit 13 Mask Protrusion 14 Mask Pinhole 15 Silk Drop 20 CAD Interface File 21 CAD Information Importing Section 22 Mask Reading Section 23 Mask Appearance Inspection Specification 24 Mask Inspection Specification Importing Section 25 Graphic Information Creating Section 26 Graphic Calculation Section 27 Comparative Inspection Section 28 Inspection Result Output Section 29 Auxiliary Storage Section 30 Control Section 31, 34, 38 Mask Pattern 32, 36, 39 Bit Map pattern 33, 37, 40 Polygon graphic pattern 35 Through hole

Front page continuation (72) Inventor Kazumi Hatakeyama 7-1-1 Omika-cho, Hitachi-shi, Ibaraki Hitachi Ltd. Hitachi Research Laboratory

Claims (4)

[Claims] 1. An appearance inspection apparatus for a mask for a printed wiring board, a mask inspection specification capturing means, a mask creating CAD information capturing means, a mask reading means for reading a mask pattern as mask information, and a read mask. Graphic information creating means for converting the information into graphic information including the outer shape of the pattern, and at least the graphic information obtained by the graphic information creating means and the mask inspection specifications taken in are input, and patterns of masks of different layers are input. A figure calculation means for calculating the overlapping state, the minimum width of the pattern, a gap between the patterns, etc., and a defective portion of the mask with at least the figure information obtained by the figure information creating means and the CAD information taken in as inputs. Defect point extracting means for removing the defect, the graphic operation means, and the processing result of the defect point extracting means. An appearance inspection device for a mask for a printed wiring board, comprising: a display unit that outputs a result. 2. The apparatus for inspecting a mask for a printed wiring board according to claim 1, wherein the defect location extracting means includes the graphic information obtained by the graphic information creating means and the captured C.
An external appearance inspection apparatus for a mask for a printed wiring board, wherein the defect information of a mask in the same layer and the mask defect portion in each layer are extracted by inputting AD information. 3. The appearance inspection apparatus for a mask for a printed wiring board according to claim 1 or 2, wherein the defective portion extracting means detects the presence or absence of a short circuit and / or a disconnection of the wiring pattern. Appearance inspection device for masks for printed wiring boards. 4. The appearance inspection device for a mask for a printed wiring board according to claim 1, wherein the graphic operation means includes the graphic information obtained by the graphic information creating means and the taken-in inspection. A printed wiring board mask characterized by further comprising means for detecting a figure included in a wiring pattern by inputting a specification and detecting whether the detected figure is a through hole or not. Appearance inspection device.