JPH06348218A - Image display device - Google Patents

Abstract

PURPOSE:To suppress the ringing of a pulse control signal at its leading edge part, to reduce disturbance and the heat generation of a circuit, and to prevent abnormal operation from being caused by arranging resistors in series and capacitors in parallel at the output parts of PWM circuits. CONSTITUTION:From the output parts of the pulse-width modulating circuits(PWM circuit) 37a-37n to 114 conductive plates 15a-37n of a beam current control electrode, the resistors 51a-51n, and 52a-52n are arranged in series and the capacitors 53a-53n are arranged in parallel. Then the PWM circuits 37a-37n output the pulse control signal having width corresponding to the level of a video signal to the 114 conductive plates 15a-15n of the beam current control electrode. Further, the pulse control signal is applied to the 114 conductive plates 15a-15n of the beam current control electrode having capacity components 54a-54n and an inductance component 55 through the resistors 51a-51n and 52a-52n, and capacitors 53a-53n.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention generates an electron beam for each section when a screen image projected on a screen surface is divided into a plurality of sections in the vertical direction, and each electron beam is generated for each section. To a vertical direction to display a plurality of lines and display an image as a whole.

[0002]

2. Description of the Related Art In recent years, various flattening devices for displaying television images have been proposed.

An image display device as a flat-type color picture tube of this type has hitherto been disclosed in, for example, Japanese Patent Laid-Open No. 135355/1982.
It has a structure as shown in the publication. The configuration will be described below with reference to the drawings.

As shown in FIG. 3, this image display device has a back electrode 1, a line cathode 2 as an electron beam emission source, a beam extraction electrode 3, and a beam flow control in this order from the rear to the anode side. The electrode 4, the focusing electrode 5, the horizontal deflection electrode 6, the vertical deflection electrode 7, the screen 8 and the like are arranged and configured, and these are housed inside a vacuum container.

The operation of the flat type image display device constructed as described above will be described below. As shown in FIG. 3, the line cathode 2 as an electron beam emission source is stretched horizontally so as to generate electron beams that are linearly distributed horizontally, and the line cathode 2 is further vertical. A plurality of lines (only 7 lines 2a to 2g are shown in FIG. 3) are provided at regular intervals in the direction. In this configuration, the line cathodes are spaced at 4.4 mm and the number of line cathodes is 19, and the line cathodes are 2 to 2 in number. The distance between the line cathodes cannot be freely set to a large value, and the vertical deflection electrode 7 and the screen plate 8 which will be described later will be used.
It is regulated by the interval. As the structure of these wire cathodes 2, an oxide cathode material is applied to the surface of a tungsten rod having a diameter of 10 to 30 μm. As will be described later, the line cathode is controlled so as to sequentially emit an electron beam from the upper line cathode 2a to the lower two line cathodes at regular intervals.

The back electrode 1 suppresses the generation of electron beams from the line cathodes other than the corresponding line cathode, and at the same time, the electron beam is emitted.
It also has the function of pushing the mud only in the anodic direction. Figure 3
Although a vacuum container is not shown, it is possible to use the back electrode 1 to form a structure integrated with the vacuum container. Bee
The lead-out electrode 3 is a conductive plate 11 having a plurality of through-holes 10 arranged in a row at regular intervals in the horizontal direction facing each of the line cathodes 2a to 2 and an electron beam emitted from the line cathode 2. Through the through hole 10.

Next, the beam flow control electrode 4 is connected to the line cathodes 2a to 2b.
A plurality of vertically long conductive plates 15 each having a through hole 14 at a position facing each other are arranged side by side in a horizontal direction at a predetermined interval. 11 in this configuration
Four beam flow control electrode conductive plates 15a to 15n are provided (only eight are shown in FIG. 3). The beam flow control electrode 4 synchronizes the passing amount of each electron beam divided in the horizontal direction by the beam extraction electrode 3 with the pixel of the video signal and in synchronization with the horizontal deflection timing described later. Are controlled.

The focusing electrode 5 is a conductive plate 17 having a through hole 16 at a position facing each through hole 14 provided in the beam flow control electrode 4, and focuses the electron beam.

The horizontal deflection electrode 6 is composed of a plurality of conductive plates 18 and 18 'vertically arranged along both sides of the through hole 16 in the horizontal direction. Voltage is applied. The electron beam for each pixel is deflected in the horizontal direction, and the R, G, and B phosphors are sequentially irradiated on the screen 8 to emit light. In this configuration, each electron beam is deflected by 2 trio.

The vertical deflection electrode 7 is composed of a plurality of conductive plates 19 and 19 'arranged in the horizontal direction at intermediate positions in the vertical direction of each of the through holes 16, and a vertical deflection voltage is applied to the vertical deflection electrode 7 to generate an electronic beam. -The beam is deflected vertically. In this structure, the electron beam generated from one line cathode is vertically deflected by 12 lines by the pair of electrodes 19 and 19 '. The vertical deflection electrodes 7 composed of 20 pieces form 19 pairs of vertical deflection conductors corresponding to the 19 line cathodes, respectively, and 228 pieces of the vertical deflection conductors 228 are arranged on the surface of the screen plate 8 in the vertical direction. Drawing a horizontal scan line.

As described above, in this structure, a plurality of horizontal deflection electrodes 6 and vertical deflection electrodes 7 are arranged in a comb shape. Further, by setting the distance to the screen 8 longer than the distance between the horizontal and vertical deflection electrodes, it is possible to irradiate the electron beam on the surface of the screen 8 with a small deflection amount. Becomes This makes it possible to reduce deflection distortion both horizontally and vertically.

As shown in FIG. 3, the screen 8 is constructed by coating the back surface of the glass plate 21 with the phosphor 20 in a stripe shape. Also, although not shown, a metal back, a car
Bon is also applied. The phosphor 20 deflects the electron beam passing through one through hole 14 of the beam flow control electrode 4 in the horizontal direction to form two phosphor pairs of three colors of R, G and B.
It is provided to irradiate the amount of trio, and is applied in stripes in the vertical direction. In FIG. 3, the broken lines drawn on the screen 8 indicate vertical divisions displayed corresponding to the plurality of line cathodes 2, and the two-dot chain line indicates each of the plurality of beam flow control electrodes 4. The corresponding horizontal divisions are shown. As shown in the enlarged view of FIG. 4, one section partitioned by a broken line and a two-dot chain line has two trio R, G, and B phosphors in the horizontal direction and a width of 12 lines in the vertical direction. ing. In this example, the size of one section is 1 mm in the horizontal direction and 4.4 mm in the vertical direction.

Although the phosphors of three colors R, G and B are shown in stripes in FIG. 4, they may be arranged in a delta shape. However, when they are arranged in a delta shape, it is necessary to apply horizontal deflection and vertical deflection waveform voltages suitable for them. In FIG. 4, for the sake of explanation, the dimensional ratio in the vertical and horizontal directions is different from the image displayed on the actual screen.

Further, in this configuration, one of the beam flow control electrodes 4 is
Two R, G, and B phosphors are provided for one through hole 14, but one trio or three or more trio may be used. However, the beam flow control electrode 4
In this case, R, G, B video signals of 1 trio or 3 trios or more are sequentially added, and horizontal deflection must be performed in synchronization with them.

Next, the operation of the drive circuit for driving the image display device will be described with reference to FIG.

First, the drive part for irradiating the screen 8 with an electron beam and displaying the same will be described. The power supply circuit 22 is a circuit for applying a predetermined bias voltage to each electrode of the image display device. The back electrode 1 is V1, the beam extraction electrode 3 is V3, the focusing electrode 5 is V5, and the screen 8 is. Is applied a DC voltage of V8.

The pulse generating circuit 39 uses the vertical synchronizing signal V and the horizontal synchronizing signal H to create a line cathode drive pulse.
FIG. 6 shows an example of the timing.

The line cathode drive circuit 26 receives the line cathode drive pulse and heats the line cathode 2 while the drive pulse is at a high potential. At this time, the heated line cathode is applied to the line cathode 2 more than the potential around the line cathode 2 determined by the bias voltage applied to the back electrode 1 and the beam extraction electrode 3. Since the potential is higher,
No electrons are emitted from the line cathode.

On the other hand, the line cathode 2 emits electrons while the driving pulse is at a low potential. At this time, the potential of the line cathode 2 applied to the line cathode 2 is higher than the potential around the line cathode 2 determined by the bias voltage applied to the back electrode 1 and the beam extraction electrode 3. Since it becomes low, electrons are emitted from the line cathode 2.

As is clear from the above description, electrons are emitted from the 19 line cathodes 2a to 2t only during the 12 horizontal scanning periods in which low potential drive pulses (a tot) are applied. In order to form one screen, it is sufficient to sequentially switch the potentials from the upper line cathode 2a to the lower line cathode 2 by 12 scanning periods.

Next, the deflection portion will be described. As shown in FIG. 5, the deflection voltage generating circuit 40 includes a direct memory access controller (hereinafter referred to as a DMA controller).
41, a deflection voltage waveform storage memory (hereinafter referred to as deflection memory) 42, a horizontal deflection signal generator 43h, a vertical deflection signal generator 43v, and the like.
And horizontal deflection signals h, h '. In this configuration, the vertical deflection signal is displayed in one field for 228 horizontal scanning periods in consideration of overscan.
Further, the memory address area storing the vertical deflection position information corresponding to each line is divided into a first field and a second field, and each set has a memory capacity. When displaying the data, the deflection memory 42 is deleted.
Data is read out, converted into an analog signal by the vertical deflection signal generator 43v, and added to the vertical deflection electrode 7.

The vertical deflection position information stored in the deflection memory 42 is composed of substantially regular data every 12 horizontal scanning periods, and the waveform converted into the deflection signal is also approximately 1.
Although it is a two-stage vertical deflection signal, it has a memory capacity of two fields as described above so that the position can be finely adjusted for each horizontal scanning line.

Further, with respect to the horizontal deflection signal, it is necessary to horizontally deflect the electron beam in six steps in one horizontal scanning period and a memory is provided so that the deflection position can be finely adjusted for each horizontal scanning. . Therefore, to display 456 horizontal scanning periods in one frame, a memory of 456 × 6 = 2736 bytes is required, but since the data of the first field and the second field are shared. In fact, it uses 1368 bytes of memory. At the time of display, the deflection information corresponding to each horizontal scanning line is read from the deflection memory 42, converted into an analog signal by the horizontal deflection signal generator 43h, and added to the horizontal deflection electrode 6.

To summarize the above, during the display period excluding the vertical blanking period of the vertical period, the low-potential drive pulse of the linear cathodes 2a to 2 is emitted from the linear cathode. The electron beam is divided into 114 sections in the horizontal direction by the beam extraction electrode 3 to form 114 electron beam rows. As will be described later, this electron beam is controlled by the beam flow control electrode 4 for each section so as to pass the beam, and after being focused by the focusing electrode 5, it has approximately 6 stages as shown in FIG. The horizontal deflection electrodes 18, 18 'to which a pair of changing horizontal deflection signals h, h' are applied are used to generate R1, G of the screen plate 8 in each horizontal display period.
1, B1 and R2, G2, B2 and other phosphors sequentially,
The horizontal display period / 6 is emitted at a time.

Thus, the raster of each horizontal line is 11
A color image can be displayed on the surface of the screen 8 by modulating the electron beam for each of the four sections with the video signals corresponding to R1, G1, B1 and R2, G2, B2. it can.

Next, the modulation control portion of the electronic beam will be described. First, in FIG. 5, signal input terminals 23R, 2
The R, G, and B video signals added to 3G and 23B are
It is added to 114 sets of sample-hold circuit sets 31a to 31n. Each of the sample-hold groups 31a to 31n is for R1, G1, B1, and R2, G2,
It is composed of six sample-hold circuits for B2.

The sampling pulse generating circuit 34 has a horizontal display period (about 50) of the horizontal period (63.5 μsec).
μsec), the 114 sets of sample-hold circuits 31
Each of a to 31n for R1, G1, B1, and R2
(114.times.6) sampling pulses Ra1 corresponding to the sample-hold circuits for G2, G2, and B2
Rn2 is sequentially generated. Each of the 684 sampling pulses includes 114 sample-hold circuit sets 31.
6 pieces are added to each of a to 31n, so that R1, G1, B1, R2 for each of two pixels when one line is divided into 114 pieces in each sample hold circuit set.
The video signals of G2 and B2 are individually sampled and
Be killed. 114 sets of R1 sampled,
The video signals of G1, B1, R2, G2, and B2 are 114 sets of memories 32a through after the end of the sample hold for one line.
32n are transferred all at once by the transfer pulse t, and are held here for the next one horizontal scanning period. The retained signal is 11
It is added to the four switching circuits 35a to 35n.

The switching circuits 35a to 35n are each composed of a circuit having individual input terminals of R1, G1, B1, R2, G2 and B2 and a common output terminal for sequentially switching and outputting them, and a switching pulse Switching pulse r applied from the generation circuit 36
Switching control is performed simultaneously by 1, g1, b1, r2, g2, and b2. The switching pulses r1, g1,
b1, r2, g2, and b2 divide each horizontal display period into six, and each horizontal display period / 6 switching circuit 35a-3.
5n are switched, and the respective video signals of R1, G1, B1, R2, G2, and B2 are time-divided and sequentially output, and supplied to pulse width modulation circuits (hereinafter referred to as PWM circuits) 37a to 37n. The output of each switching circuit 35a-35n is 11
R1 and G are added to the four sets of PWM circuits 37a to 37n.
The pulse width is modulated according to the magnitude of each of the video signals of 1, B1, R2, G2, and B2 and is output. PWM circuit 37a-
The output of 37n is individually applied as a control signal for modulating the electron beam to the 114 conductive plates 15a to 15n of the beam flow control electrode 4 of the display element.

Before and after the beam flow control electrode 4, a beam extraction electrode 3 and a focusing electrode 5 to which a DC voltage is applied.
Are close to each other, and the loads of the PWM circuits 37a to 37n that output the pulse control signals to the 114 conductive plates 15a to 15n can be represented by an equivalent circuit as shown in FIG. it can. Here, 56a to 56n
Is a resistor inserted in the output stage for the purpose of protecting the PWM circuit from electrostatic leakage generated inside the vacuum container,
54a to 54n are capacitance components, and 55 is an inductance component. Further, when paying attention to only one of the 114 conductive plates 15a, the equivalent circuit is shown in FIG. 7B. Here, 57 is a resistance component 1/113 times that of the resistor 51a, and 58 is a capacitance component 113 times that of the capacitance component 52a.

Next, the timing of horizontal deflection and display will be described. Switching of video signals of R1, G1, B1, R2, G2 and B2 in the switching circuits 35a to 35n, and electronic beam R by the horizontal deflection signal generator 43h.
The synchronization control is performed so that the switching timing and the order of horizontal deflection of the phosphors of 1, G1, B1, R2, G2, and B2 to the phosphors completely match. As a result, when the R1 phosphor is irradiated with the electron beam, the irradiation amount of the electron beam is controlled by the R1 control signal, and G1, B1, R
2, G2, B2 are controlled in the same manner, and the emission of each phosphor of R1, G1, B1, R2, G2, B2 of each pixel is the video signal of R1, G1, B1, R2, G2, B2 of that pixel. That is, each pixel is controlled to emit light according to an input video signal. This control is simultaneously executed for 114 sets (two pixels each) for one line, an image of 228 pixels for one line is displayed, and one field 228 lines are sequentially performed from the upper line, An image is displayed on the surface of the screen 8. In addition, the above-mentioned operations are 1 of the input video signal.
This is repeated for each field, and a television signal or the like is displayed on the screen 8.

The basic clock required for this configuration is shown in FIG.
Is supplied from the pulse generation circuit 39 shown in FIG. 1 and the timing is controlled by the horizontal synchronizing signal H and the vertical synchronizing signal V.

[0032]

However, in the above-mentioned conventional circuit configuration, ringing occurs at the rising portion of the pulse control signal applied from the PWM circuit to the conductive plate for the beam flow control electrode, which causes disturbance or PWM. There is a problem in that it causes heat generation in the circuit and further induces an abnormal operation.

The present invention solves the above-mentioned conventional problems, and an object of the present invention is to provide an image display device that suppresses interference and heat generation of a circuit and does not cause abnormal operation.

[0034]

In order to achieve this object, the image display device of the present invention includes an output section of a PWM circuit,
It has a circuit configuration in which a resistor is arranged in series and a capacitor is arranged in parallel.

[0035]

With this circuit configuration, it is possible to suppress the ringing that has conventionally occurred at the rising portion of the pulse control signal applied from the PWM circuit to the conductive plate for the beam flow control electrode, and reduce the disturbance and the heat generation of the circuit. It is possible to realize an image display device in which abnormal operation does not occur.

[0036]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a circuit configuration diagram of an output section of a PWM circuit for driving the beam flow control electrode of this embodiment. PWM
From the output of the circuits 37a-37n to the beam flow control electrode 1
Resistors 51a to 51n and 52a to 52n are arranged in series, and capacitors 53a to 53n are arranged in parallel to the 14 conductive plates 15a to 15n.

The operation of the output section of the circuit for driving the beam flow control electrode configured as described above will be described below.

The PWM circuits 37a to 37n output a pulse control signal having a width corresponding to the size of the video signal to the 114 conductive plates 15a to 15n of the beam flow control electrodes. The pulse control signal includes capacitance components 54a to 54
n to 114 conductive plates 15a to 15n of the beam flow control electrode having an inductance component 55, resistors 51a to 51n, 52a to 52n, and capacitors 53a to 53n, respectively.
Added via 53n.

The rising characteristic of the pulse control signal applied to the beam flow control electrode according to this embodiment and the conventional characteristic are shown in comparison with FIG.

[0041]

As described above, according to the present invention, the ringing of the rising portion of the pulse control signal applied to the beam flow control electrode is achieved by the circuit configuration in which the resistor and the capacitor are arranged in series at the output of the PWM circuit. Therefore, it is possible to provide an image display device which can suppress the occurrence of interference, reduce the heat generation of the circuit and prevent abnormal operation.

[Brief description of drawings]

FIG. 1 is a circuit configuration diagram of an output section of a PWM circuit according to an embodiment of the present invention.

FIG. 2 is a comparison diagram of rising characteristics of a pulse control signal applied to a beam flow control electrode.

FIG. 3 is an exploded perspective view of an image display device used in the present invention.

FIG. 4 is an enlarged view of a phosphor screen of an image display device used in the present invention.

FIG. 5 is a block diagram of a drive circuit of an image display device used in the present invention.

FIG. 6 is a waveform diagram for explaining the operation of the image display device used in the present invention.

7A is a circuit configuration diagram of an output section of a conventional PWM circuit and an equivalent circuit diagram of electrodes to be driven. FIG. 7B is an equivalent circuit diagram of an output section of a conventional PWM circuit.

[Explanation of symbols]

 3 beam extraction electrode 5 focusing electrode 15a-15n conductive plate for beam flow control electrode 37a-37n PWM circuit 51a-51n resistor 52a-52n resistor 53a-53n capacitor 54a-54n capacitance component 55 inductance component

Claims (1)

[Claims] 1. A plurality of line cathodes for generating an electron beam,
A plurality of beam flow control electrodes for controlling the electron beam emitted from the linear cathode, electrodes for deflecting the electron beam, a screen coated with a phosphor that emits light when irradiated with the electron beam, and the beam flow. A circuit for driving the control electrode is provided, and a capacitor is arranged in parallel with a resistor in series from the output part of the circuit to the beam flow control electrode to suppress ringing at a rising portion of a signal waveform applied to the beam flow control electrode. An image display device characterized by the above.