JPH0594786A - Image display apparatus - Google Patents

Abstract

PURPOSE:To prevent breakdown of various kinds of driving circuits due to abnormally high voltage discharge regarding an apparatus to display a plurality of lines by vertically deflecting electron beam for each of a plurality of sections and display the image as a whole, wherein the sections are formed by dividing an image on the screen vertically. CONSTITUTION:A discharge gap 46 is formed between a ground and the output terminal of horizontally deflecting output transistors 44, 45 to be connected with a horizontally deflecting electrode 6 of a display apparatus and a fuse 47 is connected between the horizontally deflecting output transistors 44, 45 and the horizontally deflecting electrode 6. Consequently, abnormally high voltage is bypassed and breakdown of horizontally deflecting output circuits is prevented.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention displays an image as a whole by deflecting an electron beam for each section when a screen on a screen is vertically divided into a plurality of lines to display a plurality of lines. Related to the device.

[0002]

2. Description of the Related Art The basic structure of a conventional image display device will be described with reference to FIG.

This display device has a back electrode 1, a line cathode 2 as a beam source, a beam extraction electrode 3, a beam flow control electrode 4, a focusing electrode 5 in this order from the rear to the anode side.
A horizontal deflection electrode 6, a vertical deflection electrode 7, a screen plate 8, etc. are arranged and configured, and these are housed inside a vacuum container.

A linear cathode 2 as a beam source is stretched in the horizontal direction so as to generate an electron beam linearly distributed in the horizontal direction, and the linear cathodes 2 are further arranged at a predetermined interval in the vertical direction. In the invention, only four lines 2a to 2d are shown.) In this configuration, the space between the line cathodes is 3
Assuming that there are 30 mm in number and the number of the line cathodes is 2 to 2 mm. The space between the line cathodes cannot be freely set, and is regulated by the space between the vertical deflection electrode 7 and the screen 8 described later. These wire cathodes 2
In this structure, a surface of a tungsten rod having a diameter of 10 to 30 μm is coated with an oxide cathode material. As described later, the linear cathode 2 is controlled so as to sequentially emit an electron beam from the upper linear cathode 2a to the lower circular cathode for a predetermined time. The beam extraction electrode 3 has a plurality of through holes 10 that are arranged in a row in the horizontal direction facing each of the line cathodes 2a to 2m at regular intervals, and the electron beam emitted from the line cathode 2 is penetrated by the through holes 10. Take out through.

The beam flow control electrode 4 controls the amount of the electron beam generated from the linear cathode 2 in synchronization with the horizontal deflection timing, which will be described later, corresponding to the picture element of the video signal.

The horizontal deflection electrode 6 is composed of a plurality of conductive plates 18a, 18b vertically arranged along both horizontal sides of the through hole 14 of the beam flow control electrode 4, respectively. A horizontal deflection voltage is applied to the conductive plate. The electron beam for each picture element is deflected in the horizontal direction, and the R, G, and B phosphors are sequentially irradiated on the screen 8 to emit light. In this configuration, each electron beam is deflected by 2 trio.

The vertical deflection electrode 7 is composed of a plurality of conductive plates 19a and 19b arranged in the horizontal direction at intermediate positions in the vertical direction of the through hole 14, and the vertical deflection voltage is applied to each pole. 240 horizontal scan lines are drawn vertically on the screen 8 applied to the corresponding 30 pairs of vertical deflection conductors. As described above, in this configuration, a plurality of horizontal deflection electrodes 6 and vertical deflection electrodes 7 are arranged in a comb shape. Further, by setting the distance to the screen 8 longer than the distance between the horizontal and vertical deflection electrodes, it becomes possible to irradiate the screen 8 with an electron beam with a small deflection amount. As a result, horizontal and vertical deflection distortions can be reduced.

The screen 8 is formed by coating the back surface of the glass plate with a phosphor in a stripe shape. Although not shown, metal back and carbon are also applied. The phosphor is provided so as to horizontally irradiate the electron beam for one electrode of the beam flow control electrode 4 so as to irradiate the phosphor pairs of three colors of R, G, and B for two trios, and the vertical. It is applied in stripes in the direction.

In FIG. 2, the broken lines drawn on the screen 8 indicate vertical divisions displayed corresponding to the plurality of line cathodes 2, and the two-dot chain line indicates each of the plurality of beam control electrodes 4. The corresponding horizontal divisions are shown. FIG. 3 shows an enlarged view of one section partitioned by a broken line and a two-dot chain line. As shown in FIG. 3, the phosphors of R, G, and B for 2 trios in the horizontal direction and the width for 8 lines in the vertical direction are provided. The size of one section is 1m in the horizontal direction in this example.
m, 3 mm in the vertical direction.

Although phosphors of three colors R, G and B are shown in stripes in FIG. 3, they may be arranged in a delta shape. However, when they are arranged in a delta shape, it is necessary to apply a horizontal deflection waveform and a vertical deflection waveform suitable for each.

Note that, in FIG. 3, for the sake of explanation, the vertical and horizontal dimensional ratios are different from the image actually displayed on the screen.

Further, in this structure, R, G, and B phosphors for 2 trio are provided for each electrode of the beam flow control electrode 4, but they are formed for 1 trio or 3 trio or more. May be. However, the R, G, and B video signals of 1 trio or 3 trios or more are sequentially applied to the beam flow control electrode 4, and horizontal deflection must be performed in synchronization therewith.

Next, the operation of the drive circuit for driving this display element will be described with reference to FIG. First, the drive portion that irradiates the screen 8 with the electron beam and displays the electron beam will be described.

A power supply circuit 22 is a circuit for applying a predetermined bias voltage to each electrode of the display element, and applies a DC voltage of V3 to the beam extraction electrode 3 and a DC voltage of V8 to the screen 8. The line cathode driving circuit 26 uses the vertical synchronizing signal V and the horizontal synchronizing signal H to create a line cathode driving pulse (i-ma). FIG. 5 shows the timing chart. Each wire cathode 2a ~
As shown in FIG. 5 (a to m), the second pulse is heated by a current flowing while the drive pulse is at a high potential, so that the drive pulse (a to m) emits electrons during a low potential period. The heating state is maintained. As a result, electrons are emitted from the 30 line cathodes 2a to 2ma only during the 8 horizontal scanning periods in which low potential drive pulses (a to ma) are applied. During the period when the high potential is applied, the linear cathodes 2a to 2a are higher than the potentials around the linear cathode 2 determined by the bias voltage applied to the beam flow control electrode 4 and the beam extraction electrode 3.
Electrons are not emitted from the line cathode because the potential applied to the cell is higher. In order to form one screen, it is sufficient to sequentially switch the potentials from the upper line cathode 2a to the lower line cathode 2m by every 8 scanning periods.

Next, the deflecting portion will be described. The deflection voltage generation circuit 40 includes a direct memory access controller (hereinafter referred to as a DMA controller) 41, a deflection voltage waveform storage memory (hereinafter referred to as a deflection memory) 42, and a digital-analog converter (hereinafter referred to as a D / A converter). 43h,
The vertical deflection signals v ₁ and v ₂ and the horizontal deflection signals h ₁ and h ₂ are generated.

In this structure, with respect to the vertical deflection signal, in consideration of overscan, 24 in one field.
0 horizontal scanning period is displayed. In addition, the memory address area storing the vertical deflection position information corresponding to each line is divided into a first field and a second field, and each has a set of memory capacity. At the time of display, data is read from the corresponding deflection memory 42, converted into an analog signal by the D / A converter 43v, and added to the vertical deflection electrode 7. The vertical deflection position information stored in the deflection memory 42 is composed of substantially regular data for every 8 horizontal scanning periods, and the D / A converted waveform also becomes a vertical deflection signal of approximately 8 stages. However, as described above, the memory capacity for two fields is provided so that the position can be finely adjusted for each horizontal scanning.

Further, for the horizontal deflection signal, it is necessary to horizontally deflect the electron beam in six steps in one horizontal scanning period, and a memory is provided so that the deflection potential can be finely adjusted for each horizontal scanning. Therefore, in order to display 480 horizontal scanning periods in one frame, a memory of 480 × 6 = 2880 bytes is required, but since the data of the first field and the second field is shared, it is actually 1440 bytes. You are using memory. When displaying, the deflection information corresponding to each horizontal scanning line is read from the deflection memory 42, and D
The signal is converted into an analog signal by the / A converter 43h and added to the horizontal deflection electrode 6. In summary, during the display period of the vertical period excluding the vertical blanking period, the electron beam emitted from the line cathode applying the low-potential drive pulse among the line cathodes 2a to 2m is the beam. The extraction electrode 3 divides it into 120 sections in the horizontal direction to form 120 electron beam arrays. As will be described later, this electron beam is controlled in beam quantity by the beam flow control electrode 4 for each section, and a pair of horizontal deflection signals h and h'which change in approximately 6 steps are added as shown in FIG. Horizontal deflection electrodes 7a, 7
R, G of the screen 8 during each horizontal display period
Phosphors such as 1, B1 and R2, G2, B2, etc. are sequentially irradiated with each horizontal display period / 6. Thus, the raster of each horizontal line will emit an electron beam for each of the 120 sections.
A color image can be displayed on the screen 8 by modulating with a video signal corresponding to 1, G1, B1 and R2, G2, B2.

Next, the electron beam modulation control portion will be described. First, in FIG. 4, the signal input terminals 23R, 23
Each of the R, G, B video signals added to G, 23B is 1
It is added to 20 sets of sample and hold circuit groups 31a to 31n. The sample and hold circuit groups 31a to 31n are respectively for R1, G1, B1, and R2, G2.
And B2 for 6 samples and hold circuits. The sampling pulse generation circuit 34 has a horizontal cycle (6
In the horizontal display period (about 50 μs) of 3.5 μs), each of the 120 sets of sample hold circuits 31a to 31n is for R1, G1, B1, and R2, G2, B.
720 corresponding to the sample and hold circuit for 2 (12
0 × 6) sampling pulses Ra1 to Rn2 are sequentially generated. The 720 sampling pulses are distributed to 120 sample hold circuit groups 31a to 31n, respectively.
As a result, the video signals of R1, G1, B1, R2, G2, and B2 for each of two picture elements when one line is divided into 120 pieces are individually added to each sample and hold circuit group. Sampled and held. 120 sets of sample-held R1, G1, B1, R
The video signals of 2, G2, and B2 are simultaneously transferred to the 120 sets of memories 32a to 32n by the transfer pulse t after the sample and hold for one line are completed, and are held there for the next one horizontal scanning period. The held signal is applied to 120 switching circuits 35a to 35n. The switching circuits 35a to 35n are R1, G1, B1, and R, respectively.
2, G2, B2, and a common output terminal for sequentially switching and outputting them, and switching pulses r1, g1, b1, r2, g added from the switching pulse generation circuit 36.
Switching control is performed simultaneously by 2 and b2.

The switching pulses r1, g1, b
1, r2, g2, and b2 divide each horizontal display period into six, and each of the horizontal display periods / 6 has switching circuits 35a to 35a.
5n are switched, and the respective video signals of R1, G1, B1, R2, G2, and B2 are time-divisionally sequentially output and supplied to the pulse width modulation circuits 37a to 37n. Each switching circuit 3
The outputs of 5a to 35n are added to 120 pulse width modulation (hereinafter referred to as PWM) circuits 37a to 37n, and R1,
The pulse width is modulated according to the magnitude of each of the video signals of G1, B1, R2, G2, and B2, and is output. The outputs of the pulse width modulation circuits 37a to 37n serve as control signals for modulating the electron beam and are output from the beam control electrode 4 of the display element 120.
Each is individually added to the conductive plate of the book.

Next, the timing of horizontal deflection and display will be described. R in the switching circuits 35a to 35n
Switching of video signals of 1, G1, B1, R2, G2, B2, and electron beams R1, G by the horizontal deflection drive circuit 41
The synchronization control is performed so that the switching timing and the order of the horizontal deflection of the phosphors of 1, B1, R2, G2, and B2 to the phosphors completely match. Thus, when the R1 phosphor is irradiated with the electron beam, the irradiation amount of the electron beam is R1.
Controlled by a control signal, hereinafter G1, B1, R2, G
2 and B2 are controlled similarly, and R1 of each picture element,
The emission of each of the G1, B1, R2, G2, and B2 phosphors is controlled by the video signals of R1, G1, B1, R2, G2, and B2 of the picture element, and each picture element becomes the input picture signal. Therefore, the light is displayed. This control is simultaneously executed for 120 sets of 1 line (2 pixels each), 240 lines of images of 1 line are displayed, and 240 lines of 1 field are sequentially performed from the upper line. The image is displayed on the screen 8. Further, the above-described operations are repeated for each field of the input video signal so that a television signal or the like is displayed on the screen 8.
Displayed in. The basic clock required for this configuration is shown in Fig. 4.
Is supplied from the pulse generating circuit 39 shown in FIG. 1 and the timing is controlled by the horizontal synchronizing signal H and the vertical synchronizing signal V.

[0021]

However, in the image display device configured as described above, the image display device is housed inside the vacuum container due to discharge of abnormal voltage due to static electricity, corona discharge of anode voltage due to destruction of the vacuum container, or the like. There has been a problem that an abnormally high voltage is applied to the various electrodes that are present, and the drive circuits and the like connected thereto are destroyed.

An object of the present invention is to prevent the drive circuit and the like from being damaged by such an abnormally high voltage discharge.

[0023]

In order to solve the above-mentioned problems, the image display device of the present invention is designed so that an abnormal voltage applied to various electrodes due to abnormal discharge is not directly applied to a drive circuit for driving each voltage. By providing a discharge gap between the circuit and the ground and providing a fuse between each electrode and each electrode drive circuit, the abnormal voltage received by each electrode due to abnormal discharge is released through the discharge gap, and further removed by the discharge gap. In order to prevent the drive circuit from being destroyed by the residual voltage that is not cut off, the drive circuit is protected by a fuse so that the residual voltage is prevented from being applied to the drive circuit.

[0024]

With the above-mentioned structure, the present invention makes it possible to prevent the drive circuit from being destroyed by an abnormal voltage applied to each electrode, and to enable stable image reception.

[0025]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 shows a circuit of a connection between an output of a horizontal deflection circuit and a horizontal deflection electrode of an image display device according to an embodiment of the present invention.

In FIG. 1, 6 is a horizontal deflection electrode, 41 is a direct memory access controller (hereinafter referred to as DMA), 42 is a deflection voltage waveform storage memory, and 43h is a digital-analog converter (hereinafter referred to as D / A converter). ),
Reference numerals 44 and 45 are horizontal deflection output transistors, 46 is a discharge gap, and 47 is a fuse.

The operation of the image display device configured as described above will be described with reference to FIGS. 1 and 5.

In the basic drive circuit of the image display apparatus according to the embodiment of the present invention shown in FIG. 1, it is necessary to horizontally deflect the electron beam in six steps in one horizontal scanning period and the deflection potential can be finely adjusted for each horizontal scanning. As described above, the deflection memory 42 is provided, and the horizontal deflection data is read from the deflection memory 42, converted into an analog signal by the D / A converter 43h, amplified to a desired output voltage, and applied to the horizontal deflection electrode 6. This output waveform becomes a pair of horizontal deflection signals h ₁ and h ₂ which change in almost 6 steps as shown in FIG. The outputs from the horizontal deflection output transistors 44 and 45 are provided with a discharge gap 46 between them and the ground, but the intervals are determined so as not to affect the horizontal deflection output voltages h ₁ and h ₂ . Further, the horizontal deflection output voltage is passed through the fuse 47 to the horizontal deflection electrode 6
Added to. Next, when an abnormally high voltage such as an abnormal discharge due to static electricity is applied to the horizontal deflection electrode 6 from the vacuum container, the horizontal deflection output transistors 44 and 45 try to be applied, but the abnormally high voltage is discharged through the discharge gap 46. In this way, the abnormal high voltage is discharged by the discharge gap 46, but a residual voltage remains. A fuse 47 is provided to prevent this residual discharge voltage. By thus providing the discharge gap 46 and the fuse 47, they complement each other and prevent the horizontal deflection output transistors 44 and 45 from being destroyed. That is, if an abnormally high voltage such as an abnormal discharge due to static electricity is applied to the horizontal deflection electrode only by the fuse, the horizontal deflection output transistor is applied through the fuse and the horizontal deflection output transistor is destroyed. It takes time for the fuse to blow, and the transistor is destroyed before the fuse blows.

Although the horizontal deflection circuit has been described as an example, the same can be applied to other electrodes.

[0031]

As described above, according to the present invention, only by adding a discharge gap and a fuse to the drive circuit, it is possible to prevent the circuit from being destroyed even when an abnormally high potential is applied.

[Brief description of drawings]

FIG. 1 is a basic drive circuit diagram of a main part of an image display device according to an embodiment of the present invention.

FIG. 2 is an exploded perspective view showing a basic structure of a conventional image display device.

[Figure 3] Enlarged view of the screen

FIG. 4 is a basic drive circuit diagram of the image display device.

FIG. 5: Timing of various waveforms

[Explanation of symbols] 2 wire cathode 3 beam extraction electrode 4 beam flow control electrode 5 focusing electrode 6 horizontal deflection electrode 7 vertical deflection electrode 8 screen 22 power supply circuit 23 input terminal 26 line cathode drive circuit 31 sample hold circuit 32 memory 34 sampling Pulse generation circuit 35 Switching circuit 36 Switching pulse generation circuit 37 PWM circuit 39 Pulse generation circuit 40 Deflection signal generation circuit 41 DMA controller 42 Deflection memory 43 D / A converter 44 Horizontal deflection output transistor 45 Horizontal deflection output transistor 46 Discharge gap 47 Fuse

Claims (1)

[Claims] 1. A screen coated with a phosphor that emits light when irradiated with an electron beam, and a line cathode that generates an electron beam for each vertical section obtained by vertically dividing the screen on the screen. An electron beam generated by the linear cathode, a vertical deflection electrode for vertically deflecting, and a separating means for separating the electron beam into horizontal sections and irradiating the screen with each horizontal section, A horizontal deflection electrode that horizontally deflects the electron beam in a plurality of steps until reaching the screen, and a screen of the screen by controlling the amount of irradiation of the screen with the electron beam separated for each horizontal section. A beam flow control electrode for controlling the light emission amount of each of the above picture elements is provided, and a discharge gap is provided between at least one of the electrodes and the ground, and An image display device, wherein a fuse is provided between the electrode and a drive circuit for driving the electrode.